From: Bartosz Golaszewski <bgolaszewski@baylibre.com> To: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Kevin Hilman <khilman@baylibre.com>, Michael Turquette <mturquette@baylibre.com>, Sekhar Nori <nsekhar@ti.com>, Rob Herring <robh+dt@kernel.org>, Mark Rutland <mark.rutland@arm.com>, Russell King <linux@armlinux.org.uk>, LKML <linux-kernel@vger.kernel.org>, arm-soc <linux-arm-kernel@lists.infradead.org> Subject: Re: [PATCH 6/6] ARM: da850: adjust memory settings for tilcdc Date: Tue, 4 Oct 2016 11:20:34 +0200 [thread overview] Message-ID: <CAMpxmJW=JgXvM8Rnk40nXxNL7dcqX2jU6HCR2MtQZXRJMd-UZw@mail.gmail.com> (raw) In-Reply-To: <91db8934-bfd6-8fc4-74e3-4844ef3bd3e7@ti.com> 2016-09-30 21:19 GMT+02:00 Peter Ujfalusi <peter.ujfalusi@ti.com>: > On 09/30/2016 06:06 PM, Bartosz Golaszewski wrote: >> >> Just ran a quick test with speaker-test -c2 -twav. Besides the fact >> that the left and right channels are inverted (I'm looking into that), >> I didn't notice any problems. Even at 1024x768 resolution, playing >> audio at the same time seems to work fine. > Hi Peter > That's good to hear, but I think the priorities should be set: > LCDC and EDMA30TC1 to highest priority > EDMA30TC0 to priority 2 > > The 0TC0 is used by MMC and if you want to play a video you might need the > servicing TC to be higher priority then other masters. > > If audio playback would trigger sync losts in lcdc then we might need to move > 0TC1 to priority 1. > Did you mean "set EDMA31TC0 to priority 2"? EDMA30TC0 is already at the highest priority. Or did you mean that we need to lower the EDMA30TC0 priority? In that case: is 2 the correct value? EDMA31TC0 is used by mmc1 and its priority is 4. Shouldn't we set both to be the same? > I agree that LCDC priority needs to be higher, but I do wonder why the default > (5) is not working and if it is not working why it is 5... > > My guess is that the change in the PBBPR register is the one actually helping > here. > While it seems that lowering the EDMA30TC0 priority is indeed unnecessary, if I don't set the LCDC master to priority 0, I still get FIFO underflows even with the change in PBBPR. Thanks, Bartosz
WARNING: multiple messages have this Message-ID (diff)
From: bgolaszewski@baylibre.com (Bartosz Golaszewski) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 6/6] ARM: da850: adjust memory settings for tilcdc Date: Tue, 4 Oct 2016 11:20:34 +0200 [thread overview] Message-ID: <CAMpxmJW=JgXvM8Rnk40nXxNL7dcqX2jU6HCR2MtQZXRJMd-UZw@mail.gmail.com> (raw) In-Reply-To: <91db8934-bfd6-8fc4-74e3-4844ef3bd3e7@ti.com> 2016-09-30 21:19 GMT+02:00 Peter Ujfalusi <peter.ujfalusi@ti.com>: > On 09/30/2016 06:06 PM, Bartosz Golaszewski wrote: >> >> Just ran a quick test with speaker-test -c2 -twav. Besides the fact >> that the left and right channels are inverted (I'm looking into that), >> I didn't notice any problems. Even at 1024x768 resolution, playing >> audio at the same time seems to work fine. > Hi Peter > That's good to hear, but I think the priorities should be set: > LCDC and EDMA30TC1 to highest priority > EDMA30TC0 to priority 2 > > The 0TC0 is used by MMC and if you want to play a video you might need the > servicing TC to be higher priority then other masters. > > If audio playback would trigger sync losts in lcdc then we might need to move > 0TC1 to priority 1. > Did you mean "set EDMA31TC0 to priority 2"? EDMA30TC0 is already at the highest priority. Or did you mean that we need to lower the EDMA30TC0 priority? In that case: is 2 the correct value? EDMA31TC0 is used by mmc1 and its priority is 4. Shouldn't we set both to be the same? > I agree that LCDC priority needs to be higher, but I do wonder why the default > (5) is not working and if it is not working why it is 5... > > My guess is that the change in the PBBPR register is the one actually helping > here. > While it seems that lowering the EDMA30TC0 priority is indeed unnecessary, if I don't set the LCDC master to priority 0, I still get FIFO underflows even with the change in PBBPR. Thanks, Bartosz
next prev parent reply other threads:[~2016-10-04 9:20 UTC|newest] Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-09-29 16:31 [PATCH 0/6] ARM: davinci: da850-lcdk: add support for tilcdc Bartosz Golaszewski 2016-09-29 16:31 ` Bartosz Golaszewski 2016-09-29 16:31 ` [PATCH 1/6] ARM: davinci: da8xx-dt: add OF_DEV_AUXDATA entry for lcdc Bartosz Golaszewski 2016-09-29 16:31 ` Bartosz Golaszewski 2016-09-29 16:31 ` [PATCH 2/6] ARM: dts: da850: add a node for the LCD controller Bartosz Golaszewski 2016-09-29 16:31 ` Bartosz Golaszewski 2016-09-30 9:34 ` Sekhar Nori 2016-09-30 9:34 ` Sekhar Nori 2016-09-30 13:03 ` Bartosz Golaszewski 2016-09-30 13:03 ` Bartosz Golaszewski 2016-09-29 16:31 ` [PATCH 3/6] ARM: dts: da850-lcdk: enable " Bartosz Golaszewski 2016-09-29 16:31 ` Bartosz Golaszewski 2016-09-29 18:40 ` Karl Beldan 2016-09-29 18:40 ` Karl Beldan 2016-09-30 9:42 ` Bartosz Golaszewski 2016-09-30 9:42 ` Bartosz Golaszewski 2016-09-30 13:15 ` Karl Beldan 2016-09-30 13:15 ` Karl Beldan 2016-09-30 14:21 ` Sekhar Nori 2016-09-30 14:21 ` Sekhar Nori 2016-09-29 16:31 ` [PATCH 4/6] ARM: dts: da850-lcdk: add support for 1024x768 resolution Bartosz Golaszewski 2016-09-29 16:31 ` Bartosz Golaszewski 2016-09-29 18:58 ` Karl Beldan 2016-09-29 18:58 ` Karl Beldan 2016-09-30 9:37 ` Bartosz Golaszewski 2016-09-30 9:37 ` Bartosz Golaszewski 2016-09-30 11:47 ` Sekhar Nori 2016-09-30 11:47 ` Sekhar Nori 2016-09-30 12:49 ` Karl Beldan 2016-09-30 12:49 ` Karl Beldan 2016-09-30 13:48 ` Bartosz Golaszewski 2016-09-30 13:48 ` Bartosz Golaszewski 2016-10-01 9:35 ` Sekhar Nori 2016-10-01 9:35 ` Sekhar Nori 2016-09-29 16:31 ` [PATCH 5/6] ARM: davinci: enable the LCDC DRM driver in defconfig Bartosz Golaszewski 2016-09-29 16:31 ` Bartosz Golaszewski 2016-10-01 12:39 ` Sekhar Nori 2016-10-01 12:39 ` Sekhar Nori 2016-09-29 16:31 ` [PATCH 6/6] ARM: da850: adjust memory settings for tilcdc Bartosz Golaszewski 2016-09-29 16:31 ` Bartosz Golaszewski 2016-09-29 19:07 ` Karl Beldan 2016-09-29 19:07 ` Karl Beldan 2016-09-30 9:31 ` Bartosz Golaszewski 2016-09-30 9:31 ` Bartosz Golaszewski 2016-09-30 9:39 ` Karl Beldan 2016-09-30 9:39 ` Karl Beldan 2016-09-30 12:59 ` Peter Ujfalusi 2016-09-30 12:59 ` Peter Ujfalusi 2016-09-30 15:06 ` Bartosz Golaszewski 2016-09-30 15:06 ` Bartosz Golaszewski 2016-09-30 19:19 ` Peter Ujfalusi 2016-09-30 19:19 ` Peter Ujfalusi 2016-10-01 9:24 ` Sekhar Nori 2016-10-01 9:24 ` Sekhar Nori 2016-10-03 7:13 ` Peter Ujfalusi 2016-10-03 7:13 ` Peter Ujfalusi 2016-10-04 13:02 ` Kevin Hilman 2016-10-04 13:02 ` Kevin Hilman 2016-10-05 8:22 ` Peter Ujfalusi 2016-10-05 8:22 ` Peter Ujfalusi 2016-10-06 17:57 ` Sekhar Nori 2016-10-06 17:57 ` Sekhar Nori 2016-10-04 9:20 ` Bartosz Golaszewski [this message] 2016-10-04 9:20 ` Bartosz Golaszewski 2016-10-05 8:02 ` Peter Ujfalusi 2016-10-05 8:02 ` Peter Ujfalusi
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