From: Jagan Teki <jagan@amarulasolutions.com>
To: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Peng Fan <peng.fan@nxp.com>, Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Tomasz Figa <t.figa@samsung.com>, Fancy Fang <chen.fang@nxp.com>,
devicetree <devicetree@vger.kernel.org>,
Francis Laniel <francis.laniel@amarulasolutions.com>,
Matteo Lisi <matteo.lisi@engicam.com>,
Neil Armstrong <narmstrong@baylibre.com>,
Robert Foss <robert.foss@linaro.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
dri-devel <dri-devel@lists.freedesktop.org>,
Andrzej Hajda <a.hajda@samsung.com>,
NXP Linux Team <linux-imx@nxp.com>,
Milco Pratesi <milco.pratesi@engicam.com>,
Anthony Brandon <anthony@amarulasolutions.com>,
linux-phy@lists.infradead.org,
linux-amarula <linux-amarula@amarulasolutions.com>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>
Subject: Re: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver
Date: Thu, 24 Jun 2021 17:41:14 +0530 [thread overview]
Message-ID: <CAMty3ZDmzPha7zdWVHkcuRCjA_LsWqSLyWQMhkOiRMmQmTNXjA@mail.gmail.com> (raw)
In-Reply-To: <YNO0LHNVSWjrh1ZS@pendragon.ideasonboard.com>
Hi Laurent,
On Thu, Jun 24, 2021 at 3:53 AM Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
>
> Hi Jagan,
>
> Thank you for the patch.
>
> On Mon, Jun 21, 2021 at 12:54:17PM +0530, Jagan Teki wrote:
> > Samsung SEC MIPI DSIM Bridge controller is MIPI DSI bridge
> > available in NXP's i.MX8M Mini and Nano Processors.
> >
> > Add bridge driver for it.
> >
> > Cc: Andrzej Hajda <a.hajda@samsung.com>
> > Cc: Neil Armstrong <narmstrong@baylibre.com>
> > Cc: Robert Foss <robert.foss@linaro.org>
> > Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
> > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> > ---
> > drivers/gpu/drm/bridge/Kconfig | 15 +
> > drivers/gpu/drm/bridge/Makefile | 1 +
> > drivers/gpu/drm/bridge/sec-dsim.c | 1535 +++++++++++++++++++++++++++++
> > 3 files changed, 1551 insertions(+)
> > create mode 100644 drivers/gpu/drm/bridge/sec-dsim.c
> >
> > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> > index 19109c0b5481..a183eb165a35 100644
> > --- a/drivers/gpu/drm/bridge/Kconfig
> > +++ b/drivers/gpu/drm/bridge/Kconfig
> > @@ -189,6 +189,21 @@ config DRM_PARADE_PS8640
> > The PS8640 is a high-performance and low-power
> > MIPI DSI to eDP converter
> >
> > +config DRM_SEC_MIPI_DSIM
> > + tristate "Samsung SEC MIPI DSIM Bridge controller"
> > + depends on DRM
> > + depends on COMMON_CLK
> > + depends on OF && HAS_IOMEM
> > + select DRM_KMS_HELPER
> > + select DRM_MIPI_DSI
> > + select DRM_PANEL_BRIDGE
> > + select GENERIC_PHY_MIPI_DPHY
> > + select MFD_SYSCON
> > + select REGMAP_MMIO
> > + help
> > + This enables the Samsung SEC MIPI DSIM Bridge controller as
> > + for example found on NXP's i.MX8M Mini and Nano Processors.
> > +
> > config DRM_SIL_SII8620
> > tristate "Silicon Image SII8620 HDMI/MHL bridge"
> > depends on OF
> > diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
> > index 88e4edf81087..ff802a4ffe65 100644
> > --- a/drivers/gpu/drm/bridge/Makefile
> > +++ b/drivers/gpu/drm/bridge/Makefile
> > @@ -12,6 +12,7 @@ obj-$(CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW) += megachips-stdpxxxx-ge-b850v
> > obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
> > obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
> > obj-$(CONFIG_DRM_PARADE_PS8640) += parade-ps8640.o
> > +obj-$(CONFIG_DRM_SEC_MIPI_DSIM) += sec-dsim.o
> > obj-$(CONFIG_DRM_SIL_SII8620) += sil-sii8620.o
> > obj-$(CONFIG_DRM_SII902X) += sii902x.o
> > obj-$(CONFIG_DRM_SII9234) += sii9234.o
> > diff --git a/drivers/gpu/drm/bridge/sec-dsim.c b/drivers/gpu/drm/bridge/sec-dsim.c
> > new file mode 100644
> > index 000000000000..5b6645bb94e7
> > --- /dev/null
> > +++ b/drivers/gpu/drm/bridge/sec-dsim.c
> > @@ -0,0 +1,1535 @@
> > +// SPDX-License-Identifier: GPL-2.0-only
> > +/*
> > + * Samsung SEC MIPI DSIM Bridge
> > + *
> > + * Copyright (C) 2018 NXP
> > + * Copyright (c) 2014 Samsung Electronics Co., Ltd
> > + * Copyright (C) 2021 Amarula Solutions(India)
> > + *
> > + * Based on the drivers/gpu/drm/exynos/exynos_drm_dsi.c
> > + *
> > + * Authors:
> > + * Tomasz Figa <t.figa@samsung.com>
> > + * Andrzej Hajda <a.hajda@samsung.com>
> > + * Fancy Fang <chen.fang@nxp.com>
> > + * Jagan Teki <jagan@amarulasolutions.com>
> > + */
> > +
> > +#include <asm/unaligned.h>
> > +#include <linux/bitfield.h>
> > +#include <linux/clk.h>
> > +#include <linux/completion.h>
> > +#include <linux/delay.h>
> > +#include <linux/module.h>
> > +#include <linux/of_device.h>
> > +#include <linux/of_graph.h>
> > +#include <linux/phy/phy.h>
> > +#include <linux/regmap.h>
> > +
> > +#include <drm/drm_atomic_helper.h>
> > +#include <drm/drm_bridge.h>
> > +#include <drm/drm_mipi_dsi.h>
> > +#include <drm/drm_panel.h>
> > +#include <drm/drm_of.h>
> > +#include <drm/drm_print.h>
> > +
> > +#include <video/mipi_display.h>
> > +
> > +#define DRIVER_NAME "sec-dsim"
> > +
> > +/* dsim registers */
> > +#define DSIM_VERSION 0x00
> > +#define DSIM_STATUS 0x04
> > +#define DSIM_RGB_STATUS 0x08
> > +#define DSIM_SWRST 0x0c
> > +#define DSIM_CLKCTRL 0x10
> > +#define DSIM_TIMEOUT 0x14
> > +#define DSIM_CONFIG 0x18
> > +#define DSIM_ESCMODE 0x1c
> > +#define DSIM_MDRESOL 0x20
> > +#define DSIM_MVPORCH 0x24
> > +#define DSIM_MHPORCH 0x28
> > +#define DSIM_MSYNC 0x2c
> > +#define DSIM_SDRESOL 0x30
> > +#define DSIM_INTSRC 0x34
> > +#define DSIM_INTMSK 0x38
> > +#define DSIM_PKTHDR 0x3c
> > +#define DSIM_PAYLOAD 0x40
> > +#define DSIM_RXFIFO 0x44
> > +#define DSIM_FIFOTHLD 0x48
> > +#define DSIM_FIFOCTRL 0x4c
> > +#define DSIM_MEMACCHR 0x50
> > +#define DSIM_MULTI_PKT 0x78
> > +#define DSIM_PLLCTRL_1G 0x90
> > +#define DSIM_PLLCTRL 0x94
> > +#define DSIM_PLLCTRL1 0x98
> > +#define DSIM_PLLCTRL2 0x9c
> > +#define DSIM_PLLTMR 0xa0
>
> Looking at the register set, it seems to match the Exynos 5433,
> supported by drivers/gpu/drm/exynos/exynos_drm_dsi.c. Can we leverage
> that driver instead of adding a new one for the same IP core ?
I thought the same initially, but the PLLOut computation seems
different than the one in the i.MX8MM Reference Manual. I need to find
whether this exynos_dsi is compatible or working on my i.MX8MM
platform and send the next version changes accordingly. thanks.
--
Jagan Teki,
WARNING: multiple messages have this Message-ID (diff)
From: Jagan Teki <jagan@amarulasolutions.com>
To: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Peng Fan <peng.fan@nxp.com>, Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Tomasz Figa <t.figa@samsung.com>, Fancy Fang <chen.fang@nxp.com>,
devicetree <devicetree@vger.kernel.org>,
Francis Laniel <francis.laniel@amarulasolutions.com>,
Matteo Lisi <matteo.lisi@engicam.com>,
Neil Armstrong <narmstrong@baylibre.com>,
Robert Foss <robert.foss@linaro.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
dri-devel <dri-devel@lists.freedesktop.org>,
Andrzej Hajda <a.hajda@samsung.com>,
NXP Linux Team <linux-imx@nxp.com>,
Milco Pratesi <milco.pratesi@engicam.com>,
Anthony Brandon <anthony@amarulasolutions.com>,
linux-phy@lists.infradead.org,
linux-amarula <linux-amarula@amarulasolutions.com>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>
Subject: Re: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver
Date: Thu, 24 Jun 2021 17:41:14 +0530 [thread overview]
Message-ID: <CAMty3ZDmzPha7zdWVHkcuRCjA_LsWqSLyWQMhkOiRMmQmTNXjA@mail.gmail.com> (raw)
In-Reply-To: <YNO0LHNVSWjrh1ZS@pendragon.ideasonboard.com>
Hi Laurent,
On Thu, Jun 24, 2021 at 3:53 AM Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
>
> Hi Jagan,
>
> Thank you for the patch.
>
> On Mon, Jun 21, 2021 at 12:54:17PM +0530, Jagan Teki wrote:
> > Samsung SEC MIPI DSIM Bridge controller is MIPI DSI bridge
> > available in NXP's i.MX8M Mini and Nano Processors.
> >
> > Add bridge driver for it.
> >
> > Cc: Andrzej Hajda <a.hajda@samsung.com>
> > Cc: Neil Armstrong <narmstrong@baylibre.com>
> > Cc: Robert Foss <robert.foss@linaro.org>
> > Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
> > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> > ---
> > drivers/gpu/drm/bridge/Kconfig | 15 +
> > drivers/gpu/drm/bridge/Makefile | 1 +
> > drivers/gpu/drm/bridge/sec-dsim.c | 1535 +++++++++++++++++++++++++++++
> > 3 files changed, 1551 insertions(+)
> > create mode 100644 drivers/gpu/drm/bridge/sec-dsim.c
> >
> > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> > index 19109c0b5481..a183eb165a35 100644
> > --- a/drivers/gpu/drm/bridge/Kconfig
> > +++ b/drivers/gpu/drm/bridge/Kconfig
> > @@ -189,6 +189,21 @@ config DRM_PARADE_PS8640
> > The PS8640 is a high-performance and low-power
> > MIPI DSI to eDP converter
> >
> > +config DRM_SEC_MIPI_DSIM
> > + tristate "Samsung SEC MIPI DSIM Bridge controller"
> > + depends on DRM
> > + depends on COMMON_CLK
> > + depends on OF && HAS_IOMEM
> > + select DRM_KMS_HELPER
> > + select DRM_MIPI_DSI
> > + select DRM_PANEL_BRIDGE
> > + select GENERIC_PHY_MIPI_DPHY
> > + select MFD_SYSCON
> > + select REGMAP_MMIO
> > + help
> > + This enables the Samsung SEC MIPI DSIM Bridge controller as
> > + for example found on NXP's i.MX8M Mini and Nano Processors.
> > +
> > config DRM_SIL_SII8620
> > tristate "Silicon Image SII8620 HDMI/MHL bridge"
> > depends on OF
> > diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
> > index 88e4edf81087..ff802a4ffe65 100644
> > --- a/drivers/gpu/drm/bridge/Makefile
> > +++ b/drivers/gpu/drm/bridge/Makefile
> > @@ -12,6 +12,7 @@ obj-$(CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW) += megachips-stdpxxxx-ge-b850v
> > obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
> > obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
> > obj-$(CONFIG_DRM_PARADE_PS8640) += parade-ps8640.o
> > +obj-$(CONFIG_DRM_SEC_MIPI_DSIM) += sec-dsim.o
> > obj-$(CONFIG_DRM_SIL_SII8620) += sil-sii8620.o
> > obj-$(CONFIG_DRM_SII902X) += sii902x.o
> > obj-$(CONFIG_DRM_SII9234) += sii9234.o
> > diff --git a/drivers/gpu/drm/bridge/sec-dsim.c b/drivers/gpu/drm/bridge/sec-dsim.c
> > new file mode 100644
> > index 000000000000..5b6645bb94e7
> > --- /dev/null
> > +++ b/drivers/gpu/drm/bridge/sec-dsim.c
> > @@ -0,0 +1,1535 @@
> > +// SPDX-License-Identifier: GPL-2.0-only
> > +/*
> > + * Samsung SEC MIPI DSIM Bridge
> > + *
> > + * Copyright (C) 2018 NXP
> > + * Copyright (c) 2014 Samsung Electronics Co., Ltd
> > + * Copyright (C) 2021 Amarula Solutions(India)
> > + *
> > + * Based on the drivers/gpu/drm/exynos/exynos_drm_dsi.c
> > + *
> > + * Authors:
> > + * Tomasz Figa <t.figa@samsung.com>
> > + * Andrzej Hajda <a.hajda@samsung.com>
> > + * Fancy Fang <chen.fang@nxp.com>
> > + * Jagan Teki <jagan@amarulasolutions.com>
> > + */
> > +
> > +#include <asm/unaligned.h>
> > +#include <linux/bitfield.h>
> > +#include <linux/clk.h>
> > +#include <linux/completion.h>
> > +#include <linux/delay.h>
> > +#include <linux/module.h>
> > +#include <linux/of_device.h>
> > +#include <linux/of_graph.h>
> > +#include <linux/phy/phy.h>
> > +#include <linux/regmap.h>
> > +
> > +#include <drm/drm_atomic_helper.h>
> > +#include <drm/drm_bridge.h>
> > +#include <drm/drm_mipi_dsi.h>
> > +#include <drm/drm_panel.h>
> > +#include <drm/drm_of.h>
> > +#include <drm/drm_print.h>
> > +
> > +#include <video/mipi_display.h>
> > +
> > +#define DRIVER_NAME "sec-dsim"
> > +
> > +/* dsim registers */
> > +#define DSIM_VERSION 0x00
> > +#define DSIM_STATUS 0x04
> > +#define DSIM_RGB_STATUS 0x08
> > +#define DSIM_SWRST 0x0c
> > +#define DSIM_CLKCTRL 0x10
> > +#define DSIM_TIMEOUT 0x14
> > +#define DSIM_CONFIG 0x18
> > +#define DSIM_ESCMODE 0x1c
> > +#define DSIM_MDRESOL 0x20
> > +#define DSIM_MVPORCH 0x24
> > +#define DSIM_MHPORCH 0x28
> > +#define DSIM_MSYNC 0x2c
> > +#define DSIM_SDRESOL 0x30
> > +#define DSIM_INTSRC 0x34
> > +#define DSIM_INTMSK 0x38
> > +#define DSIM_PKTHDR 0x3c
> > +#define DSIM_PAYLOAD 0x40
> > +#define DSIM_RXFIFO 0x44
> > +#define DSIM_FIFOTHLD 0x48
> > +#define DSIM_FIFOCTRL 0x4c
> > +#define DSIM_MEMACCHR 0x50
> > +#define DSIM_MULTI_PKT 0x78
> > +#define DSIM_PLLCTRL_1G 0x90
> > +#define DSIM_PLLCTRL 0x94
> > +#define DSIM_PLLCTRL1 0x98
> > +#define DSIM_PLLCTRL2 0x9c
> > +#define DSIM_PLLTMR 0xa0
>
> Looking at the register set, it seems to match the Exynos 5433,
> supported by drivers/gpu/drm/exynos/exynos_drm_dsi.c. Can we leverage
> that driver instead of adding a new one for the same IP core ?
I thought the same initially, but the PLLOut computation seems
different than the one in the i.MX8MM Reference Manual. I need to find
whether this exynos_dsi is compatible or working on my i.MX8MM
platform and send the next version changes accordingly. thanks.
--
Jagan Teki,
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
WARNING: multiple messages have this Message-ID (diff)
From: Jagan Teki <jagan@amarulasolutions.com>
To: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: devicetree <devicetree@vger.kernel.org>,
Peng Fan <peng.fan@nxp.com>,
Francis Laniel <francis.laniel@amarulasolutions.com>,
Matteo Lisi <matteo.lisi@engicam.com>,
Neil Armstrong <narmstrong@baylibre.com>,
linux-amarula <linux-amarula@amarulasolutions.com>,
Tomasz Figa <t.figa@samsung.com>,
linux-kernel <linux-kernel@vger.kernel.org>,
Robert Foss <robert.foss@linaro.org>,
Andrzej Hajda <a.hajda@samsung.com>,
dri-devel <dri-devel@lists.freedesktop.org>,
Milco Pratesi <milco.pratesi@engicam.com>,
Anthony Brandon <anthony@amarulasolutions.com>,
linux-phy@lists.infradead.org, Fancy Fang <chen.fang@nxp.com>,
Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>,
NXP Linux Team <linux-imx@nxp.com>
Subject: Re: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver
Date: Thu, 24 Jun 2021 17:41:14 +0530 [thread overview]
Message-ID: <CAMty3ZDmzPha7zdWVHkcuRCjA_LsWqSLyWQMhkOiRMmQmTNXjA@mail.gmail.com> (raw)
In-Reply-To: <YNO0LHNVSWjrh1ZS@pendragon.ideasonboard.com>
Hi Laurent,
On Thu, Jun 24, 2021 at 3:53 AM Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
>
> Hi Jagan,
>
> Thank you for the patch.
>
> On Mon, Jun 21, 2021 at 12:54:17PM +0530, Jagan Teki wrote:
> > Samsung SEC MIPI DSIM Bridge controller is MIPI DSI bridge
> > available in NXP's i.MX8M Mini and Nano Processors.
> >
> > Add bridge driver for it.
> >
> > Cc: Andrzej Hajda <a.hajda@samsung.com>
> > Cc: Neil Armstrong <narmstrong@baylibre.com>
> > Cc: Robert Foss <robert.foss@linaro.org>
> > Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
> > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> > ---
> > drivers/gpu/drm/bridge/Kconfig | 15 +
> > drivers/gpu/drm/bridge/Makefile | 1 +
> > drivers/gpu/drm/bridge/sec-dsim.c | 1535 +++++++++++++++++++++++++++++
> > 3 files changed, 1551 insertions(+)
> > create mode 100644 drivers/gpu/drm/bridge/sec-dsim.c
> >
> > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> > index 19109c0b5481..a183eb165a35 100644
> > --- a/drivers/gpu/drm/bridge/Kconfig
> > +++ b/drivers/gpu/drm/bridge/Kconfig
> > @@ -189,6 +189,21 @@ config DRM_PARADE_PS8640
> > The PS8640 is a high-performance and low-power
> > MIPI DSI to eDP converter
> >
> > +config DRM_SEC_MIPI_DSIM
> > + tristate "Samsung SEC MIPI DSIM Bridge controller"
> > + depends on DRM
> > + depends on COMMON_CLK
> > + depends on OF && HAS_IOMEM
> > + select DRM_KMS_HELPER
> > + select DRM_MIPI_DSI
> > + select DRM_PANEL_BRIDGE
> > + select GENERIC_PHY_MIPI_DPHY
> > + select MFD_SYSCON
> > + select REGMAP_MMIO
> > + help
> > + This enables the Samsung SEC MIPI DSIM Bridge controller as
> > + for example found on NXP's i.MX8M Mini and Nano Processors.
> > +
> > config DRM_SIL_SII8620
> > tristate "Silicon Image SII8620 HDMI/MHL bridge"
> > depends on OF
> > diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
> > index 88e4edf81087..ff802a4ffe65 100644
> > --- a/drivers/gpu/drm/bridge/Makefile
> > +++ b/drivers/gpu/drm/bridge/Makefile
> > @@ -12,6 +12,7 @@ obj-$(CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW) += megachips-stdpxxxx-ge-b850v
> > obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
> > obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
> > obj-$(CONFIG_DRM_PARADE_PS8640) += parade-ps8640.o
> > +obj-$(CONFIG_DRM_SEC_MIPI_DSIM) += sec-dsim.o
> > obj-$(CONFIG_DRM_SIL_SII8620) += sil-sii8620.o
> > obj-$(CONFIG_DRM_SII902X) += sii902x.o
> > obj-$(CONFIG_DRM_SII9234) += sii9234.o
> > diff --git a/drivers/gpu/drm/bridge/sec-dsim.c b/drivers/gpu/drm/bridge/sec-dsim.c
> > new file mode 100644
> > index 000000000000..5b6645bb94e7
> > --- /dev/null
> > +++ b/drivers/gpu/drm/bridge/sec-dsim.c
> > @@ -0,0 +1,1535 @@
> > +// SPDX-License-Identifier: GPL-2.0-only
> > +/*
> > + * Samsung SEC MIPI DSIM Bridge
> > + *
> > + * Copyright (C) 2018 NXP
> > + * Copyright (c) 2014 Samsung Electronics Co., Ltd
> > + * Copyright (C) 2021 Amarula Solutions(India)
> > + *
> > + * Based on the drivers/gpu/drm/exynos/exynos_drm_dsi.c
> > + *
> > + * Authors:
> > + * Tomasz Figa <t.figa@samsung.com>
> > + * Andrzej Hajda <a.hajda@samsung.com>
> > + * Fancy Fang <chen.fang@nxp.com>
> > + * Jagan Teki <jagan@amarulasolutions.com>
> > + */
> > +
> > +#include <asm/unaligned.h>
> > +#include <linux/bitfield.h>
> > +#include <linux/clk.h>
> > +#include <linux/completion.h>
> > +#include <linux/delay.h>
> > +#include <linux/module.h>
> > +#include <linux/of_device.h>
> > +#include <linux/of_graph.h>
> > +#include <linux/phy/phy.h>
> > +#include <linux/regmap.h>
> > +
> > +#include <drm/drm_atomic_helper.h>
> > +#include <drm/drm_bridge.h>
> > +#include <drm/drm_mipi_dsi.h>
> > +#include <drm/drm_panel.h>
> > +#include <drm/drm_of.h>
> > +#include <drm/drm_print.h>
> > +
> > +#include <video/mipi_display.h>
> > +
> > +#define DRIVER_NAME "sec-dsim"
> > +
> > +/* dsim registers */
> > +#define DSIM_VERSION 0x00
> > +#define DSIM_STATUS 0x04
> > +#define DSIM_RGB_STATUS 0x08
> > +#define DSIM_SWRST 0x0c
> > +#define DSIM_CLKCTRL 0x10
> > +#define DSIM_TIMEOUT 0x14
> > +#define DSIM_CONFIG 0x18
> > +#define DSIM_ESCMODE 0x1c
> > +#define DSIM_MDRESOL 0x20
> > +#define DSIM_MVPORCH 0x24
> > +#define DSIM_MHPORCH 0x28
> > +#define DSIM_MSYNC 0x2c
> > +#define DSIM_SDRESOL 0x30
> > +#define DSIM_INTSRC 0x34
> > +#define DSIM_INTMSK 0x38
> > +#define DSIM_PKTHDR 0x3c
> > +#define DSIM_PAYLOAD 0x40
> > +#define DSIM_RXFIFO 0x44
> > +#define DSIM_FIFOTHLD 0x48
> > +#define DSIM_FIFOCTRL 0x4c
> > +#define DSIM_MEMACCHR 0x50
> > +#define DSIM_MULTI_PKT 0x78
> > +#define DSIM_PLLCTRL_1G 0x90
> > +#define DSIM_PLLCTRL 0x94
> > +#define DSIM_PLLCTRL1 0x98
> > +#define DSIM_PLLCTRL2 0x9c
> > +#define DSIM_PLLTMR 0xa0
>
> Looking at the register set, it seems to match the Exynos 5433,
> supported by drivers/gpu/drm/exynos/exynos_drm_dsi.c. Can we leverage
> that driver instead of adding a new one for the same IP core ?
I thought the same initially, but the PLLOut computation seems
different than the one in the i.MX8MM Reference Manual. I need to find
whether this exynos_dsi is compatible or working on my i.MX8MM
platform and send the next version changes accordingly. thanks.
--
Jagan Teki,
WARNING: multiple messages have this Message-ID (diff)
From: Jagan Teki <jagan@amarulasolutions.com>
To: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Peng Fan <peng.fan@nxp.com>, Shawn Guo <shawnguo@kernel.org>,
Sascha Hauer <s.hauer@pengutronix.de>,
Tomasz Figa <t.figa@samsung.com>, Fancy Fang <chen.fang@nxp.com>,
devicetree <devicetree@vger.kernel.org>,
Francis Laniel <francis.laniel@amarulasolutions.com>,
Matteo Lisi <matteo.lisi@engicam.com>,
Neil Armstrong <narmstrong@baylibre.com>,
Robert Foss <robert.foss@linaro.org>,
linux-kernel <linux-kernel@vger.kernel.org>,
dri-devel <dri-devel@lists.freedesktop.org>,
Andrzej Hajda <a.hajda@samsung.com>,
NXP Linux Team <linux-imx@nxp.com>,
Milco Pratesi <milco.pratesi@engicam.com>,
Anthony Brandon <anthony@amarulasolutions.com>,
linux-phy@lists.infradead.org,
linux-amarula <linux-amarula@amarulasolutions.com>,
linux-arm-kernel <linux-arm-kernel@lists.infradead.org>
Subject: Re: [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver
Date: Thu, 24 Jun 2021 17:41:14 +0530 [thread overview]
Message-ID: <CAMty3ZDmzPha7zdWVHkcuRCjA_LsWqSLyWQMhkOiRMmQmTNXjA@mail.gmail.com> (raw)
In-Reply-To: <YNO0LHNVSWjrh1ZS@pendragon.ideasonboard.com>
Hi Laurent,
On Thu, Jun 24, 2021 at 3:53 AM Laurent Pinchart
<laurent.pinchart@ideasonboard.com> wrote:
>
> Hi Jagan,
>
> Thank you for the patch.
>
> On Mon, Jun 21, 2021 at 12:54:17PM +0530, Jagan Teki wrote:
> > Samsung SEC MIPI DSIM Bridge controller is MIPI DSI bridge
> > available in NXP's i.MX8M Mini and Nano Processors.
> >
> > Add bridge driver for it.
> >
> > Cc: Andrzej Hajda <a.hajda@samsung.com>
> > Cc: Neil Armstrong <narmstrong@baylibre.com>
> > Cc: Robert Foss <robert.foss@linaro.org>
> > Cc: Laurent Pinchart <Laurent.pinchart@ideasonboard.com>
> > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> > ---
> > drivers/gpu/drm/bridge/Kconfig | 15 +
> > drivers/gpu/drm/bridge/Makefile | 1 +
> > drivers/gpu/drm/bridge/sec-dsim.c | 1535 +++++++++++++++++++++++++++++
> > 3 files changed, 1551 insertions(+)
> > create mode 100644 drivers/gpu/drm/bridge/sec-dsim.c
> >
> > diff --git a/drivers/gpu/drm/bridge/Kconfig b/drivers/gpu/drm/bridge/Kconfig
> > index 19109c0b5481..a183eb165a35 100644
> > --- a/drivers/gpu/drm/bridge/Kconfig
> > +++ b/drivers/gpu/drm/bridge/Kconfig
> > @@ -189,6 +189,21 @@ config DRM_PARADE_PS8640
> > The PS8640 is a high-performance and low-power
> > MIPI DSI to eDP converter
> >
> > +config DRM_SEC_MIPI_DSIM
> > + tristate "Samsung SEC MIPI DSIM Bridge controller"
> > + depends on DRM
> > + depends on COMMON_CLK
> > + depends on OF && HAS_IOMEM
> > + select DRM_KMS_HELPER
> > + select DRM_MIPI_DSI
> > + select DRM_PANEL_BRIDGE
> > + select GENERIC_PHY_MIPI_DPHY
> > + select MFD_SYSCON
> > + select REGMAP_MMIO
> > + help
> > + This enables the Samsung SEC MIPI DSIM Bridge controller as
> > + for example found on NXP's i.MX8M Mini and Nano Processors.
> > +
> > config DRM_SIL_SII8620
> > tristate "Silicon Image SII8620 HDMI/MHL bridge"
> > depends on OF
> > diff --git a/drivers/gpu/drm/bridge/Makefile b/drivers/gpu/drm/bridge/Makefile
> > index 88e4edf81087..ff802a4ffe65 100644
> > --- a/drivers/gpu/drm/bridge/Makefile
> > +++ b/drivers/gpu/drm/bridge/Makefile
> > @@ -12,6 +12,7 @@ obj-$(CONFIG_DRM_MEGACHIPS_STDPXXXX_GE_B850V3_FW) += megachips-stdpxxxx-ge-b850v
> > obj-$(CONFIG_DRM_NXP_PTN3460) += nxp-ptn3460.o
> > obj-$(CONFIG_DRM_PARADE_PS8622) += parade-ps8622.o
> > obj-$(CONFIG_DRM_PARADE_PS8640) += parade-ps8640.o
> > +obj-$(CONFIG_DRM_SEC_MIPI_DSIM) += sec-dsim.o
> > obj-$(CONFIG_DRM_SIL_SII8620) += sil-sii8620.o
> > obj-$(CONFIG_DRM_SII902X) += sii902x.o
> > obj-$(CONFIG_DRM_SII9234) += sii9234.o
> > diff --git a/drivers/gpu/drm/bridge/sec-dsim.c b/drivers/gpu/drm/bridge/sec-dsim.c
> > new file mode 100644
> > index 000000000000..5b6645bb94e7
> > --- /dev/null
> > +++ b/drivers/gpu/drm/bridge/sec-dsim.c
> > @@ -0,0 +1,1535 @@
> > +// SPDX-License-Identifier: GPL-2.0-only
> > +/*
> > + * Samsung SEC MIPI DSIM Bridge
> > + *
> > + * Copyright (C) 2018 NXP
> > + * Copyright (c) 2014 Samsung Electronics Co., Ltd
> > + * Copyright (C) 2021 Amarula Solutions(India)
> > + *
> > + * Based on the drivers/gpu/drm/exynos/exynos_drm_dsi.c
> > + *
> > + * Authors:
> > + * Tomasz Figa <t.figa@samsung.com>
> > + * Andrzej Hajda <a.hajda@samsung.com>
> > + * Fancy Fang <chen.fang@nxp.com>
> > + * Jagan Teki <jagan@amarulasolutions.com>
> > + */
> > +
> > +#include <asm/unaligned.h>
> > +#include <linux/bitfield.h>
> > +#include <linux/clk.h>
> > +#include <linux/completion.h>
> > +#include <linux/delay.h>
> > +#include <linux/module.h>
> > +#include <linux/of_device.h>
> > +#include <linux/of_graph.h>
> > +#include <linux/phy/phy.h>
> > +#include <linux/regmap.h>
> > +
> > +#include <drm/drm_atomic_helper.h>
> > +#include <drm/drm_bridge.h>
> > +#include <drm/drm_mipi_dsi.h>
> > +#include <drm/drm_panel.h>
> > +#include <drm/drm_of.h>
> > +#include <drm/drm_print.h>
> > +
> > +#include <video/mipi_display.h>
> > +
> > +#define DRIVER_NAME "sec-dsim"
> > +
> > +/* dsim registers */
> > +#define DSIM_VERSION 0x00
> > +#define DSIM_STATUS 0x04
> > +#define DSIM_RGB_STATUS 0x08
> > +#define DSIM_SWRST 0x0c
> > +#define DSIM_CLKCTRL 0x10
> > +#define DSIM_TIMEOUT 0x14
> > +#define DSIM_CONFIG 0x18
> > +#define DSIM_ESCMODE 0x1c
> > +#define DSIM_MDRESOL 0x20
> > +#define DSIM_MVPORCH 0x24
> > +#define DSIM_MHPORCH 0x28
> > +#define DSIM_MSYNC 0x2c
> > +#define DSIM_SDRESOL 0x30
> > +#define DSIM_INTSRC 0x34
> > +#define DSIM_INTMSK 0x38
> > +#define DSIM_PKTHDR 0x3c
> > +#define DSIM_PAYLOAD 0x40
> > +#define DSIM_RXFIFO 0x44
> > +#define DSIM_FIFOTHLD 0x48
> > +#define DSIM_FIFOCTRL 0x4c
> > +#define DSIM_MEMACCHR 0x50
> > +#define DSIM_MULTI_PKT 0x78
> > +#define DSIM_PLLCTRL_1G 0x90
> > +#define DSIM_PLLCTRL 0x94
> > +#define DSIM_PLLCTRL1 0x98
> > +#define DSIM_PLLCTRL2 0x9c
> > +#define DSIM_PLLTMR 0xa0
>
> Looking at the register set, it seems to match the Exynos 5433,
> supported by drivers/gpu/drm/exynos/exynos_drm_dsi.c. Can we leverage
> that driver instead of adding a new one for the same IP core ?
I thought the same initially, but the PLLOut computation seems
different than the one in the i.MX8MM Reference Manual. I need to find
whether this exynos_dsi is compatible or working on my i.MX8MM
platform and send the next version changes accordingly. thanks.
--
Jagan Teki,
--
linux-phy mailing list
linux-phy@lists.infradead.org
https://lists.infradead.org/mailman/listinfo/linux-phy
next prev parent reply other threads:[~2021-06-24 12:11 UTC|newest]
Thread overview: 144+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-21 7:24 [RFC PATCH 0/9] arm64: imx8mm: Add MIPI DSI support Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 7:24 ` [RFC PATCH 1/9] dt-bindings: display: bridge: Add Samsung SEC MIPI DSIM bindings Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 17:40 ` Rob Herring
2021-06-21 17:40 ` Rob Herring
2021-06-21 17:40 ` Rob Herring
2021-06-21 17:40 ` Rob Herring
2021-06-21 17:55 ` Laurent Pinchart
2021-06-21 17:55 ` Laurent Pinchart
2021-06-21 17:55 ` Laurent Pinchart
2021-06-21 17:55 ` Laurent Pinchart
2021-06-23 15:44 ` Jagan Teki
2021-06-23 15:44 ` Jagan Teki
2021-06-23 15:44 ` Jagan Teki
2021-06-23 15:44 ` Jagan Teki
2021-06-21 7:24 ` [RFC PATCH 2/9] drm: bridge: Add Samsung SEC MIPI DSIM bridge driver Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-23 22:22 ` Laurent Pinchart
2021-06-23 22:22 ` Laurent Pinchart
2021-06-23 22:22 ` Laurent Pinchart
2021-06-23 22:22 ` Laurent Pinchart
2021-06-24 2:48 ` Fabio Estevam
2021-06-24 2:48 ` Fabio Estevam
2021-06-24 2:48 ` Fabio Estevam
2021-06-24 2:48 ` Fabio Estevam
2021-06-24 8:30 ` Krzysztof Kozlowski
2021-06-24 8:30 ` Krzysztof Kozlowski
2021-06-24 8:30 ` Krzysztof Kozlowski
2021-06-24 8:30 ` Krzysztof Kozlowski
2021-06-28 8:19 ` Frieder Schrempf
2021-06-28 8:19 ` Frieder Schrempf
2021-06-28 8:19 ` Frieder Schrempf
2021-06-28 8:19 ` Frieder Schrempf
2021-06-30 10:21 ` Jagan Teki
2021-06-30 10:21 ` Jagan Teki
2021-06-30 10:21 ` Jagan Teki
2021-06-30 10:21 ` Jagan Teki
2021-06-24 12:12 ` Jagan Teki
2021-06-24 12:12 ` Jagan Teki
2021-06-24 12:12 ` Jagan Teki
2021-06-24 12:12 ` Jagan Teki
2021-06-24 12:17 ` Laurent Pinchart
2021-06-24 12:17 ` Laurent Pinchart
2021-06-24 12:17 ` Laurent Pinchart
2021-06-24 12:17 ` Laurent Pinchart
2021-06-24 12:32 ` Jagan Teki
2021-06-24 12:32 ` Jagan Teki
2021-06-24 12:32 ` Jagan Teki
2021-06-24 12:32 ` Jagan Teki
2021-06-24 12:46 ` Fabio Estevam
2021-06-24 12:46 ` Fabio Estevam
2021-06-24 12:46 ` Fabio Estevam
2021-06-24 12:46 ` Fabio Estevam
2021-06-24 12:46 ` Laurent Pinchart
2021-06-24 12:46 ` Laurent Pinchart
2021-06-24 12:46 ` Laurent Pinchart
2021-06-24 12:46 ` Laurent Pinchart
2021-06-25 8:19 ` Jagan Teki
2021-06-25 8:19 ` Jagan Teki
2021-06-25 8:19 ` Jagan Teki
2021-06-25 8:19 ` Jagan Teki
2021-06-25 9:21 ` Krzysztof Kozlowski
2021-06-25 9:21 ` Krzysztof Kozlowski
2021-06-25 9:21 ` Krzysztof Kozlowski
2021-06-25 9:21 ` Krzysztof Kozlowski
2021-06-25 10:08 ` Jagan Teki
2021-06-25 10:08 ` Jagan Teki
2021-06-25 10:08 ` Jagan Teki
2021-06-25 10:08 ` Jagan Teki
2021-06-25 10:27 ` Krzysztof Kozlowski
2021-06-25 10:27 ` Krzysztof Kozlowski
2021-06-25 10:27 ` Krzysztof Kozlowski
2021-06-25 10:27 ` Krzysztof Kozlowski
2021-06-24 12:11 ` Jagan Teki [this message]
2021-06-24 12:11 ` Jagan Teki
2021-06-24 12:11 ` Jagan Teki
2021-06-24 12:11 ` Jagan Teki
2021-06-21 7:24 ` [RFC PATCH 3/9] dt-bindings: phy: Add SEC DSIM DPHY bindings Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 17:40 ` Rob Herring
2021-06-21 17:40 ` Rob Herring
2021-06-21 17:40 ` Rob Herring
2021-06-21 17:40 ` Rob Herring
2021-06-22 16:56 ` Rob Herring
2021-06-22 16:56 ` Rob Herring
2021-06-22 16:56 ` Rob Herring
2021-06-22 16:56 ` Rob Herring
2021-06-21 7:24 ` [RFC PATCH 4/9] phy: samsung: Add SEC DSIM DPHY driver Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-24 8:45 ` Krzysztof Kozlowski
2021-06-24 8:45 ` Krzysztof Kozlowski
2021-06-24 8:45 ` Krzysztof Kozlowski
2021-06-24 8:45 ` Krzysztof Kozlowski
2021-06-21 7:24 ` [RFC PATCH 5/9] soc: imx8mm: blk-ctl: Add MIPI DPHY reset enable Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 7:24 ` [RFC PATCH 6/9] arm64: dts: imx8mm: Add display mix blk ctl Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 7:24 ` [RFC PATCH 7/9] arm64: dts: imx8mm: Add eLCDIF node support Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-22 3:09 ` Adam Ford
2021-06-22 3:09 ` Adam Ford
2021-06-22 3:09 ` Adam Ford
2021-06-22 3:09 ` Adam Ford
2021-06-22 13:59 ` Jagan Teki
2021-06-22 13:59 ` Jagan Teki
2021-06-22 13:59 ` Jagan Teki
2021-06-22 13:59 ` Jagan Teki
2021-06-21 7:24 ` [RFC PATCH 8/9] arm64: dts: imx8mm: Add MIPI DSI pipeline Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-22 3:02 ` Adam Ford
2021-06-22 3:02 ` Adam Ford
2021-06-22 3:02 ` Adam Ford
2021-06-22 3:02 ` Adam Ford
2021-06-21 7:24 ` [RFC PATCH 9/9] arm64: dts: imx8mm-icore: Enable LVDS panel for EDIMM2.2 Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-21 7:24 ` Jagan Teki
2021-06-29 7:10 ` [RFC PATCH 0/9] arm64: imx8mm: Add MIPI DSI support Peng Fan (OSS)
2021-06-29 7:10 ` Peng Fan (OSS)
2021-06-29 7:10 ` Peng Fan (OSS)
2021-06-29 7:10 ` Peng Fan (OSS)
2021-06-30 12:24 ` Jagan Teki
2021-06-30 12:24 ` Jagan Teki
2021-06-30 12:24 ` Jagan Teki
2021-06-30 12:24 ` Jagan Teki
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=CAMty3ZDmzPha7zdWVHkcuRCjA_LsWqSLyWQMhkOiRMmQmTNXjA@mail.gmail.com \
--to=jagan@amarulasolutions.com \
--cc=a.hajda@samsung.com \
--cc=anthony@amarulasolutions.com \
--cc=chen.fang@nxp.com \
--cc=devicetree@vger.kernel.org \
--cc=dri-devel@lists.freedesktop.org \
--cc=francis.laniel@amarulasolutions.com \
--cc=laurent.pinchart@ideasonboard.com \
--cc=linux-amarula@amarulasolutions.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-imx@nxp.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-phy@lists.infradead.org \
--cc=matteo.lisi@engicam.com \
--cc=milco.pratesi@engicam.com \
--cc=narmstrong@baylibre.com \
--cc=peng.fan@nxp.com \
--cc=robert.foss@linaro.org \
--cc=s.hauer@pengutronix.de \
--cc=shawnguo@kernel.org \
--cc=t.figa@samsung.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.