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From: Jagan Teki <jagan@amarulasolutions.com>
To: u-boot@lists.denx.de
Subject: [PATCH v11 17/18] configs: fu540: Add config options for U-Boot SPL
Date: Tue, 19 May 2020 21:43:17 +0530	[thread overview]
Message-ID: <CAMty3ZDqyKghE3NdTRqq5m8wih-v0u8F3W-GTn8Ncmi8Zbs=MA@mail.gmail.com> (raw)
In-Reply-To: <20200519070346.24479-18-pragnesh.patel@sifive.com>

On Tue, May 19, 2020 at 12:35 PM Pragnesh Patel
<pragnesh.patel@sifive.com> wrote:
>
> With sifive_fu540_defconfig:
>
> User can use FSBL or u-boot-spl.bin anyone at a time.
>
> For FSBL,
> fsbl->fw_payload.bin (opensbi + U-Boot)
>
> For u-boot-spl.bin,
> u-boot-spl.bin->FIT image (opensbi + U-Boot proper + dtb)
>
> U-Boot SPL will be loaded by ZSBL from SD card (replace fsbl.bin with
> u-boot-spl.bin) and runs in L2 LIM in machine mode and then load FIT
> image u-boot.itb from SD card into RAM.
>
> U-Boot SPL expects u-boot.itb FIT image at the starting of SD card sector
> number (0x822) of GUID type "2E54B353-1271-4842-806F-E436D6AF6985"
>
> Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com>
> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
> Reviewed-by: Jagan Teki <jagan@amarulasolutions.com>
> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
> ---
>  configs/sifive_fu540_defconfig |   8 ++
>  doc/board/sifive/fu540.rst     | 131 +++++++++++++++++++++++++++++++++
>  2 files changed, 139 insertions(+)
>
> diff --git a/configs/sifive_fu540_defconfig b/configs/sifive_fu540_defconfig
> index f805aacc7a..8d412f8d6a 100644
> --- a/configs/sifive_fu540_defconfig
> +++ b/configs/sifive_fu540_defconfig
> @@ -1,6 +1,11 @@
>  CONFIG_RISCV=y
> +CONFIG_SPL_GPIO_SUPPORT=y
> +CONFIG_SYS_MALLOC_F_LEN=0x3000
>  CONFIG_ENV_SIZE=0x20000
> +CONFIG_SPL_MMC_SUPPORT=y
>  CONFIG_NR_DRAM_BANKS=1
> +CONFIG_SPL=y
> +CONFIG_SPL_SPI_SUPPORT=y
>  CONFIG_TARGET_SIFIVE_FU540=y
>  CONFIG_ARCH_RV64I=y
>  CONFIG_RISCV_SMODE=y
> @@ -9,7 +14,10 @@ CONFIG_FIT=y
>  CONFIG_MISC_INIT_R=y
>  CONFIG_DISPLAY_CPUINFO=y
>  CONFIG_DISPLAY_BOARDINFO=y
> +CONFIG_SPL_SEPARATE_BSS=y
> +CONFIG_SPL_YMODEM_SUPPORT=y
>  CONFIG_OF_BOARD_FIXUP=y
>  CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00"
>  CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> +CONFIG_SPL_CLK=y
>  CONFIG_DM_MTD=y
> diff --git a/doc/board/sifive/fu540.rst b/doc/board/sifive/fu540.rst
> index 610ba87074..766629ebae 100644
> --- a/doc/board/sifive/fu540.rst
> +++ b/doc/board/sifive/fu540.rst
> @@ -31,6 +31,9 @@ TODO:
>          stdout-path = "/soc/serial at 10010000:115200";
>     };
>
> +Booting from MMC using FSBL
> +---------------------------
> +
>  Building
>  --------
>
> @@ -421,3 +424,131 @@ as well.
>
>     Please press Enter to activate this console.
>     / #
> +
> +Booting from MMC using U-Boot SPL
> +---------------------------------
> +
> +Building
> +--------
> +
> +Before building U-Boot SPL, OpenSBI must be built first. OpenSBI can be
> +cloned and built for FU540 as below:
> +
> +.. code-block:: console
> +
> +       git clone https://github.com/riscv/opensbi.git
> +       cd opensbi
> +       make PLATFORM=generic FW_DYNAMIC=y

Look like explicit FW_DYNAMIC=y is optional.

> +
> +Copy OpenSBI FW_DYNAMIC image
> +(build/platform/generic/firmware/fw_dynamic.bin) into U-Boot
> +root directory
> +
> +.. code-block:: console
> +
> +       cp build/platform/generic/firmware/fw_dynamic.bin <u-boot-dir>

No copy needed here.

export OPENSBI=build/platform/generic/firmware/fw_dynamic.bin

  reply	other threads:[~2020-05-19 16:13 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-19  7:03 [PATCH v11 00/18] RISC-V SiFive FU540 support SPL Pragnesh Patel
2020-05-19  7:03 ` [PATCH v11 01/18] misc: add driver for the SiFive otp controller Pragnesh Patel
2020-05-19 18:38   ` Jagan Teki
2020-05-19  7:03 ` [PATCH v11 02/18] riscv: sifive: fu540: Use OTP DM driver for serial environment variable Pragnesh Patel
2020-05-19 18:40   ` Jagan Teki
2020-05-19  7:03 ` [PATCH v11 03/18] riscv: Add _image_binary_end for SPL Pragnesh Patel
2020-05-19 18:42   ` Jagan Teki
2020-05-19  7:03 ` [PATCH v11 04/18] lib: Makefile: build crc7.c when CONFIG_MMC_SPI Pragnesh Patel
2020-05-19 18:43   ` Jagan Teki
2020-05-19  7:03 ` [PATCH v11 05/18] riscv: sifive: dts: fu540: Add board -u-boot.dtsi files Pragnesh Patel
2020-05-19 18:45   ` Jagan Teki
2020-05-19  7:03 ` [PATCH v11 06/18] sifive: fu540: add ddr driver Pragnesh Patel
2020-05-19  8:42   ` Bin Meng
2020-05-19  7:03 ` [PATCH v11 07/18] sifive: dts: fu540: Add DDR controller and phy register settings Pragnesh Patel
2020-05-19 18:47   ` Jagan Teki
2020-05-19  7:03 ` [PATCH v11 08/18] riscv: sifive: dts: fu540: add U-Boot dmc node Pragnesh Patel
2020-05-19 18:48   ` Jagan Teki
2020-05-19  7:03 ` [PATCH v11 09/18] clk: sifive: fu540-prci: Add clock enable and disable ops Pragnesh Patel
2020-05-19 18:50   ` Jagan Teki
2020-05-19  7:03 ` [PATCH v11 10/18] clk: sifive: fu540-prci: Add ddr clock initialization Pragnesh Patel
2020-05-19 18:51   ` Jagan Teki
2020-05-19  7:03 ` [PATCH v11 11/18] clk: sifive: fu540-prci: Release ethernet clock reset Pragnesh Patel
2020-05-19 16:17   ` Jagan Teki
2020-05-19  7:03 ` [PATCH v11 12/18] riscv: dts: sifive: Sync hifive-unleashed-a00 dts from linux Pragnesh Patel
2020-05-19 18:52   ` Jagan Teki
2020-05-19  7:03 ` [PATCH v11 13/18] riscv: cpu: fu540: Add support for cpu fu540 Pragnesh Patel
2020-05-19 18:54   ` Jagan Teki
2020-05-19  7:03 ` [PATCH v11 14/18] riscv: sifive: fu540: add SPL configuration Pragnesh Patel
2020-05-19 18:55   ` Jagan Teki
2020-05-19  7:03 ` [PATCH v11 15/18] sifive: fu540: Add sample SD gpt partition layout Pragnesh Patel
2020-05-20 13:59   ` Bin Meng
2020-05-20 14:20     ` Pragnesh Patel
2020-05-19  7:03 ` [PATCH v11 16/18] sifive: fu540: Add U-Boot proper sector start Pragnesh Patel
2020-05-19  7:03 ` [PATCH v11 17/18] configs: fu540: Add config options for U-Boot SPL Pragnesh Patel
2020-05-19 16:13   ` Jagan Teki [this message]
2020-05-20  7:30     ` Pragnesh Patel
2020-05-19  7:03 ` [PATCH v11 18/18] doc: sifive: fu540: Add description for OpenSBI generic platform Pragnesh Patel
2020-05-19 18:56   ` Jagan Teki
     [not found] ` <CAEUhbmWJHmLw0nZY1nkq8A7rZ4oe4tPzaVjzM1SoA1VUwtNoXw@mail.gmail.com>
     [not found]   ` <752D002CFF5D0F4FA35C0100F1D73F3FA470B54D@ATCPCS16.andestech.com>
2020-05-20  3:07     ` [PATCH v11 00/18] RISC-V SiFive FU540 support SPL Rick Chen
2020-05-20  6:06       ` Sean Anderson
2020-05-20  6:32         ` Bin Meng
2020-05-20  6:38           ` Sean Anderson
2020-05-20  6:46             ` Bin Meng
2020-05-20  7:29       ` Pragnesh Patel
2020-05-20  7:36         ` Bin Meng
2020-05-20  7:41           ` Pragnesh Patel
2020-05-20 10:24             ` Bin Meng
2020-05-20 11:52               ` Pragnesh Patel
2020-05-20 13:45                 ` Bin Meng
2020-05-20 13:55                   ` Pragnesh Patel

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