[RFC/PATCH] ARM: shmobile: Consolidate the pm code for R-Car Gen2

[RFC/PATCH] ARM: shmobile: Consolidate the pm code for R-Car Gen2

[Gaku Inami]

The pm code for R-Car Gen2 is scatterd in each SoC. These files
(pm-r8a7790.c/pm-r8a7791.c) have some overlap code. This change
consolidate the pm code for R-Car Gen2 into one.

Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
---

Based on : renesas-devel-20150312v2-v4.0-rc3

 arch/arm/mach-shmobile/Makefile       |    5 +-
 arch/arm/mach-shmobile/pm-r8a7790.c   |   82 ------------------------
 arch/arm/mach-shmobile/pm-r8a7791.c   |   73 ---------------------
 arch/arm/mach-shmobile/pm-rcar-gen2.c |  114 +++++++++++++++++++++++++++++++++
 arch/arm/mach-shmobile/r8a7790.h      |    1 -
 arch/arm/mach-shmobile/r8a7791.h      |    1 -
 arch/arm/mach-shmobile/rcar-gen2.h    |    1 +
 arch/arm/mach-shmobile/smp-r8a7790.c  |    3 +-
 arch/arm/mach-shmobile/smp-r8a7791.c  |    2 +-
 9 files changed, 121 insertions(+), 161 deletions(-)
 delete mode 100644 arch/arm/mach-shmobile/pm-r8a7790.c
 delete mode 100644 arch/arm/mach-shmobile/pm-r8a7791.c
 create mode 100644 arch/arm/mach-shmobile/pm-rcar-gen2.c

diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 9e9d678..56554e0 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -11,8 +11,8 @@ obj-$(CONFIG_ARCH_R8A73A4)	+= setup-r8a73a4.o
 obj-$(CONFIG_ARCH_R8A7740)	+= setup-r8a7740.o pm-r8a7740.o
 obj-$(CONFIG_ARCH_R8A7778)	+= setup-r8a7778.o
 obj-$(CONFIG_ARCH_R8A7779)	+= setup-r8a7779.o pm-r8a7779.o
-obj-$(CONFIG_ARCH_R8A7790)	+= setup-r8a7790.o pm-r8a7790.o
-obj-$(CONFIG_ARCH_R8A7791)	+= setup-r8a7791.o pm-r8a7791.o
+obj-$(CONFIG_ARCH_R8A7790)	+= setup-r8a7790.o
+obj-$(CONFIG_ARCH_R8A7791)	+= setup-r8a7791.o
 obj-$(CONFIG_ARCH_R8A7794)	+= setup-r8a7794.o
 obj-$(CONFIG_ARCH_EMEV2)	+= setup-emev2.o
 obj-$(CONFIG_ARCH_R7S72100)	+= setup-r7s72100.o
@@ -49,6 +49,7 @@ obj-$(CONFIG_CPU_IDLE)		+= cpuidle.o
 obj-$(CONFIG_CPU_FREQ)		+= cpufreq.o
 obj-$(CONFIG_PM_RCAR)		+= pm-rcar.o
 obj-$(CONFIG_PM_RMOBILE)	+= pm-rmobile.o
+obj-$(CONFIG_ARCH_RCAR_GEN2)	+= pm-rcar-gen2.o
 
 # Board objects
 ifdef CONFIG_ARCH_SHMOBILE_MULTI
diff --git a/arch/arm/mach-shmobile/pm-r8a7790.c b/arch/arm/mach-shmobile/pm-r8a7790.c
deleted file mode 100644
index 23b61f1..0000000
--- a/arch/arm/mach-shmobile/pm-r8a7790.c
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * r8a7790 Power management support
- *
- * Copyright (C) 2013  Renesas Electronics Corporation
- * Copyright (C) 2011  Renesas Solutions Corp.
- * Copyright (C) 2011  Magnus Damm
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#include <linux/kernel.h>
-#include <linux/smp.h>
-#include <asm/io.h>
-#include "common.h"
-#include "pm-rcar.h"
-#include "r8a7790.h"
-
-/* RST */
-#define RST		0xe6160000
-#define CA15BAR		0x0020
-#define CA7BAR		0x0030
-#define CA15RESCNT	0x0040
-#define CA7RESCNT	0x0044
-
-/* On-chip RAM */
-#define MERAM          0xe8080000
-
-/* SYSC */
-#define SYSCIER 0x0c
-#define SYSCIMR 0x10
-
-#if defined(CONFIG_SMP)
-
-static void __init r8a7790_sysc_init(void)
-{
-	void __iomem *base = rcar_sysc_init(0xe6180000);
-
-	/* enable all interrupt sources, but do not use interrupt handler */
-	iowrite32(0x013111ef, base + SYSCIER);
-	iowrite32(0, base + SYSCIMR);
-}
-
-#else /* CONFIG_SMP */
-
-static inline void r8a7790_sysc_init(void) {}
-
-#endif /* CONFIG_SMP */
-
-void __init r8a7790_pm_init(void)
-{
-	void __iomem *p;
-	u32 bar;
-	static int once;
-
-	if (once++)
-		return;
-
-	/* MERAM for jump stub, because BAR requires 256KB aligned address */
-	p = ioremap_nocache(MERAM, shmobile_boot_size);
-	memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
-	iounmap(p);
-
-	/* setup reset vectors */
-	p = ioremap_nocache(RST, 0x63);
-	bar = (MERAM >> 8) & 0xfffffc00;
-	writel_relaxed(bar, p + CA15BAR);
-	writel_relaxed(bar, p + CA7BAR);
-	writel_relaxed(bar | 0x10, p + CA15BAR);
-	writel_relaxed(bar | 0x10, p + CA7BAR);
-
-	/* de-assert reset for all CPUs */
-	writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
-		       p + CA15RESCNT);
-	writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) | 0x5a5a0000,
-		       p + CA7RESCNT);
-	iounmap(p);
-
-	r8a7790_sysc_init();
-	shmobile_smp_apmu_suspend_init();
-}
diff --git a/arch/arm/mach-shmobile/pm-r8a7791.c b/arch/arm/mach-shmobile/pm-r8a7791.c
deleted file mode 100644
index f7cfb3b..0000000
--- a/arch/arm/mach-shmobile/pm-r8a7791.c
+++ /dev/null
@@ -1,73 +0,0 @@
-/*
- * r8a7791 Power management support
- *
- * Copyright (C) 2014  Renesas Electronics Corporation
- * Copyright (C) 2011  Renesas Solutions Corp.
- * Copyright (C) 2011  Magnus Damm
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License.  See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#include <linux/kernel.h>
-#include <linux/smp.h>
-#include <asm/io.h>
-#include "common.h"
-#include "pm-rcar.h"
-#include "r8a7791.h"
-
-#define RST		0xe6160000
-#define CA15BAR		0x0020
-#define CA15RESCNT	0x0040
-#define RAM		0xe6300000
-
-/* SYSC */
-#define SYSCIER 0x0c
-#define SYSCIMR 0x10
-
-#if defined(CONFIG_SMP)
-
-static void __init r8a7791_sysc_init(void)
-{
-	void __iomem *base = rcar_sysc_init(0xe6180000);
-
-	/* enable all interrupt sources, but do not use interrupt handler */
-	iowrite32(0x00111003, base + SYSCIER);
-	iowrite32(0, base + SYSCIMR);
-}
-
-#else /* CONFIG_SMP */
-
-static inline void r8a7791_sysc_init(void) {}
-
-#endif /* CONFIG_SMP */
-
-void __init r8a7791_pm_init(void)
-{
-	void __iomem *p;
-	u32 bar;
-	static int once;
-
-	if (once++)
-		return;
-
-	/* RAM for jump stub, because BAR requires 256KB aligned address */
-	p = ioremap_nocache(RAM, shmobile_boot_size);
-	memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
-	iounmap(p);
-
-	/* setup reset vectors */
-	p = ioremap_nocache(RST, 0x63);
-	bar = (RAM >> 8) & 0xfffffc00;
-	writel_relaxed(bar, p + CA15BAR);
-	writel_relaxed(bar | 0x10, p + CA15BAR);
-
-	/* enable clocks to all CPUs */
-	writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) | 0xa5a50000,
-		       p + CA15RESCNT);
-	iounmap(p);
-
-	r8a7791_sysc_init();
-	shmobile_smp_apmu_suspend_init();
-}
diff --git a/arch/arm/mach-shmobile/pm-rcar-gen2.c b/arch/arm/mach-shmobile/pm-rcar-gen2.c
new file mode 100644
index 0000000..4585938
--- /dev/null
+++ b/arch/arm/mach-shmobile/pm-rcar-gen2.c
@@ -0,0 +1,114 @@
+/*
+ * R-Car Generation 2 Power management support
+ *
+ * Copyright (C) 2015  Renesas Electronics Corporation
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+
+#include <linux/kernel.h>
+#include <linux/of.h>
+#include <linux/smp.h>
+#include <asm/io.h>
+#include "common.h"
+#include "pm-rcar.h"
+#include "rcar-gen2.h"
+
+/* RST */
+#define RST		0xe6160000
+#define CA15BAR		0x0020
+#define CA7BAR		0x0030
+#define CA15RESCNT	0x0040
+#define CA7RESCNT	0x0044
+
+/* On-chip RAM */
+#define MERAM		0xe8080000
+#define RAM		0xe6300000
+
+/* SYSC */
+#define SYSCIER 0x0c
+#define SYSCIMR 0x10
+
+#if defined(CONFIG_SMP)
+
+static void __init rcar_gen2_sysc_init(void)
+{
+	u32 val;
+	void __iomem *base = rcar_sysc_init(0xe6180000);
+
+	if (of_machine_is_compatible("renesas,r8a7790"))
+		val = 0x013111ef;
+	else if (of_machine_is_compatible("renesas,r8a7791"))
+		val = 0x00111003;
+
+	/* enable all interrupt sources, but do not use interrupt handler */
+	iowrite32(val, base + SYSCIER);
+	iowrite32(0, base + SYSCIMR);
+}
+
+#else /* CONFIG_SMP */
+
+static inline void rcar_gen2_sysc_init(void) {}
+
+#endif /* CONFIG_SMP */
+
+void __init rcar_gen2_pm_init(void)
+{
+	void __iomem *p;
+	u32 bar;
+	static int once;
+	struct device_node *np, *cpus;
+	bool is_a7 = false;
+	bool is_a15 = false;
+	phys_addr_t boot_vector_addr = 0;
+
+	if (once++)
+		return;
+
+	cpus = of_find_node_by_path("/cpus");
+	if (!cpus)
+		return;
+
+	for_each_child_of_node(cpus, np) {
+		if (of_device_is_compatible(np, "arm,cortex-a15"))
+			is_a15 = true;
+		else if (of_device_is_compatible(np, "arm,cortex-a7"))
+			is_a7 = true;
+	}
+
+	if (of_machine_is_compatible("renesas,r8a7790"))
+		boot_vector_addr = MERAM;
+	else
+		boot_vector_addr = RAM;
+
+	/* RAM for jump stub, because BAR requires 256KB aligned address */
+	p = ioremap_nocache(boot_vector_addr, shmobile_boot_size);
+	memcpy_toio(p, shmobile_boot_vector, shmobile_boot_size);
+	iounmap(p);
+
+	/* setup reset vectors */
+	p = ioremap_nocache(RST, 0x63);
+	bar = (boot_vector_addr >> 8) & 0xfffffc00;
+	if (is_a15) {
+		writel_relaxed(bar, p + CA15BAR);
+		writel_relaxed(bar | 0x10, p + CA15BAR);
+
+		/* de-assert reset for CA15 CPUs */
+		writel_relaxed((readl_relaxed(p + CA15RESCNT) & ~0x0f) |
+				0xa5a50000, p + CA15RESCNT);
+	}
+	if (is_a7) {
+		writel_relaxed(bar, p + CA7BAR);
+		writel_relaxed(bar | 0x10, p + CA7BAR);
+
+		/* de-assert reset for CA7 CPUs */
+		writel_relaxed((readl_relaxed(p + CA7RESCNT) & ~0x0f) |
+				0x5a5a0000, p + CA7RESCNT);
+	}
+	iounmap(p);
+
+	rcar_gen2_sysc_init();
+	shmobile_smp_apmu_suspend_init();
+}
diff --git a/arch/arm/mach-shmobile/r8a7790.h b/arch/arm/mach-shmobile/r8a7790.h
index bf73a85..1a46d02 100644
--- a/arch/arm/mach-shmobile/r8a7790.h
+++ b/arch/arm/mach-shmobile/r8a7790.h
@@ -1,7 +1,6 @@
 #ifndef __ASM_R8A7790_H__
 #define __ASM_R8A7790_H__
 
-void r8a7790_pm_init(void);
 extern struct smp_operations r8a7790_smp_ops;
 
 #endif /* __ASM_R8A7790_H__ */
diff --git a/arch/arm/mach-shmobile/r8a7791.h b/arch/arm/mach-shmobile/r8a7791.h
index 6cf11eb..7ca0b7d 100644
--- a/arch/arm/mach-shmobile/r8a7791.h
+++ b/arch/arm/mach-shmobile/r8a7791.h
@@ -1,7 +1,6 @@
 #ifndef __ASM_R8A7791_H__
 #define __ASM_R8A7791_H__
 
-void r8a7791_pm_init(void);
 extern struct smp_operations r8a7791_smp_ops;
 
 #endif /* __ASM_R8A7791_H__ */
diff --git a/arch/arm/mach-shmobile/rcar-gen2.h b/arch/arm/mach-shmobile/rcar-gen2.h
index ce53cb5..8a66b4a 100644
--- a/arch/arm/mach-shmobile/rcar-gen2.h
+++ b/arch/arm/mach-shmobile/rcar-gen2.h
@@ -5,5 +5,6 @@ void rcar_gen2_timer_init(void);
 #define MD(nr) BIT(nr)
 u32 rcar_gen2_read_mode_pins(void);
 void rcar_gen2_reserve(void);
+void rcar_gen2_pm_init(void);
 
 #endif /* __ASM_RCAR_GEN2_H__ */
diff --git a/arch/arm/mach-shmobile/smp-r8a7790.c b/arch/arm/mach-shmobile/smp-r8a7790.c
index a5bef87..930f45c 100644
--- a/arch/arm/mach-shmobile/smp-r8a7790.c
+++ b/arch/arm/mach-shmobile/smp-r8a7790.c
@@ -23,6 +23,7 @@
 #include "common.h"
 #include "platsmp-apmu.h"
 #include "pm-rcar.h"
+#include "rcar-gen2.h"
 #include "r8a7790.h"
 
 static struct rcar_sysc_ch r8a7790_ca15_scu = {
@@ -54,7 +55,7 @@ static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus)
 				       ARRAY_SIZE(r8a7790_apmu_config));
 
 	/* turn on power to SCU */
-	r8a7790_pm_init();
+	rcar_gen2_pm_init();
 	rcar_sysc_power_up(&r8a7790_ca15_scu);
 	rcar_sysc_power_up(&r8a7790_ca7_scu);
 }
diff --git a/arch/arm/mach-shmobile/smp-r8a7791.c b/arch/arm/mach-shmobile/smp-r8a7791.c
index de1d92d..5e2d1db 100644
--- a/arch/arm/mach-shmobile/smp-r8a7791.c
+++ b/arch/arm/mach-shmobile/smp-r8a7791.c
@@ -39,7 +39,7 @@ static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus)
 				       r8a7791_apmu_config,
 				       ARRAY_SIZE(r8a7791_apmu_config));
 
-	r8a7791_pm_init();
+	rcar_gen2_pm_init();
 }
 
 static int r8a7791_smp_boot_secondary(unsigned int cpu,
-- 
1.7.9.5

Re: [RFC/PATCH] ARM: shmobile: Consolidate the pm code for R-Car Gen2

[Geert Uytterhoeven]

Hi Inami-san,

On Fri, Mar 13, 2015 at 9:40 AM, Gaku Inami
<gaku.inami.xw@bp.renesas.com> wrote:
> The pm code for R-Car Gen2 is scatterd in each SoC. These files
> (pm-r8a7790.c/pm-r8a7791.c) have some overlap code. This change
> consolidate the pm code for R-Car Gen2 into one.

Thanks for your patch, it works fine on Koelsch!

> --- /dev/null
> +++ b/arch/arm/mach-shmobile/pm-rcar-gen2.c
> @@ -0,0 +1,114 @@
> +/*
> + * R-Car Generation 2 Power management support
> + *
> + * Copyright (C) 2015  Renesas Electronics Corporation

Please retain the original copyrights from pm-r8a779[01].c here, too.

> +#if defined(CONFIG_SMP)
> +
> +static void __init rcar_gen2_sysc_init(void)
> +{
> +       u32 val;
> +       void __iomem *base = rcar_sysc_init(0xe6180000);
> +
> +       if (of_machine_is_compatible("renesas,r8a7790"))
> +               val = 0x013111ef;
> +       else if (of_machine_is_compatible("renesas,r8a7791"))
> +               val = 0x00111003;

As you do SoC OF matching in rcar_gen2_pm_init() too, perhaps "val" should
be passed from that function? That would save a few of_machine_is_compatible()
lookups.

> +
> +       /* enable all interrupt sources, but do not use interrupt handler */
> +       iowrite32(val, base + SYSCIER);
> +       iowrite32(0, base + SYSCIMR);
> +}
> +
> +#else /* CONFIG_SMP */
> +
> +static inline void rcar_gen2_sysc_init(void) {}
> +
> +#endif /* CONFIG_SMP */
> +
> +void __init rcar_gen2_pm_init(void)
> +{
> +       void __iomem *p;
> +       u32 bar;
> +       static int once;
> +       struct device_node *np, *cpus;
> +       bool is_a7 = false;
> +       bool is_a15 = false;

I would name these "has_a7" and "has_a15", as both can be true.

> +       phys_addr_t boot_vector_addr = 0;
> +
> +       if (once++)
> +               return;
> +
> +       cpus = of_find_node_by_path("/cpus");
> +       if (!cpus)
> +               return;
> +
> +       for_each_child_of_node(cpus, np) {
> +               if (of_device_is_compatible(np, "arm,cortex-a15"))
> +                       is_a15 = true;
> +               else if (of_device_is_compatible(np, "arm,cortex-a7"))
> +                       is_a7 = true;
> +       }
> +
> +       if (of_machine_is_compatible("renesas,r8a7790"))
> +               boot_vector_addr = MERAM;
> +       else
> +               boot_vector_addr = RAM;

You could store the SYSCIER value in a variable here:

        if (of_machine_is_compatible("renesas,r8a7790")) {
                boot_vector_addr = MERAM;
                syscier = 0x013111ef;
        } else if (of_machine_is_compatible("renesas,r8a7791")) {
                boot_vector_addr = RAM;
                syscier = 0x00111003;
        }

More SoC checks will be added in the future...

If CONFIG_SMP is not set, the compiler will optimize out the assignments
to syscier.

> +       rcar_gen2_sysc_init();

You could pass syscier here.

> +       shmobile_smp_apmu_suspend_init();
> +}

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [RFC/PATCH] ARM: shmobile: Consolidate the pm code for R-Car Gen2

[Gaku Inami]

Hi Geert-san,

Thank you for your feedback.

On 2015/03/13 18:39, Geert Uytterhoeven wrote:
> Hi Inami-san,
>
> On Fri, Mar 13, 2015 at 9:40 AM, Gaku Inami
> <gaku.inami.xw@bp.renesas.com> wrote:

< snip >

>> --- /dev/null
>> +++ b/arch/arm/mach-shmobile/pm-rcar-gen2.c
>> @@ -0,0 +1,114 @@
>> +/*
>> + * R-Car Generation 2 Power management support
>> + *
>> + * Copyright (C) 2015  Renesas Electronics Corporation
> Please retain the original copyrights from pm-r8a779[01].c here, too.

I will fix it with v2 patch.

>> +#if defined(CONFIG_SMP)
>> +
>> +static void __init rcar_gen2_sysc_init(void)
>> +{
>> +       u32 val;
>> +       void __iomem *base = rcar_sysc_init(0xe6180000);
>> +
>> +       if (of_machine_is_compatible("renesas,r8a7790"))
>> +               val = 0x013111ef;
>> +       else if (of_machine_is_compatible("renesas,r8a7791"))
>> +               val = 0x00111003;
> As you do SoC OF matching in rcar_gen2_pm_init() too, perhaps "val" should
> be passed from that function? That would save a few of_machine_is_compatible()
> lookups.

I will pass the value of SYSCIER from rcar_gen2_pm_init().

>
>> +
>> +       /* enable all interrupt sources, but do not use interrupt handler */
>> +       iowrite32(val, base + SYSCIER);
>> +       iowrite32(0, base + SYSCIMR);
>> +}
>> +
>> +#else /* CONFIG_SMP */
>> +
>> +static inline void rcar_gen2_sysc_init(void) {}
>> +
>> +#endif /* CONFIG_SMP */
>> +
>> +void __init rcar_gen2_pm_init(void)
>> +{
>> +       void __iomem *p;
>> +       u32 bar;
>> +       static int once;
>> +       struct device_node *np, *cpus;
>> +       bool is_a7 = false;
>> +       bool is_a15 = false;
> I would name these "has_a7" and "has_a15", as both can be true.

I will fix it with v2 patch.

>> +       phys_addr_t boot_vector_addr = 0;
>> +
>> +       if (once++)
>> +               return;
>> +
>> +       cpus = of_find_node_by_path("/cpus");
>> +       if (!cpus)
>> +               return;
>> +
>> +       for_each_child_of_node(cpus, np) {
>> +               if (of_device_is_compatible(np, "arm,cortex-a15"))
>> +                       is_a15 = true;
>> +               else if (of_device_is_compatible(np, "arm,cortex-a7"))
>> +                       is_a7 = true;
>> +       }
>> +
>> +       if (of_machine_is_compatible("renesas,r8a7790"))
>> +               boot_vector_addr = MERAM;
>> +       else
>> +               boot_vector_addr = RAM;
> You could store the SYSCIER value in a variable here:
>
>         if (of_machine_is_compatible("renesas,r8a7790")) {
>                 boot_vector_addr = MERAM;
>                 syscier = 0x013111ef;
>         } else if (of_machine_is_compatible("renesas,r8a7791")) {
>                 boot_vector_addr = RAM;
>                 syscier = 0x00111003;
>         }
>
> More SoC checks will be added in the future...
>
> If CONFIG_SMP is not set, the compiler will optimize out the assignments
> to syscier.
>
>> +       rcar_gen2_sysc_init();
> You could pass syscier here.

It was redundant to call twice of_machine_is_compatible().
I will fix as you mentioned, and then I will post v2 patch.

Regards,
Inami

[RFC/PATCH] ARM: shmobile: Consolidate the smp code for R-Car Gen2

[Gaku Inami]

The smp code for R-Car Gen2 is scatterd in each SoC. These files
(smp-r8a7790.c/smp-r8a7791.c) have some overlap code. This change
consolidate the smp code for R-Car Gen2 into one.

Signed-off-by: Gaku Inami <gaku.inami.xw@bp.renesas.com>
---

Based on : renesas-devel-20150324-v4.0-rc5

 arch/arm/mach-shmobile/Makefile        |    3 +-
 arch/arm/mach-shmobile/r8a7790.h       |    6 --
 arch/arm/mach-shmobile/r8a7791.h       |    6 --
 arch/arm/mach-shmobile/rcar-gen2.h     |    2 +
 arch/arm/mach-shmobile/setup-r8a7790.c |    3 +-
 arch/arm/mach-shmobile/setup-r8a7791.c |    3 +-
 arch/arm/mach-shmobile/smp-r8a7790.c   |   71 ------------------
 arch/arm/mach-shmobile/smp-r8a7791.c   |   65 -----------------
 arch/arm/mach-shmobile/smp-rcar-gen2.c |  125 ++++++++++++++++++++++++++++++++
 9 files changed, 130 insertions(+), 154 deletions(-)
 delete mode 100644 arch/arm/mach-shmobile/r8a7790.h
 delete mode 100644 arch/arm/mach-shmobile/r8a7791.h
 delete mode 100644 arch/arm/mach-shmobile/smp-r8a7790.c
 delete mode 100644 arch/arm/mach-shmobile/smp-r8a7791.c
 create mode 100644 arch/arm/mach-shmobile/smp-rcar-gen2.c

diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index 89e463d..a5e42d6 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -39,9 +39,8 @@ obj-$(CONFIG_ARCH_R8A7791)	+= regulator-quirk-rcar-gen2.o
 smp-y				:= $(cpu-y)
 smp-$(CONFIG_ARCH_SH73A0)	+= smp-sh73a0.o headsmp-scu.o platsmp-scu.o
 smp-$(CONFIG_ARCH_R8A7779)	+= smp-r8a7779.o headsmp-scu.o platsmp-scu.o
-smp-$(CONFIG_ARCH_R8A7790)	+= smp-r8a7790.o
-smp-$(CONFIG_ARCH_R8A7791)	+= smp-r8a7791.o
 smp-$(CONFIG_ARCH_EMEV2)	+= smp-emev2.o headsmp-scu.o platsmp-scu.o
+smp-$(CONFIG_ARCH_RCAR_GEN2)	+= smp-rcar-gen2.o
 
 # PM objects
 obj-$(CONFIG_SUSPEND)		+= suspend.o
diff --git a/arch/arm/mach-shmobile/r8a7790.h b/arch/arm/mach-shmobile/r8a7790.h
deleted file mode 100644
index 1a46d02..0000000
--- a/arch/arm/mach-shmobile/r8a7790.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef __ASM_R8A7790_H__
-#define __ASM_R8A7790_H__
-
-extern struct smp_operations r8a7790_smp_ops;
-
-#endif /* __ASM_R8A7790_H__ */
diff --git a/arch/arm/mach-shmobile/r8a7791.h b/arch/arm/mach-shmobile/r8a7791.h
deleted file mode 100644
index 7ca0b7d..0000000
--- a/arch/arm/mach-shmobile/r8a7791.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef __ASM_R8A7791_H__
-#define __ASM_R8A7791_H__
-
-extern struct smp_operations r8a7791_smp_ops;
-
-#endif /* __ASM_R8A7791_H__ */
diff --git a/arch/arm/mach-shmobile/rcar-gen2.h b/arch/arm/mach-shmobile/rcar-gen2.h
index 8a66b4a..a0b811f 100644
--- a/arch/arm/mach-shmobile/rcar-gen2.h
+++ b/arch/arm/mach-shmobile/rcar-gen2.h
@@ -7,4 +7,6 @@ u32 rcar_gen2_read_mode_pins(void);
 void rcar_gen2_reserve(void);
 void rcar_gen2_pm_init(void);
 
+extern struct smp_operations rcar_gen2_smp_ops;
+
 #endif /* __ASM_RCAR_GEN2_H__ */
diff --git a/arch/arm/mach-shmobile/setup-r8a7790.c b/arch/arm/mach-shmobile/setup-r8a7790.c
index 3a18af4..2e59dd2 100644
--- a/arch/arm/mach-shmobile/setup-r8a7790.c
+++ b/arch/arm/mach-shmobile/setup-r8a7790.c
@@ -19,7 +19,6 @@
 #include <asm/mach/arch.h>
 
 #include "common.h"
-#include "r8a7790.h"
 #include "rcar-gen2.h"
 
 static const char * const r8a7790_boards_compat_dt[] __initconst = {
@@ -28,7 +27,7 @@ static const char * const r8a7790_boards_compat_dt[] __initconst = {
 };
 
 DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)")
-	.smp		= smp_ops(r8a7790_smp_ops),
+	.smp		= smp_ops(rcar_gen2_smp_ops),
 	.init_early	= shmobile_init_delay,
 	.init_time	= rcar_gen2_timer_init,
 	.init_late	= shmobile_init_late,
diff --git a/arch/arm/mach-shmobile/setup-r8a7791.c b/arch/arm/mach-shmobile/setup-r8a7791.c
index ef8eb3a..cd77d3b 100644
--- a/arch/arm/mach-shmobile/setup-r8a7791.c
+++ b/arch/arm/mach-shmobile/setup-r8a7791.c
@@ -20,7 +20,6 @@
 #include <asm/mach/arch.h>
 
 #include "common.h"
-#include "r8a7791.h"
 #include "rcar-gen2.h"
 
 static const char *r8a7791_boards_compat_dt[] __initdata = {
@@ -29,7 +28,7 @@ static const char *r8a7791_boards_compat_dt[] __initdata = {
 };
 
 DT_MACHINE_START(R8A7791_DT, "Generic R8A7791 (Flattened Device Tree)")
-	.smp		= smp_ops(r8a7791_smp_ops),
+	.smp		= smp_ops(rcar_gen2_smp_ops),
 	.init_early	= shmobile_init_delay,
 	.init_time	= rcar_gen2_timer_init,
 	.init_late	= shmobile_init_late,
diff --git a/arch/arm/mach-shmobile/smp-r8a7790.c b/arch/arm/mach-shmobile/smp-r8a7790.c
deleted file mode 100644
index 930f45c..0000000
--- a/arch/arm/mach-shmobile/smp-r8a7790.c
+++ /dev/null
@@ -1,71 +0,0 @@
-/*
- * SMP support for r8a7790
- *
- * Copyright (C) 2012-2013 Renesas Solutions Corp.
- * Copyright (C) 2012 Takashi Yoshii <takashi.yoshii.ze@renesas.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/smp.h>
-#include <linux/io.h>
-
-#include <asm/smp_plat.h>
-
-#include "common.h"
-#include "platsmp-apmu.h"
-#include "pm-rcar.h"
-#include "rcar-gen2.h"
-#include "r8a7790.h"
-
-static struct rcar_sysc_ch r8a7790_ca15_scu = {
-	.chan_offs = 0x180, /* PWRSR5 .. PWRER5 */
-	.isr_bit = 12, /* CA15-SCU */
-};
-
-static struct rcar_sysc_ch r8a7790_ca7_scu = {
-	.chan_offs = 0x100, /* PWRSR3 .. PWRER3 */
-	.isr_bit = 21, /* CA7-SCU */
-};
-
-static struct rcar_apmu_config r8a7790_apmu_config[] = {
-	{
-		.iomem = DEFINE_RES_MEM(0xe6152000, 0x188),
-		.cpus = { 0, 1, 2, 3 },
-	},
-	{
-		.iomem = DEFINE_RES_MEM(0xe6151000, 0x188),
-		.cpus = { 0x100, 0x0101, 0x102, 0x103 },
-	}
-};
-
-static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus)
-{
-	/* let APMU code install data related to shmobile_boot_vector */
-	shmobile_smp_apmu_prepare_cpus(max_cpus,
-				       r8a7790_apmu_config,
-				       ARRAY_SIZE(r8a7790_apmu_config));
-
-	/* turn on power to SCU */
-	rcar_gen2_pm_init();
-	rcar_sysc_power_up(&r8a7790_ca15_scu);
-	rcar_sysc_power_up(&r8a7790_ca7_scu);
-}
-
-struct smp_operations r8a7790_smp_ops __initdata = {
-	.smp_prepare_cpus	= r8a7790_smp_prepare_cpus,
-	.smp_boot_secondary	= shmobile_smp_apmu_boot_secondary,
-#ifdef CONFIG_HOTPLUG_CPU
-	.cpu_disable		= shmobile_smp_cpu_disable,
-	.cpu_die		= shmobile_smp_apmu_cpu_die,
-	.cpu_kill		= shmobile_smp_apmu_cpu_kill,
-#endif
-};
diff --git a/arch/arm/mach-shmobile/smp-r8a7791.c b/arch/arm/mach-shmobile/smp-r8a7791.c
deleted file mode 100644
index 5e2d1db..0000000
--- a/arch/arm/mach-shmobile/smp-r8a7791.c
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * SMP support for r8a7791
- *
- * Copyright (C) 2013 Renesas Solutions Corp.
- * Copyright (C) 2013 Magnus Damm
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/smp.h>
-#include <linux/io.h>
-
-#include <asm/smp_plat.h>
-
-#include "common.h"
-#include "platsmp-apmu.h"
-#include "r8a7791.h"
-#include "rcar-gen2.h"
-
-static struct rcar_apmu_config r8a7791_apmu_config[] = {
-	{
-		.iomem = DEFINE_RES_MEM(0xe6152000, 0x188),
-		.cpus = { 0, 1 },
-	}
-};
-
-static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus)
-{
-	/* let APMU code install data related to shmobile_boot_vector */
-	shmobile_smp_apmu_prepare_cpus(max_cpus,
-				       r8a7791_apmu_config,
-				       ARRAY_SIZE(r8a7791_apmu_config));
-
-	rcar_gen2_pm_init();
-}
-
-static int r8a7791_smp_boot_secondary(unsigned int cpu,
-				      struct task_struct *idle)
-{
-	/* Error out when hardware debug mode is enabled */
-	if (rcar_gen2_read_mode_pins() & BIT(21)) {
-		pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu);
-		return -ENOTSUPP;
-	}
-
-	return shmobile_smp_apmu_boot_secondary(cpu, idle);
-}
-
-struct smp_operations r8a7791_smp_ops __initdata = {
-	.smp_prepare_cpus	= r8a7791_smp_prepare_cpus,
-	.smp_boot_secondary	= r8a7791_smp_boot_secondary,
-#ifdef CONFIG_HOTPLUG_CPU
-	.cpu_disable		= shmobile_smp_cpu_disable,
-	.cpu_die		= shmobile_smp_apmu_cpu_die,
-	.cpu_kill		= shmobile_smp_apmu_cpu_kill,
-#endif
-};
diff --git a/arch/arm/mach-shmobile/smp-rcar-gen2.c b/arch/arm/mach-shmobile/smp-rcar-gen2.c
new file mode 100644
index 0000000..fcf79f7
--- /dev/null
+++ b/arch/arm/mach-shmobile/smp-rcar-gen2.c
@@ -0,0 +1,125 @@
+/*
+ * R-Car Generation 2 SMP support
+ *
+ * Copyright (C) 2015 Renesas Electronics Corporation
+ * Copyright (C) 2013 Magnus Damm
+ * Copyright (C) 2012-2013 Renesas Solutions Corp.
+ * Copyright (C) 2012 Takashi Yoshii <takashi.yoshii.ze@renesas.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+#include <linux/kernel.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/smp.h>
+
+#include <asm/cputype.h>
+#include <asm/smp_plat.h>
+
+#include "common.h"
+#include "platsmp-apmu.h"
+#include "pm-rcar.h"
+#include "rcar-gen2.h"
+
+static struct rcar_sysc_ch rcar_gen2_ca15_scu = {
+	.chan_offs = 0x180, /* PWRSR5 .. PWRER5 */
+	.isr_bit = 12, /* CA15-SCU */
+};
+
+static struct rcar_sysc_ch rcar_gen2_ca7_scu = {
+	.chan_offs = 0x100, /* PWRSR3 .. PWRER3 */
+	.isr_bit = 21, /* CA7-SCU */
+};
+
+static struct rcar_apmu_config r8a7790_apmu_config[] = {
+	{
+		.iomem = DEFINE_RES_MEM(0xe6152000, 0x188),
+		.cpus = { 0, 1, 2, 3 },
+	},
+	{
+		.iomem = DEFINE_RES_MEM(0xe6151000, 0x188),
+		.cpus = { 0x100, 0x0101, 0x102, 0x103 },
+	}
+};
+
+static struct rcar_apmu_config r8a7791_apmu_config[] = {
+	{
+		.iomem = DEFINE_RES_MEM(0xe6152000, 0x188),
+		.cpus = { 0, 1 },
+	}
+};
+
+static void __init rcar_gen2_smp_prepare_cpus(unsigned int max_cpus)
+{
+	struct device_node *np, *cpus;
+	bool has_a7 = false;
+	bool has_a15 = false;
+	u32 this_cluster;
+	struct rcar_apmu_config *rcar_gen2_apmu_config;
+	u32 rcar_apmu_config_size;
+
+	cpus = of_find_node_by_path("/cpus");
+	if (!cpus)
+		return;
+
+	for_each_child_of_node(cpus, np) {
+		if (of_device_is_compatible(np, "arm,cortex-a15"))
+			has_a15 = true;
+		else if (of_device_is_compatible(np, "arm,cortex-a7"))
+			has_a7 = true;
+	}
+
+	if (of_machine_is_compatible("renesas,r8a7790")) {
+		rcar_gen2_apmu_config = &r8a7790_apmu_config[0];
+		rcar_apmu_config_size = ARRAY_SIZE(r8a7790_apmu_config);
+	} else if (of_machine_is_compatible("renesas,r8a7791")) {
+		rcar_gen2_apmu_config = &r8a7791_apmu_config[0];
+		rcar_apmu_config_size = ARRAY_SIZE(r8a7791_apmu_config);
+	}
+
+	/* let APMU code install data related to shmobile_boot_vector */
+	shmobile_smp_apmu_prepare_cpus(max_cpus,
+				       rcar_gen2_apmu_config,
+				       rcar_apmu_config_size);
+
+	rcar_gen2_pm_init();
+
+	/* turn on power to SCU of second cluster */
+	if (has_a15 && has_a7) {
+		this_cluster = MPIDR_AFFINITY_LEVEL(read_cpuid_mpidr(), 1);
+		if (this_cluster = 0)
+			rcar_sysc_power_up(&rcar_gen2_ca7_scu);
+		else
+			rcar_sysc_power_up(&rcar_gen2_ca15_scu);
+	}
+}
+
+static int rcar_gen2_smp_boot_secondary(unsigned int cpu,
+				      struct task_struct *idle)
+{
+	/* Error out when hardware debug mode is enabled */
+	if (of_machine_is_compatible("renesas,r8a7791") &&
+	    rcar_gen2_read_mode_pins() & BIT(21)) {
+		pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu);
+		return -ENOTSUPP;
+	}
+
+	return shmobile_smp_apmu_boot_secondary(cpu, idle);
+}
+
+struct smp_operations rcar_gen2_smp_ops __initdata = {
+	.smp_prepare_cpus	= rcar_gen2_smp_prepare_cpus,
+	.smp_boot_secondary	= rcar_gen2_smp_boot_secondary,
+#ifdef CONFIG_HOTPLUG_CPU
+	.cpu_disable		= shmobile_smp_cpu_disable,
+	.cpu_die		= shmobile_smp_apmu_cpu_die,
+	.cpu_kill		= shmobile_smp_apmu_cpu_kill,
+#endif
+};
-- 
1.7.9.5

Re: [RFC/PATCH] ARM: shmobile: Consolidate the smp code for R-Car Gen2

[Geert Uytterhoeven]

Hi Inami-san,

On Wed, Mar 25, 2015 at 6:45 AM, Gaku Inami
<gaku.inami.xw@bp.renesas.com> wrote:
> The smp code for R-Car Gen2 is scatterd in each SoC. These files
> (smp-r8a7790.c/smp-r8a7791.c) have some overlap code. This change
> consolidate the smp code for R-Car Gen2 into one.

Thanks for your patch!

> --- /dev/null
> +++ b/arch/arm/mach-shmobile/smp-rcar-gen2.c
> @@ -0,0 +1,125 @@
> +/*
> + * R-Car Generation 2 SMP support
> + *
> + * Copyright (C) 2015 Renesas Electronics Corporation
> + * Copyright (C) 2013 Magnus Damm
> + * Copyright (C) 2012-2013 Renesas Solutions Corp.
> + * Copyright (C) 2012 Takashi Yoshii <takashi.yoshii.ze@renesas.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; version 2 of the License.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +#include <linux/kernel.h>
> +#include <linux/io.h>
> +#include <linux/of.h>
> +#include <linux/smp.h>
> +
> +#include <asm/cputype.h>
> +#include <asm/smp_plat.h>
> +
> +#include "common.h"
> +#include "platsmp-apmu.h"
> +#include "pm-rcar.h"
> +#include "rcar-gen2.h"
> +
> +static struct rcar_sysc_ch rcar_gen2_ca15_scu = {
> +       .chan_offs = 0x180, /* PWRSR5 .. PWRER5 */
> +       .isr_bit = 12, /* CA15-SCU */
> +};
> +
> +static struct rcar_sysc_ch rcar_gen2_ca7_scu = {
> +       .chan_offs = 0x100, /* PWRSR3 .. PWRER3 */
> +       .isr_bit = 21, /* CA7-SCU */
> +};
> +
> +static struct rcar_apmu_config r8a7790_apmu_config[] = {
> +       {
> +               .iomem = DEFINE_RES_MEM(0xe6152000, 0x188),
> +               .cpus = { 0, 1, 2, 3 },
> +       },
> +       {
> +               .iomem = DEFINE_RES_MEM(0xe6151000, 0x188),
> +               .cpus = { 0x100, 0x0101, 0x102, 0x103 },
> +       }
> +};
> +
> +static struct rcar_apmu_config r8a7791_apmu_config[] = {
> +       {
> +               .iomem = DEFINE_RES_MEM(0xe6152000, 0x188),
> +               .cpus = { 0, 1 },
> +       }
> +};
> +
> +static void __init rcar_gen2_smp_prepare_cpus(unsigned int max_cpus)
> +{
> +       struct device_node *np, *cpus;
> +       bool has_a7 = false;
> +       bool has_a15 = false;
> +       u32 this_cluster;
> +       struct rcar_apmu_config *rcar_gen2_apmu_config;
> +       u32 rcar_apmu_config_size;
> +
> +       cpus = of_find_node_by_path("/cpus");
> +       if (!cpus)
> +               return;
> +
> +       for_each_child_of_node(cpus, np) {
> +               if (of_device_is_compatible(np, "arm,cortex-a15"))
> +                       has_a15 = true;
> +               else if (of_device_is_compatible(np, "arm,cortex-a7"))
> +                       has_a7 = true;
> +       }
> +
> +       if (of_machine_is_compatible("renesas,r8a7790")) {
> +               rcar_gen2_apmu_config = &r8a7790_apmu_config[0];
> +               rcar_apmu_config_size = ARRAY_SIZE(r8a7790_apmu_config);
> +       } else if (of_machine_is_compatible("renesas,r8a7791")) {
> +               rcar_gen2_apmu_config = &r8a7791_apmu_config[0];
> +               rcar_apmu_config_size = ARRAY_SIZE(r8a7791_apmu_config);
> +       }

I wonder whether we should replace the "compatible" matching by reading
the Product Register (PRR, iomem 0xff000044), looking at bits 22-25 and 27-30
to check for the presence of CA7 and CA15 CPU cores, and fill in the
rcar_apmu_config tables based on that. That way it'll work automatically for
all members of the R-Car Gen2 family.

> +       /* let APMU code install data related to shmobile_boot_vector */
> +       shmobile_smp_apmu_prepare_cpus(max_cpus,
> +                                      rcar_gen2_apmu_config,
> +                                      rcar_apmu_config_size);
> +
> +       rcar_gen2_pm_init();
> +
> +       /* turn on power to SCU of second cluster */
> +       if (has_a15 && has_a7) {
> +               this_cluster = MPIDR_AFFINITY_LEVEL(read_cpuid_mpidr(), 1);
> +               if (this_cluster = 0)
> +                       rcar_sysc_power_up(&rcar_gen2_ca7_scu);
> +               else
> +                       rcar_sysc_power_up(&rcar_gen2_ca15_scu);

This is a change in behavior compared to the old r8a7790 implementation, which
powered on both clusters. Please mention this in the patch description.

> +       }
> +}
> +
> +static int rcar_gen2_smp_boot_secondary(unsigned int cpu,
> +                                     struct task_struct *idle)
> +{
> +       /* Error out when hardware debug mode is enabled */
> +       if (of_machine_is_compatible("renesas,r8a7791") &&
> +           rcar_gen2_read_mode_pins() & BIT(21)) {

While we indeed had this check on r8a7791 only, I think it also applies
to r8a7790, cfr. the Lager board documentation.
According to the R-Car Gen2 datasheet, this is the case on all family
members but R-Car V2H.

> +               pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu);
> +               return -ENOTSUPP;
> +       }
> +
> +       return shmobile_smp_apmu_boot_secondary(cpu, idle);
> +}
> +
> +struct smp_operations rcar_gen2_smp_ops __initdata = {
> +       .smp_prepare_cpus       = rcar_gen2_smp_prepare_cpus,
> +       .smp_boot_secondary     = rcar_gen2_smp_boot_secondary,
> +#ifdef CONFIG_HOTPLUG_CPU
> +       .cpu_disable            = shmobile_smp_cpu_disable,
> +       .cpu_die                = shmobile_smp_apmu_cpu_die,
> +       .cpu_kill               = shmobile_smp_apmu_cpu_kill,
> +#endif
> +};

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [RFC/PATCH] ARM: shmobile: Consolidate the smp code for R-Car Gen2

[Gaku Inami]

Hi Geert-san,

Thank you for your feedback.

On 2015/04/01 22:31, Geert Uytterhoeven wrote:

<snip>

> I wonder whether we should replace the "compatible" matching by reading
> the Product Register (PRR, iomem 0xff000044), looking at bits 22-25 and 27-30
> to check for the presence of CA7 and CA15 CPU cores, and fill in the
> rcar_apmu_config tables based on that. That way it'll work automatically for
> all members of the R-Car Gen2 family.

I will try to implement in this way.

>> +       /* let APMU code install data related to shmobile_boot_vector */
>> +       shmobile_smp_apmu_prepare_cpus(max_cpus,
>> +                                      rcar_gen2_apmu_config,
>> +                                      rcar_apmu_config_size);
>> +
>> +       rcar_gen2_pm_init();
>> +
>> +       /* turn on power to SCU of second cluster */
>> +       if (has_a15 && has_a7) {
>> +               this_cluster = MPIDR_AFFINITY_LEVEL(read_cpuid_mpidr(), 1);
>> +               if (this_cluster = 0)
>> +                       rcar_sysc_power_up(&rcar_gen2_ca7_scu);
>> +               else
>> +                       rcar_sysc_power_up(&rcar_gen2_ca15_scu);
> This is a change in behavior compared to the old r8a7790 implementation, which
> powered on both clusters. Please mention this in the patch description.

I will add this description with v2 patch.

The SCU of boot cpu side is already powered on. Therefore, it is not 
necessary to power on the SCU of both clusters in here. In case of 
multi-cluster, the SCU of secondary cluster should be powered on.

>> +       }
>> +}
>> +
>> +static int rcar_gen2_smp_boot_secondary(unsigned int cpu,
>> +                                     struct task_struct *idle)
>> +{
>> +       /* Error out when hardware debug mode is enabled */
>> +       if (of_machine_is_compatible("renesas,r8a7791") &&
>> +           rcar_gen2_read_mode_pins() & BIT(21)) {
> While we indeed had this check on r8a7791 only, I think it also applies
> to r8a7790, cfr. the Lager board documentation.
> According to the R-Car Gen2 datasheet, this is the case on all family
> members but R-Car V2H.

I will fix it with v2 patch.

Regards,
Inami