[PATCH v2 0/4] R-Car Gen3 DU enablement on Salvator-X board

[PATCH v2 0/4] R-Car Gen3 DU enablement on Salvator-X board

[Laurent Pinchart]

Hello,

This patch series enables DU support on the Salvator-X board. The first three
patches add the FCPV, VSP and DU devices to the r8a7795 .dtsi, while the last
patch enables DU support for the board. Only the VGA output is currently
supported, support for HDMI is work in progress.

All the related DT bindings have been merged upstream. There is thus nothing
blocking the series from being merged as well.

Changes compared to v1:

- Use GIC_SPI
- Rebase on top of latest devel branch

Laurent Pinchart (4):
  arm64: dts: renesas: r8a7795: Add FCPV nodes
  arm64: dts: renesas: r8a7795: Add VSP instances
  arm64: dts: renesas: r8a7795: Add DU device to DT
  arm64: dts: renesas: salvator-x: Enable DU

 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts |  44 +++++
 arch/arm64/boot/dts/renesas/r8a7795.dtsi           | 199 +++++++++++++++++++++
 2 files changed, 243 insertions(+)

-- 
Regards,

Laurent Pinchart

[PATCH v2 1/4] arm64: dts: renesas: r8a7795: Add FCPV nodes

[Laurent Pinchart]

The FCPs handle the interface between various IP cores and memory. Add
the instances related to the VSP2s.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 63 ++++++++++++++++++++++++++++++++
 1 file changed, 63 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 99953ca9a45e..f8b1c421e845 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -1274,6 +1274,13 @@
 			status = "disabled";
 		};
 
+		fcpvb1: fcp@fe92f000 {
+			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+			reg = <0 0xfe92f000 0 0x200>;
+			clocks = <&cpg CPG_MOD 606>;
+			power-domains = <&sysc R8A7795_PD_A3VP>;
+		};
+
 		fcpf0: fcp@fe950000 {
 			compatible = "renesas,r8a7795-fcpf", "renesas,fcpf";
 			reg = <0 0xfe950000 0 0x200>;
@@ -1295,6 +1302,62 @@
 			power-domains = <&sysc R8A7795_PD_A3VP>;
 		};
 
+		fcpvb0: fcp@fe96f000 {
+			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+			reg = <0 0xfe96f000 0 0x200>;
+			clocks = <&cpg CPG_MOD 607>;
+			power-domains = <&sysc R8A7795_PD_A3VP>;
+		};
+
+		fcpvi0: fcp@fe9af000 {
+			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+			reg = <0 0xfe9af000 0 0x200>;
+			clocks = <&cpg CPG_MOD 611>;
+			power-domains = <&sysc R8A7795_PD_A3VP>;
+		};
+
+		fcpvi1: fcp@fe9bf000 {
+			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+			reg = <0 0xfe9bf000 0 0x200>;
+			clocks = <&cpg CPG_MOD 610>;
+			power-domains = <&sysc R8A7795_PD_A3VP>;
+		};
+
+		fcpvi2: fcp@fe9cf000 {
+			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+			reg = <0 0xfe9cf000 0 0x200>;
+			clocks = <&cpg CPG_MOD 609>;
+			power-domains = <&sysc R8A7795_PD_A3VP>;
+		};
+
+		fcpvd0: fcp@fea27000 {
+			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+			reg = <0 0xfea27000 0 0x200>;
+			clocks = <&cpg CPG_MOD 603>;
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+		};
+
+		fcpvd1: fcp@fea2f000 {
+			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+			reg = <0 0xfea2f000 0 0x200>;
+			clocks = <&cpg CPG_MOD 602>;
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+		};
+
+		fcpvd2: fcp@fea37000 {
+			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+			reg = <0 0xfea37000 0 0x200>;
+			clocks = <&cpg CPG_MOD 601>;
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+		};
+
+		fcpvd3: fcp@fea3f000 {
+			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
+			reg = <0 0xfea3f000 0 0x200>;
+			clocks = <&cpg CPG_MOD 600>;
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+		};
+
 		fdp1@fe940000 {
 			compatible = "renesas,fdp1";
 			reg = <0 0xfe940000 0 0x2400>;
-- 
Regards,

Laurent Pinchart

Re: [PATCH v2 1/4] arm64: dts: renesas: r8a7795: Add FCPV nodes

[Geert Uytterhoeven]

Hi Laurent,

On Tue, Aug 9, 2016 at 2:29 PM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:
> The FCPs handle the interface between various IP cores and memory. Add
> the instances related to the VSP2s.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> ---
>  arch/arm64/boot/dts/renesas/r8a7795.dtsi | 63 ++++++++++++++++++++++++++++++++
>  1 file changed, 63 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> index 99953ca9a45e..f8b1c421e845 100644
> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi

> +               fcpvi2: fcp@fe9cf000 {
> +                       compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
> +                       reg = <0 0xfe9cf000 0 0x200>;
> +                       clocks = <&cpg CPG_MOD 609>;
> +                       power-domains = <&sysc R8A7795_PD_A3VP>;
> +               };

> +               fcpvd3: fcp@fea3f000 {
> +                       compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
> +                       reg = <0 0xfea3f000 0 0x200>;
> +                       clocks = <&cpg CPG_MOD 600>;
> +                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
> +               };
> +

Looks like fcpvi2 and fcpvd3 are no more?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH v2 2/4] arm64: dts: renesas: r8a7795: Add VSP instances

[Laurent Pinchart]

The r8a7795 has 9 VSP instances.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 90 ++++++++++++++++++++++++++++++++
 1 file changed, 90 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index f8b1c421e845..d9c6653471f4 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -1274,6 +1274,16 @@
 			status = "disabled";
 		};
 
+		vspbc: vsp@fe920000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfe920000 0 0x8000>;
+			interrupts = <GIC_SPI 465 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 624>;
+			power-domains = <&sysc R8A7795_PD_A3VP>;
+
+			renesas,fcp = <&fcpvb1>;
+		};
+
 		fcpvb1: fcp@fe92f000 {
 			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
 			reg = <0 0xfe92f000 0 0x200>;
@@ -1302,6 +1312,16 @@
 			power-domains = <&sysc R8A7795_PD_A3VP>;
 		};
 
+		vspbd: vsp@fe960000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfe960000 0 0x8000>;
+			interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 626>;
+			power-domains = <&sysc R8A7795_PD_A3VP>;
+
+			renesas,fcp = <&fcpvb0>;
+		};
+
 		fcpvb0: fcp@fe96f000 {
 			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
 			reg = <0 0xfe96f000 0 0x200>;
@@ -1309,6 +1329,16 @@
 			power-domains = <&sysc R8A7795_PD_A3VP>;
 		};
 
+		vspi0: vsp@fe9a0000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfe9a0000 0 0x8000>;
+			interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 631>;
+			power-domains = <&sysc R8A7795_PD_A3VP>;
+
+			renesas,fcp = <&fcpvi0>;
+		};
+
 		fcpvi0: fcp@fe9af000 {
 			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
 			reg = <0 0xfe9af000 0 0x200>;
@@ -1316,6 +1346,16 @@
 			power-domains = <&sysc R8A7795_PD_A3VP>;
 		};
 
+		vspi1: vsp@fe9b0000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfe9b0000 0 0x8000>;
+			interrupts = <GIC_SPI 445 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 630>;
+			power-domains = <&sysc R8A7795_PD_A3VP>;
+
+			renesas,fcp = <&fcpvi1>;
+		};
+
 		fcpvi1: fcp@fe9bf000 {
 			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
 			reg = <0 0xfe9bf000 0 0x200>;
@@ -1323,6 +1363,16 @@
 			power-domains = <&sysc R8A7795_PD_A3VP>;
 		};
 
+		vspi2: vsp@fe9c0000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfe9c0000 0 0x8000>;
+			interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 629>;
+			power-domains = <&sysc R8A7795_PD_A3VP>;
+
+			renesas,fcp = <&fcpvi2>;
+		};
+
 		fcpvi2: fcp@fe9cf000 {
 			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
 			reg = <0 0xfe9cf000 0 0x200>;
@@ -1330,6 +1380,16 @@
 			power-domains = <&sysc R8A7795_PD_A3VP>;
 		};
 
+		vspd0: vsp@fea20000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfea20000 0 0x4000>;
+			interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 623>;
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+
+			renesas,fcp = <&fcpvd0>;
+		};
+
 		fcpvd0: fcp@fea27000 {
 			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
 			reg = <0 0xfea27000 0 0x200>;
@@ -1337,6 +1397,16 @@
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 		};
 
+		vspd1: vsp@fea28000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfea28000 0 0x4000>;
+			interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 622>;
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+
+			renesas,fcp = <&fcpvd1>;
+		};
+
 		fcpvd1: fcp@fea2f000 {
 			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
 			reg = <0 0xfea2f000 0 0x200>;
@@ -1344,6 +1414,16 @@
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 		};
 
+		vspd2: vsp@fea30000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfea30000 0 0x4000>;
+			interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 621>;
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+
+			renesas,fcp = <&fcpvd2>;
+		};
+
 		fcpvd2: fcp@fea37000 {
 			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
 			reg = <0 0xfea37000 0 0x200>;
@@ -1351,6 +1431,16 @@
 			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
 		};
 
+		vspd3: vsp@fea38000 {
+			compatible = "renesas,vsp2";
+			reg = <0 0xfea38000 0 0x4000>;
+			interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 620>;
+			power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
+
+			renesas,fcp = <&fcpvd3>;
+		};
+
 		fcpvd3: fcp@fea3f000 {
 			compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
 			reg = <0 0xfea3f000 0 0x200>;
-- 
Regards,

Laurent Pinchart

Re: [PATCH v2 2/4] arm64: dts: renesas: r8a7795: Add VSP instances

[Geert Uytterhoeven]

Hi Laurent,

On Tue, Aug 9, 2016 at 2:29 PM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:
> The r8a7795 has 9 VSP instances.

7?

> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> ---
>  arch/arm64/boot/dts/renesas/r8a7795.dtsi | 90 ++++++++++++++++++++++++++++++++
>  1 file changed, 90 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> index f8b1c421e845..d9c6653471f4 100644
> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi

> @@ -1323,6 +1363,16 @@
>                         power-domains = <&sysc R8A7795_PD_A3VP>;
>                 };
>
> +               vspi2: vsp@fe9c0000 {
> +                       compatible = "renesas,vsp2";
> +                       reg = <0 0xfe9c0000 0 0x8000>;
> +                       interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&cpg CPG_MOD 629>;
> +                       power-domains = <&sysc R8A7795_PD_A3VP>;
> +
> +                       renesas,fcp = <&fcpvi2>;
> +               };
> +
>                 fcpvi2: fcp@fe9cf000 {
>                         compatible = "renesas,r8a7795-fcpv", "renesas,fcpv";
>                         reg = <0 0xfe9cf000 0 0x200>;

> @@ -1351,6 +1431,16 @@
>                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
>                 };
>
> +               vspd3: vsp@fea38000 {
> +                       compatible = "renesas,vsp2";
> +                       reg = <0 0xfea38000 0 0x4000>;
> +                       interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
> +                       clocks = <&cpg CPG_MOD 620>;
> +                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
> +
> +                       renesas,fcp = <&fcpvd3>;
> +               };
> +

Looks like vspi2 and vspd3 are no more...

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v2 2/4] arm64: dts: renesas: r8a7795: Add VSP instances

[Laurent Pinchart]

Hi Geert,

(CC'ing Morimoto-san)

On Monday 29 Aug 2016 18:12:07 Geert Uytterhoeven wrote:
> On Tue, Aug 9, 2016 at 2:29 PM, Laurent Pinchart wrote:
> > The r8a7795 has 9 VSP instances.
> 
> 7?
> 
> > Signed-off-by: Laurent Pinchart
> > <laurent.pinchart+renesas@ideasonboard.com>
> > ---
> > 
> >  arch/arm64/boot/dts/renesas/r8a7795.dtsi | 90 +++++++++++++++++++++++++++
> >  1 file changed, 90 insertions(+)
> > 
> > diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index
> > f8b1c421e845..d9c6653471f4 100644
> > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > @@ -1323,6 +1363,16 @@
> >                         power-domains = <&sysc R8A7795_PD_A3VP>;
> >                 };
> > 
> > +               vspi2: vsp@fe9c0000 {
> > +                       compatible = "renesas,vsp2";
> > +                       reg = <0 0xfe9c0000 0 0x8000>;
> > +                       interrupts = <GIC_SPI 446 IRQ_TYPE_LEVEL_HIGH>;
> > +                       clocks = <&cpg CPG_MOD 629>;
> > +                       power-domains = <&sysc R8A7795_PD_A3VP>;
> > +
> > +                       renesas,fcp = <&fcpvi2>;
> > +               };
> > +
> >                 fcpvi2: fcp@fe9cf000 {
> >                         compatible = "renesas,r8a7795-fcpv",
> >                         "renesas,fcpv";
> >                         reg = <0 0xfe9cf000 0 0x200>;
> > @@ -1351,6 +1431,16 @@
> >                         power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
> >                 };
> > 
> > +               vspd3: vsp@fea38000 {
> > +                       compatible = "renesas,vsp2";
> > +                       reg = <0 0xfea38000 0 0x4000>;
> > +                       interrupts = <GIC_SPI 469 IRQ_TYPE_LEVEL_HIGH>;
> > +                       clocks = <&cpg CPG_MOD 620>;
> > +                       power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
> > +
> > +                       renesas,fcp = <&fcpvd3>;
> > +               };
> > +
> 
> Looks like vspi2 and vspd3 are no more...

What the f... The latest errata agrees with you, and if the documentation is 
indeed correct, that's a completely brain-dead design change. I have no idea 
how the DU is supposed to be used if both DU0 and DU3 are connected to the 
same VSP (VSPD0), as mentioned in the latest H3 errata. Furthermore, the 
change doesn't seem to be applicable to ES1.0, as I've successfully tested the 
VGA output on my Salvator-X board, using VSPD3.

Morimoto-san, could you please try to get more information about this ?

-- 
Regards,

Laurent Pinchart

[PATCH v2 3/4] arm64: dts: renesas: r8a7795: Add DU device to DT

[Laurent Pinchart]

Add the DU device to r8a7795.dtsi in a disabled state.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 46 ++++++++++++++++++++++++++++++++
 1 file changed, 46 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index d9c6653471f4..7837d4b807d5 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -1474,5 +1474,51 @@
 			power-domains = <&sysc R8A7795_PD_A3VP>;
 			renesas,fcp = <&fcpf2>;
 		};
+
+		du: display@feb00000 {
+			compatible = "renesas,du-r8a7795";
+			reg = <0 0xfeb00000 0 0x80000>,
+			      <0 0xfeb90000 0 0x14>;
+			reg-names = "du", "lvds.0";
+			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
+				     <GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 724>,
+				 <&cpg CPG_MOD 723>,
+				 <&cpg CPG_MOD 722>,
+				 <&cpg CPG_MOD 721>,
+				 <&cpg CPG_MOD 727>;
+			clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
+			status = "disabled";
+
+			vsps = <&vspd0 &vspd1 &vspd2 &vspd3>;
+
+			ports {
+				#address-cells = <1>;
+				#size-cells = <0>;
+
+				port@0 {
+					reg = <0>;
+					du_out_rgb: endpoint {
+					};
+				};
+				port@1 {
+					reg = <1>;
+					du_out_hdmi0: endpoint {
+					};
+				};
+				port@2 {
+					reg = <2>;
+					du_out_hdmi1: endpoint {
+					};
+				};
+				port@3 {
+					reg = <3>;
+					du_out_lvds0: endpoint {
+					};
+				};
+			};
+		};
 	};
 };
-- 
Regards,

Laurent Pinchart

Re: [PATCH v2 3/4] arm64: dts: renesas: r8a7795: Add DU device to DT

[Geert Uytterhoeven]

On Tue, Aug 9, 2016 at 2:29 PM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:
> Add the DU device to r8a7795.dtsi in a disabled state.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

[PATCH v2 4/4] arm64: dts: renesas: salvator-x: Enable DU

[Laurent Pinchart]

Only the VGA output is supported for now.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
---
 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 44 ++++++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index 98f02631a0f0..8f916c52f261 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -135,6 +135,50 @@
 			sound-dai = <&ak4613>;
 		};
 	};
+
+	vga-encoder {
+		compatible = "adi,adv7123";
+
+		ports {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			port@0 {
+				reg = <0>;
+				adv7123_in: endpoint {
+					remote-endpoint = <&du_out_rgb>;
+				};
+			};
+			port@1 {
+				reg = <1>;
+				adv7123_out: endpoint {
+					remote-endpoint = <&vga_in>;
+				};
+			};
+		};
+	};
+
+	vga {
+		compatible = "vga-connector";
+
+		port {
+			vga_in: endpoint {
+				remote-endpoint = <&adv7123_out>;
+			};
+		};
+	};
+};
+
+&du {
+	status = "okay";
+
+	ports {
+		port@0 {
+			endpoint {
+				remote-endpoint = <&adv7123_in>;
+			};
+		};
+	};
 };
 
 &extal_clk {
-- 
Regards,

Laurent Pinchart

Re: [PATCH v2 4/4] arm64: dts: renesas: salvator-x: Enable DU

[Geert Uytterhoeven]

Hi Laurent,

On Tue, Aug 9, 2016 at 2:29 PM, Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com> wrote:
> Only the VGA output is supported for now.
>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

One question below, though...

> --- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
> +++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
> @@ -135,6 +135,50 @@

> +&du {
> +       status = "okay";

Don't you need pinctrl properties? Or are you relying on initial settings?

GPSR initial settings for DU depend on MD[4:1] i.e. SW10[5:8].
The defaults on my board are not 0000, so all DU pins are GPIOs?
IPSR initial settings don't seem to be documented.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v2 4/4] arm64: dts: renesas: salvator-x: Enable DU

[Laurent Pinchart]

Hi Geert,

On Thursday 11 Aug 2016 11:17:17 Geert Uytterhoeven wrote:
> On Tue, Aug 9, 2016 at 2:29 PM, Laurent Pinchart wrote:
> > Only the VGA output is supported for now.
> > 
> > Signed-off-by: Laurent Pinchart
> > <laurent.pinchart+renesas@ideasonboard.com>
> 
> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> 
> One question below, though...
> 
> > --- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
> > +++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
> > @@ -135,6 +135,50 @@
> > 
> > +&du {
> > +       status = "okay";
> 
> Don't you need pinctrl properties? Or are you relying on initial settings?
> 
> GPSR initial settings for DU depend on MD[4:1] i.e. SW10[5:8].
> The defaults on my board are not 0000, so all DU pins are GPIOs?
> IPSR initial settings don't seem to be documented.

pinctrl configuration is needed, but isn't available yet in the sh-pfc driver. 
I guess I'll just have to bite the bullet and add it :-)

-- 
Regards,

Laurent Pinchart

Re: [PATCH v2 4/4] arm64: dts: renesas: salvator-x: Enable DU

[Laurent Pinchart]

Hi Geert,

On Thursday 11 Aug 2016 18:37:03 Laurent Pinchart wrote:
> On Thursday 11 Aug 2016 11:17:17 Geert Uytterhoeven wrote:
> > On Tue, Aug 9, 2016 at 2:29 PM, Laurent Pinchart wrote:
> > > Only the VGA output is supported for now.
> > > 
> > > Signed-off-by: Laurent Pinchart
> > > <laurent.pinchart+renesas@ideasonboard.com>
> > 
> > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > 
> > One question below, though...
> > 
> > > --- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
> > > +++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
> > > @@ -135,6 +135,50 @@
> > > 
> > > +&du {
> > > +       status = "okay";
> > 
> > Don't you need pinctrl properties? Or are you relying on initial settings?
> > 
> > GPSR initial settings for DU depend on MD[4:1] i.e. SW10[5:8].
> > The defaults on my board are not 0000, so all DU pins are GPIOs?
> > IPSR initial settings don't seem to be documented.
> 
> pinctrl configuration is needed, but isn't available yet in the sh-pfc
> driver. I guess I'll just have to bite the bullet and add it :-)

I've just posted "[PATCH] pinctrl: sh-pfc: r8a7795: Add DU support" and 
"[PATCH] arm64: dts: renesas: salvator-x: Configure pins for the DU RGB 
output". As the latter depends on the former which will be merged through a 
different tree, I propose merging this series already, and delaying "[PATCH] 
arm64: dts: renesas: salvator-x: Configure pins for the DU RGB output" to the 
next kernel version.

Simon, is that fine with you ? If so, could you please pick this series up ?

-- 
Regards,

Laurent Pinchart

Re: [PATCH v2 4/4] arm64: dts: renesas: salvator-x: Enable DU

[Simon Horman]

On Fri, Aug 12, 2016 at 12:20:51PM +0300, Laurent Pinchart wrote:
> Hi Geert,
> 
> On Thursday 11 Aug 2016 18:37:03 Laurent Pinchart wrote:
> > On Thursday 11 Aug 2016 11:17:17 Geert Uytterhoeven wrote:
> > > On Tue, Aug 9, 2016 at 2:29 PM, Laurent Pinchart wrote:
> > > > Only the VGA output is supported for now.
> > > > 
> > > > Signed-off-by: Laurent Pinchart
> > > > <laurent.pinchart+renesas@ideasonboard.com>
> > > 
> > > Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
> > > 
> > > One question below, though...
> > > 
> > > > --- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
> > > > +++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
> > > > @@ -135,6 +135,50 @@
> > > > 
> > > > +&du {
> > > > +       status = "okay";
> > > 
> > > Don't you need pinctrl properties? Or are you relying on initial settings?
> > > 
> > > GPSR initial settings for DU depend on MD[4:1] i.e. SW10[5:8].
> > > The defaults on my board are not 0000, so all DU pins are GPIOs?
> > > IPSR initial settings don't seem to be documented.
> > 
> > pinctrl configuration is needed, but isn't available yet in the sh-pfc
> > driver. I guess I'll just have to bite the bullet and add it :-)
> 
> I've just posted "[PATCH] pinctrl: sh-pfc: r8a7795: Add DU support" and 
> "[PATCH] arm64: dts: renesas: salvator-x: Configure pins for the DU RGB 
> output". As the latter depends on the former which will be merged through a 
> different tree, I propose merging this series already, and delaying "[PATCH] 
> arm64: dts: renesas: salvator-x: Configure pins for the DU RGB output" to the 
> next kernel version.
> 
> Simon, is that fine with you ? If so, could you please pick this series up ?

Yes, I have done so and plan to push it later today.