Re: [PATCH v5 2/4] mtd: rawnand: rzn1: Add new NAND controller driver

From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Wolfram Sang <wsa@kernel.org>
Cc: Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Tudor Ambarus <Tudor.Ambarus@microchip.com>,
	Pratyush Yadav <p.yadav@ti.com>,
	 Michael Walle <michael@walle.cc>,
	MTD Maling List <linux-mtd@lists.infradead.org>,
	 Rob Herring <robh+dt@kernel.org>,
	 "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>,
	Milan Stevanovic <milan.stevanovic@se.com>,
	 Jimmy Lalande <jimmy.lalande@se.com>,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	 Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
	Magnus Damm <magnus.damm@gmail.com>,
	 Gareth Williams <gareth.williams.jx@renesas.com>,
	Phil Edworthy <phil.edworthy@renesas.com>,
	 Ralph Siemsen <ralph.siemsen@linaro.org>,
	Chris Brandt <Chris.Brandt@renesas.com>,
	 Miquel Raynal <miquel.raynal@bootlin.com>
Subject: Re: [PATCH v5 2/4] mtd: rawnand: rzn1: Add new NAND controller driver
Date: Fri, 17 Dec 2021 11:55:17 +0100	[thread overview]
Message-ID: <CAMuHMdXUdRb1VuTgw5-dMkMa_1=YBnODpv1Ja2KRpkNsPWaDeQ@mail.gmail.com> (raw)
In-Reply-To: <YbxjXgIIj6yma+Ch@shikoro>

Hi Wolfram,

CC Chris Brandt

On Fri, Dec 17, 2021 at 11:16 AM Wolfram Sang <wsa@kernel.org> wrote:
> On Fri, Dec 17, 2021 at 10:02:46AM +0100, Miquel Raynal wrote:
> > Introduce Renesas RZ/N1x NAND controller driver which supports:
> > - All ONFI timing modes
> > - Different configurations of its internal ECC controller
> > - On-die (not tested) and software ECC support
> > - Several chips (not tested)
> > - Subpage accesses
> > - DMA and PIO
> >
> > This controller was originally provided by Evatronix before being bought
> > by Cadence.
> >
> > Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
> > Tested-by: Ralph Siemsen <ralph.siemsen@linaro.org>
>
> This IP core is also available on some Renesas R-Car Gen3 SoCs. I don't
> have a board with NAND equipped, so I sadly cannot test your patch and
> can only say that the code looks like it is in a really good shape and
> can only suggest some renaming.

Also on RZ/A2M.
RZ/A1 seems to use a different one.

Note that RZ/N1 NANDC claims to support up to ONFI2.2, while
R-Car Gen3 and RZ/A2M do ONFI1.x only?

Chris: usually you are good at IP history ;-) Do you have anything to add?
Thanks!

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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