[PATCH 0/3] RZ/Five: Enable ADC/CANFD/I2C/OPP/Thermal Zones/TSU

[PATCH 0/3] RZ/Five: Enable ADC/CANFD/I2C/OPP/Thermal Zones/TSU

[Prabhakar]

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Hi All,

This patch series aims to enable support for below blocks
on RZ/Five SoC/SMARC EVK:
- ADC
- CANFD
- I2C
- OPP
- Thermal Zones
- TSU

Note, patches apply on top of [0].

[0] https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git/log/?h=renesas-riscv-dt-for-v6.2

Cheers,
Prabhakar

Lad Prabhakar (3):
  riscv: Kconfig: Enable cpufreq kconfig menu
  riscv: dts: renesas: r9a07g043f/rzfive-smarc-som: Enable
    ADC/OPP/Thermal Zones/TSU
  riscv: dts: renesas: rzfive-smarc: Enable CANFD/I2C

 arch/riscv/Kconfig                            |  2 ++
 arch/riscv/boot/dts/renesas/r9a07g043f.dtsi   |  2 ++
 .../boot/dts/renesas/rzfive-smarc-som.dtsi    | 11 --------
 arch/riscv/boot/dts/renesas/rzfive-smarc.dtsi | 27 -------------------
 4 files changed, 4 insertions(+), 38 deletions(-)

-- 
2.25.1

[PATCH 0/3] RZ/Five: Enable ADC/CANFD/I2C/OPP/Thermal Zones/TSU

[Prabhakar]

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Hi All,

This patch series aims to enable support for below blocks
on RZ/Five SoC/SMARC EVK:
- ADC
- CANFD
- I2C
- OPP
- Thermal Zones
- TSU

Note, patches apply on top of [0].

[0] https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git/log/?h=renesas-riscv-dt-for-v6.2

Cheers,
Prabhakar

Lad Prabhakar (3):
  riscv: Kconfig: Enable cpufreq kconfig menu
  riscv: dts: renesas: r9a07g043f/rzfive-smarc-som: Enable
    ADC/OPP/Thermal Zones/TSU
  riscv: dts: renesas: rzfive-smarc: Enable CANFD/I2C

 arch/riscv/Kconfig                            |  2 ++
 arch/riscv/boot/dts/renesas/r9a07g043f.dtsi   |  2 ++
 .../boot/dts/renesas/rzfive-smarc-som.dtsi    | 11 --------
 arch/riscv/boot/dts/renesas/rzfive-smarc.dtsi | 27 -------------------
 4 files changed, 4 insertions(+), 38 deletions(-)

-- 
2.25.1


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[PATCH 1/3] riscv: Kconfig: Enable cpufreq kconfig menu

[Prabhakar]

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Enable cpufreq kconfig menu for RISC-V.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 arch/riscv/Kconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index fa78595a6089..ce905454a3bf 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -691,6 +691,8 @@ menu "CPU Power Management"
 
 source "drivers/cpuidle/Kconfig"
 
+source "drivers/cpufreq/Kconfig"
+
 endmenu # "CPU Power Management"
 
 source "arch/riscv/kvm/Kconfig"
-- 
2.25.1

[PATCH 1/3] riscv: Kconfig: Enable cpufreq kconfig menu

[Prabhakar]

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Enable cpufreq kconfig menu for RISC-V.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 arch/riscv/Kconfig | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index fa78595a6089..ce905454a3bf 100644
--- a/arch/riscv/Kconfig
+++ b/arch/riscv/Kconfig
@@ -691,6 +691,8 @@ menu "CPU Power Management"
 
 source "drivers/cpuidle/Kconfig"
 
+source "drivers/cpufreq/Kconfig"
+
 endmenu # "CPU Power Management"
 
 source "arch/riscv/kvm/Kconfig"
-- 
2.25.1


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[PATCH 2/3] riscv: dts: renesas: r9a07g043f/rzfive-smarc-som: Enable ADC/OPP/Thermal Zones/TSU

[Prabhakar]

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Enable support for below blocks found on RZ/Five SMARC EVK SoC/SoM:
- ADC
- OPP
- Thermal Zones
- TSU

Note, these blocks are enabled in RZ/G2UL SMARC SoM DTSI [0] hence
deleting these disabled nodes from RZ/Five SMARC SoM DTSI enables them
here too as we include [0] in RZ/Five SMARC SoM DTSI.

[0] arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 arch/riscv/boot/dts/renesas/r9a07g043f.dtsi       |  2 ++
 arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi | 11 -----------
 2 files changed, 2 insertions(+), 11 deletions(-)

diff --git a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
index 50134be548f5..6ec1c6f9a403 100644
--- a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
+++ b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
@@ -20,6 +20,7 @@ cpus {
 		cpu0: cpu@0 {
 			compatible = "andestech,ax45mp", "riscv";
 			device_type = "cpu";
+			#cooling-cells = <2>;
 			reg = <0x0>;
 			status = "okay";
 			riscv,isa = "rv64imafdc";
@@ -29,6 +30,7 @@ cpu0: cpu@0 {
 			d-cache-size = <0x8000>;
 			d-cache-line-size = <0x40>;
 			clocks = <&cpg CPG_CORE R9A07G043_CLK_I>;
+			operating-points-v2 = <&cluster0_opp>;
 
 			cpu0_intc: interrupt-controller {
 				#interrupt-cells = <1>;
diff --git a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
index 45a182fa3b4b..2b7672bc4b52 100644
--- a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
+++ b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
@@ -16,13 +16,6 @@ aliases {
 	chosen {
 		bootargs = "ignore_loglevel";
 	};
-
-	/delete-node/opp-table-0;
-	/delete-node/thermal-zones;
-};
-
-&adc {
-	status = "disabled";
 };
 
 &dmac {
@@ -49,10 +42,6 @@ &sdhi0 {
 	status = "disabled";
 };
 
-&tsu {
-	status = "disabled";
-};
-
 &wdt0 {
 	status = "disabled";
 };
-- 
2.25.1

[PATCH 2/3] riscv: dts: renesas: r9a07g043f/rzfive-smarc-som: Enable ADC/OPP/Thermal Zones/TSU

[Prabhakar]

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Enable support for below blocks found on RZ/Five SMARC EVK SoC/SoM:
- ADC
- OPP
- Thermal Zones
- TSU

Note, these blocks are enabled in RZ/G2UL SMARC SoM DTSI [0] hence
deleting these disabled nodes from RZ/Five SMARC SoM DTSI enables them
here too as we include [0] in RZ/Five SMARC SoM DTSI.

[0] arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 arch/riscv/boot/dts/renesas/r9a07g043f.dtsi       |  2 ++
 arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi | 11 -----------
 2 files changed, 2 insertions(+), 11 deletions(-)

diff --git a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
index 50134be548f5..6ec1c6f9a403 100644
--- a/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
+++ b/arch/riscv/boot/dts/renesas/r9a07g043f.dtsi
@@ -20,6 +20,7 @@ cpus {
 		cpu0: cpu@0 {
 			compatible = "andestech,ax45mp", "riscv";
 			device_type = "cpu";
+			#cooling-cells = <2>;
 			reg = <0x0>;
 			status = "okay";
 			riscv,isa = "rv64imafdc";
@@ -29,6 +30,7 @@ cpu0: cpu@0 {
 			d-cache-size = <0x8000>;
 			d-cache-line-size = <0x40>;
 			clocks = <&cpg CPG_CORE R9A07G043_CLK_I>;
+			operating-points-v2 = <&cluster0_opp>;
 
 			cpu0_intc: interrupt-controller {
 				#interrupt-cells = <1>;
diff --git a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
index 45a182fa3b4b..2b7672bc4b52 100644
--- a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
+++ b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
@@ -16,13 +16,6 @@ aliases {
 	chosen {
 		bootargs = "ignore_loglevel";
 	};
-
-	/delete-node/opp-table-0;
-	/delete-node/thermal-zones;
-};
-
-&adc {
-	status = "disabled";
 };
 
 &dmac {
@@ -49,10 +42,6 @@ &sdhi0 {
 	status = "disabled";
 };
 
-&tsu {
-	status = "disabled";
-};
-
 &wdt0 {
 	status = "disabled";
 };
-- 
2.25.1


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[PATCH 3/3] riscv: dts: renesas: rzfive-smarc: Enable CANFD/I2C

[Prabhakar]

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Enable CANFD and I2C on RZ/Five SMARC EVK.

Note, these blocks are enabled in RZ/G2UL SMARC EVK DTSI [0] hence
deleting these disabled nodes from RZ/Five SMARC EVK DTSI enables them
here too as we include [0] in RZ/Five SMARC EVK DTSI.

[0] arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 arch/riscv/boot/dts/renesas/rzfive-smarc.dtsi | 27 -------------------
 1 file changed, 27 deletions(-)

diff --git a/arch/riscv/boot/dts/renesas/rzfive-smarc.dtsi b/arch/riscv/boot/dts/renesas/rzfive-smarc.dtsi
index e64f0e5f8e30..c07a487c4e5a 100644
--- a/arch/riscv/boot/dts/renesas/rzfive-smarc.dtsi
+++ b/arch/riscv/boot/dts/renesas/rzfive-smarc.dtsi
@@ -7,25 +7,6 @@
 
 #include <arm64/renesas/rzg2ul-smarc.dtsi>
 
-/ {
-	aliases {
-		/delete-property/ i2c0;
-		/delete-property/ i2c1;
-	};
-};
-
-&canfd {
-	status = "disabled";
-
-	channel0 {
-		status = "disabled";
-	};
-
-	channel1 {
-		status = "disabled";
-	};
-};
-
 &ehci0 {
 	status = "disabled";
 };
@@ -38,14 +19,6 @@ &hsusb {
 	status = "disabled";
 };
 
-&i2c0 {
-	status = "disabled";
-};
-
-&i2c1 {
-	status = "disabled";
-};
-
 &ohci0 {
 	status = "disabled";
 };
-- 
2.25.1

[PATCH 3/3] riscv: dts: renesas: rzfive-smarc: Enable CANFD/I2C

[Prabhakar]

From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Enable CANFD and I2C on RZ/Five SMARC EVK.

Note, these blocks are enabled in RZ/G2UL SMARC EVK DTSI [0] hence
deleting these disabled nodes from RZ/Five SMARC EVK DTSI enables them
here too as we include [0] in RZ/Five SMARC EVK DTSI.

[0] arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 arch/riscv/boot/dts/renesas/rzfive-smarc.dtsi | 27 -------------------
 1 file changed, 27 deletions(-)

diff --git a/arch/riscv/boot/dts/renesas/rzfive-smarc.dtsi b/arch/riscv/boot/dts/renesas/rzfive-smarc.dtsi
index e64f0e5f8e30..c07a487c4e5a 100644
--- a/arch/riscv/boot/dts/renesas/rzfive-smarc.dtsi
+++ b/arch/riscv/boot/dts/renesas/rzfive-smarc.dtsi
@@ -7,25 +7,6 @@
 
 #include <arm64/renesas/rzg2ul-smarc.dtsi>
 
-/ {
-	aliases {
-		/delete-property/ i2c0;
-		/delete-property/ i2c1;
-	};
-};
-
-&canfd {
-	status = "disabled";
-
-	channel0 {
-		status = "disabled";
-	};
-
-	channel1 {
-		status = "disabled";
-	};
-};
-
 &ehci0 {
 	status = "disabled";
 };
@@ -38,14 +19,6 @@ &hsusb {
 	status = "disabled";
 };
 
-&i2c0 {
-	status = "disabled";
-};
-
-&i2c1 {
-	status = "disabled";
-};
-
 &ohci0 {
 	status = "disabled";
 };
-- 
2.25.1


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Re: [PATCH 1/3] riscv: Kconfig: Enable cpufreq kconfig menu

[Conor Dooley]

On Tue, Nov 15, 2022 at 10:51:33AM +0000, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> 
> Enable cpufreq kconfig menu for RISC-V.

Yes, please. It was on my todo list to dig this one out and un-archive
it on patchwork:
https://lore.kernel.org/linux-riscv/20220718180713.451507-1-mail@conchuod.ie/

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

> 
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> ---
>  arch/riscv/Kconfig | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index fa78595a6089..ce905454a3bf 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -691,6 +691,8 @@ menu "CPU Power Management"
>  
>  source "drivers/cpuidle/Kconfig"
>  
> +source "drivers/cpufreq/Kconfig"
> +
>  endmenu # "CPU Power Management"
>  
>  source "arch/riscv/kvm/Kconfig"
> -- 
> 2.25.1
> 

Re: [PATCH 1/3] riscv: Kconfig: Enable cpufreq kconfig menu

[Conor Dooley]

On Tue, Nov 15, 2022 at 10:51:33AM +0000, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> 
> Enable cpufreq kconfig menu for RISC-V.

Yes, please. It was on my todo list to dig this one out and un-archive
it on patchwork:
https://lore.kernel.org/linux-riscv/20220718180713.451507-1-mail@conchuod.ie/

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

> 
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> ---
>  arch/riscv/Kconfig | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
> index fa78595a6089..ce905454a3bf 100644
> --- a/arch/riscv/Kconfig
> +++ b/arch/riscv/Kconfig
> @@ -691,6 +691,8 @@ menu "CPU Power Management"
>  
>  source "drivers/cpuidle/Kconfig"
>  
> +source "drivers/cpufreq/Kconfig"
> +
>  endmenu # "CPU Power Management"
>  
>  source "arch/riscv/kvm/Kconfig"
> -- 
> 2.25.1
> 

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Re: [PATCH 0/3] RZ/Five: Enable ADC/CANFD/I2C/OPP/Thermal Zones/TSU

[Conor Dooley]

On Tue, Nov 15, 2022 at 10:51:32AM +0000, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> 
> Hi All,
> 
> This patch series aims to enable support for below blocks
> on RZ/Five SoC/SMARC EVK:
> - ADC
> - CANFD
> - I2C
> - OPP
> - Thermal Zones
> - TSU
> 
> Note, patches apply on top of [0].
> 
> [0] https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git/log/?h=renesas-riscv-dt-for-v6.2
> 
> Cheers,
> Prabhakar
> 
> Lad Prabhakar (3):
>   riscv: Kconfig: Enable cpufreq kconfig menu
>   riscv: dts: renesas: r9a07g043f/rzfive-smarc-som: Enable
>     ADC/OPP/Thermal Zones/TSU
>   riscv: dts: renesas: rzfive-smarc: Enable CANFD/I2C

I know ~nothing about your SoC so idk if the values are correct, but I
did give it a go earlier to see if it did anything warning wise. Seeing
that it didn't cause any I am curious - how come these didn't land in
the original dts? Just waiting for driver stuff to land to support it?

Anyway, no new warnings which is what I care about - I suppose that
makes it an acked-by?
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Can include that tag if you like. Either way, nice to see some of the
/delete-node/s etc being removed.

Thanks,
Conor.

> 
>  arch/riscv/Kconfig                            |  2 ++
>  arch/riscv/boot/dts/renesas/r9a07g043f.dtsi   |  2 ++
>  .../boot/dts/renesas/rzfive-smarc-som.dtsi    | 11 --------
>  arch/riscv/boot/dts/renesas/rzfive-smarc.dtsi | 27 -------------------
>  4 files changed, 4 insertions(+), 38 deletions(-)
> 
> -- 
> 2.25.1
> 

Re: [PATCH 0/3] RZ/Five: Enable ADC/CANFD/I2C/OPP/Thermal Zones/TSU

[Conor Dooley]

On Tue, Nov 15, 2022 at 10:51:32AM +0000, Prabhakar wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> 
> Hi All,
> 
> This patch series aims to enable support for below blocks
> on RZ/Five SoC/SMARC EVK:
> - ADC
> - CANFD
> - I2C
> - OPP
> - Thermal Zones
> - TSU
> 
> Note, patches apply on top of [0].
> 
> [0] https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git/log/?h=renesas-riscv-dt-for-v6.2
> 
> Cheers,
> Prabhakar
> 
> Lad Prabhakar (3):
>   riscv: Kconfig: Enable cpufreq kconfig menu
>   riscv: dts: renesas: r9a07g043f/rzfive-smarc-som: Enable
>     ADC/OPP/Thermal Zones/TSU
>   riscv: dts: renesas: rzfive-smarc: Enable CANFD/I2C

I know ~nothing about your SoC so idk if the values are correct, but I
did give it a go earlier to see if it did anything warning wise. Seeing
that it didn't cause any I am curious - how come these didn't land in
the original dts? Just waiting for driver stuff to land to support it?

Anyway, no new warnings which is what I care about - I suppose that
makes it an acked-by?
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Can include that tag if you like. Either way, nice to see some of the
/delete-node/s etc being removed.

Thanks,
Conor.

> 
>  arch/riscv/Kconfig                            |  2 ++
>  arch/riscv/boot/dts/renesas/r9a07g043f.dtsi   |  2 ++
>  .../boot/dts/renesas/rzfive-smarc-som.dtsi    | 11 --------
>  arch/riscv/boot/dts/renesas/rzfive-smarc.dtsi | 27 -------------------
>  4 files changed, 4 insertions(+), 38 deletions(-)
> 
> -- 
> 2.25.1
> 

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Re: [PATCH 0/3] RZ/Five: Enable ADC/CANFD/I2C/OPP/Thermal Zones/TSU

[Lad, Prabhakar]

Hi Conor,

Thank you for the review.

On Tue, Nov 15, 2022 at 2:21 PM Conor Dooley <conor.dooley@microchip.com> wrote:
>
> On Tue, Nov 15, 2022 at 10:51:32AM +0000, Prabhakar wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > Hi All,
> >
> > This patch series aims to enable support for below blocks
> > on RZ/Five SoC/SMARC EVK:
> > - ADC
> > - CANFD
> > - I2C
> > - OPP
> > - Thermal Zones
> > - TSU
> >
> > Note, patches apply on top of [0].
> >
> > [0] https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git/log/?h=renesas-riscv-dt-for-v6.2
> >
> > Cheers,
> > Prabhakar
> >
> > Lad Prabhakar (3):
> >   riscv: Kconfig: Enable cpufreq kconfig menu
> >   riscv: dts: renesas: r9a07g043f/rzfive-smarc-som: Enable
> >     ADC/OPP/Thermal Zones/TSU
> >   riscv: dts: renesas: rzfive-smarc: Enable CANFD/I2C
>
> I know ~nothing about your SoC so idk if the values are correct, but I
> did give it a go earlier to see if it did anything warning wise. Seeing
> that it didn't cause any I am curious - how come these didn't land in
> the original dts? Just waiting for driver stuff to land to support it?
>
I wanted bare minimal stuff in the initial patchset.

> Anyway, no new warnings which is what I care about - I suppose that
> makes it an acked-by?
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> Can include that tag if you like. Either way, nice to see some of the
> /delete-node/s etc being removed.
>
Thanks, Geert should pick the tag while picking the DTS/I patches.

For the Kconfig patch it needs to go via the RISCV tree or can that be
picked by Geert too with the rest of the other patches?

Cheers,
Prabhakar

Re: [PATCH 0/3] RZ/Five: Enable ADC/CANFD/I2C/OPP/Thermal Zones/TSU

[Lad, Prabhakar]

Hi Conor,

Thank you for the review.

On Tue, Nov 15, 2022 at 2:21 PM Conor Dooley <conor.dooley@microchip.com> wrote:
>
> On Tue, Nov 15, 2022 at 10:51:32AM +0000, Prabhakar wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > Hi All,
> >
> > This patch series aims to enable support for below blocks
> > on RZ/Five SoC/SMARC EVK:
> > - ADC
> > - CANFD
> > - I2C
> > - OPP
> > - Thermal Zones
> > - TSU
> >
> > Note, patches apply on top of [0].
> >
> > [0] https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git/log/?h=renesas-riscv-dt-for-v6.2
> >
> > Cheers,
> > Prabhakar
> >
> > Lad Prabhakar (3):
> >   riscv: Kconfig: Enable cpufreq kconfig menu
> >   riscv: dts: renesas: r9a07g043f/rzfive-smarc-som: Enable
> >     ADC/OPP/Thermal Zones/TSU
> >   riscv: dts: renesas: rzfive-smarc: Enable CANFD/I2C
>
> I know ~nothing about your SoC so idk if the values are correct, but I
> did give it a go earlier to see if it did anything warning wise. Seeing
> that it didn't cause any I am curious - how come these didn't land in
> the original dts? Just waiting for driver stuff to land to support it?
>
I wanted bare minimal stuff in the initial patchset.

> Anyway, no new warnings which is what I care about - I suppose that
> makes it an acked-by?
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
> Can include that tag if you like. Either way, nice to see some of the
> /delete-node/s etc being removed.
>
Thanks, Geert should pick the tag while picking the DTS/I patches.

For the Kconfig patch it needs to go via the RISCV tree or can that be
picked by Geert too with the rest of the other patches?

Cheers,
Prabhakar

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Re: [PATCH 2/3] riscv: dts: renesas: r9a07g043f/rzfive-smarc-som: Enable ADC/OPP/Thermal Zones/TSU

[Geert Uytterhoeven]

Hi Prabhakar,

On Tue, Nov 15, 2022 at 11:51 AM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Enable support for below blocks found on RZ/Five SMARC EVK SoC/SoM:
> - ADC
> - OPP
> - Thermal Zones
> - TSU
>
> Note, these blocks are enabled in RZ/G2UL SMARC SoM DTSI [0] hence
> deleting these disabled nodes from RZ/Five SMARC SoM DTSI enables them
> here too as we include [0] in RZ/Five SMARC SoM DTSI.
>
> [0] arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Thanks for your patch!

> --- a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
> +++ b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
> @@ -16,13 +16,6 @@ aliases {
>         chosen {
>                 bootargs = "ignore_loglevel";
>         };
> -
> -       /delete-node/opp-table-0;
> -       /delete-node/thermal-zones;
> -};
> -
> -&adc {
> -       status = "disabled";

I believe this is not sufficient to enable the ADC, as it is disabled
by default?
So this needs to set the status to "okay" and configure pin
control, depending on SW_SW0_DEV_SEL, just like in
arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi?

The rest LGTM.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 2/3] riscv: dts: renesas: r9a07g043f/rzfive-smarc-som: Enable ADC/OPP/Thermal Zones/TSU

[Geert Uytterhoeven]

Hi Prabhakar,

On Tue, Nov 15, 2022 at 11:51 AM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Enable support for below blocks found on RZ/Five SMARC EVK SoC/SoM:
> - ADC
> - OPP
> - Thermal Zones
> - TSU
>
> Note, these blocks are enabled in RZ/G2UL SMARC SoM DTSI [0] hence
> deleting these disabled nodes from RZ/Five SMARC SoM DTSI enables them
> here too as we include [0] in RZ/Five SMARC SoM DTSI.
>
> [0] arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Thanks for your patch!

> --- a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
> +++ b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
> @@ -16,13 +16,6 @@ aliases {
>         chosen {
>                 bootargs = "ignore_loglevel";
>         };
> -
> -       /delete-node/opp-table-0;
> -       /delete-node/thermal-zones;
> -};
> -
> -&adc {
> -       status = "disabled";

I believe this is not sufficient to enable the ADC, as it is disabled
by default?
So this needs to set the status to "okay" and configure pin
control, depending on SW_SW0_DEV_SEL, just like in
arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi?

The rest LGTM.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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Re: [PATCH 2/3] riscv: dts: renesas: r9a07g043f/rzfive-smarc-som: Enable ADC/OPP/Thermal Zones/TSU

[Geert Uytterhoeven]

Hi Prabhakar,

On Wed, Nov 16, 2022 at 10:03 AM Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> On Tue, Nov 15, 2022 at 11:51 AM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > Enable support for below blocks found on RZ/Five SMARC EVK SoC/SoM:
> > - ADC
> > - OPP
> > - Thermal Zones
> > - TSU
> >
> > Note, these blocks are enabled in RZ/G2UL SMARC SoM DTSI [0] hence
> > deleting these disabled nodes from RZ/Five SMARC SoM DTSI enables them
> > here too as we include [0] in RZ/Five SMARC SoM DTSI.
> >
> > [0] arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Thanks for your patch!
>
> > --- a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
> > +++ b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
> > @@ -16,13 +16,6 @@ aliases {
> >         chosen {
> >                 bootargs = "ignore_loglevel";
> >         };
> > -
> > -       /delete-node/opp-table-0;
> > -       /delete-node/thermal-zones;
> > -};
> > -
> > -&adc {
> > -       status = "disabled";
>
> I believe this is not sufficient to enable the ADC, as it is disabled
> by default?
> So this needs to set the status to "okay" and configure pin
> control, depending on SW_SW0_DEV_SEL, just like in
> arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi?

Sorry, scrap that. grabbing my morning coffee *now*.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 2/3] riscv: dts: renesas: r9a07g043f/rzfive-smarc-som: Enable ADC/OPP/Thermal Zones/TSU

[Geert Uytterhoeven]

Hi Prabhakar,

On Wed, Nov 16, 2022 at 10:03 AM Geert Uytterhoeven
<geert@linux-m68k.org> wrote:
> On Tue, Nov 15, 2022 at 11:51 AM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> >
> > Enable support for below blocks found on RZ/Five SMARC EVK SoC/SoM:
> > - ADC
> > - OPP
> > - Thermal Zones
> > - TSU
> >
> > Note, these blocks are enabled in RZ/G2UL SMARC SoM DTSI [0] hence
> > deleting these disabled nodes from RZ/Five SMARC SoM DTSI enables them
> > here too as we include [0] in RZ/Five SMARC SoM DTSI.
> >
> > [0] arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi
> >
> > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Thanks for your patch!
>
> > --- a/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
> > +++ b/arch/riscv/boot/dts/renesas/rzfive-smarc-som.dtsi
> > @@ -16,13 +16,6 @@ aliases {
> >         chosen {
> >                 bootargs = "ignore_loglevel";
> >         };
> > -
> > -       /delete-node/opp-table-0;
> > -       /delete-node/thermal-zones;
> > -};
> > -
> > -&adc {
> > -       status = "disabled";
>
> I believe this is not sufficient to enable the ADC, as it is disabled
> by default?
> So this needs to set the status to "okay" and configure pin
> control, depending on SW_SW0_DEV_SEL, just like in
> arch/arm64/boot/dts/renesas/rzg2ul-smarc-som.dtsi?

Sorry, scrap that. grabbing my morning coffee *now*.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

_______________________________________________
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Re: [PATCH 3/3] riscv: dts: renesas: rzfive-smarc: Enable CANFD/I2C

[Geert Uytterhoeven]

On Tue, Nov 15, 2022 at 11:57 AM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Enable CANFD and I2C on RZ/Five SMARC EVK.
>
> Note, these blocks are enabled in RZ/G2UL SMARC EVK DTSI [0] hence
> deleting these disabled nodes from RZ/Five SMARC EVK DTSI enables them
> here too as we include [0] in RZ/Five SMARC EVK DTSI.
>
> [0] arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.2, with the other DTS patch.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 3/3] riscv: dts: renesas: rzfive-smarc: Enable CANFD/I2C

[Geert Uytterhoeven]

On Tue, Nov 15, 2022 at 11:57 AM Prabhakar <prabhakar.csengg@gmail.com> wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
>
> Enable CANFD and I2C on RZ/Five SMARC EVK.
>
> Note, these blocks are enabled in RZ/G2UL SMARC EVK DTSI [0] hence
> deleting these disabled nodes from RZ/Five SMARC EVK DTSI enables them
> here too as we include [0] in RZ/Five SMARC EVK DTSI.
>
> [0] arch/arm64/boot/dts/renesas/rzg2ul-smarc.dtsi
>
> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
i.e. will queue in renesas-devel for v6.2, with the other DTS patch.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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Re: [PATCH 0/3] RZ/Five: Enable ADC/CANFD/I2C/OPP/Thermal Zones/TSU

[Geert Uytterhoeven]

On Tue, Nov 15, 2022 at 7:23 PM Lad, Prabhakar
<prabhakar.csengg@gmail.com> wrote:
> On Tue, Nov 15, 2022 at 2:21 PM Conor Dooley <conor.dooley@microchip.com> wrote:
> > On Tue, Nov 15, 2022 at 10:51:32AM +0000, Prabhakar wrote:
> > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > >
> > > Hi All,
> > >
> > > This patch series aims to enable support for below blocks
> > > on RZ/Five SoC/SMARC EVK:
> > > - ADC
> > > - CANFD
> > > - I2C
> > > - OPP
> > > - Thermal Zones
> > > - TSU
> > >
> > > Note, patches apply on top of [0].
> > >
> > > [0] https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git/log/?h=renesas-riscv-dt-for-v6.2
> > >
> > > Cheers,
> > > Prabhakar
> > >
> > > Lad Prabhakar (3):
> > >   riscv: Kconfig: Enable cpufreq kconfig menu
> > >   riscv: dts: renesas: r9a07g043f/rzfive-smarc-som: Enable
> > >     ADC/OPP/Thermal Zones/TSU
> > >   riscv: dts: renesas: rzfive-smarc: Enable CANFD/I2C
> >
> > I know ~nothing about your SoC so idk if the values are correct, but I
> > did give it a go earlier to see if it did anything warning wise. Seeing
> > that it didn't cause any I am curious - how come these didn't land in
> > the original dts? Just waiting for driver stuff to land to support it?
> >
> I wanted bare minimal stuff in the initial patchset.
>
> > Anyway, no new warnings which is what I care about - I suppose that
> > makes it an acked-by?
> > Acked-by: Conor Dooley <conor.dooley@microchip.com>
> > Can include that tag if you like. Either way, nice to see some of the
> > /delete-node/s etc being removed.
> >
> Thanks, Geert should pick the tag while picking the DTS/I patches.
>
> For the Kconfig patch it needs to go via the RISCV tree or can that be
> picked by Geert too with the rest of the other patches?

IMHO the Kconfig patch (or Conor's earlier version) should go through
the RISCV tree, as there is no hard dependency.

Yes, I can take it with an Acked-by, if all else fails, but the soc deadline
is near.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH 0/3] RZ/Five: Enable ADC/CANFD/I2C/OPP/Thermal Zones/TSU

[Geert Uytterhoeven]

On Tue, Nov 15, 2022 at 7:23 PM Lad, Prabhakar
<prabhakar.csengg@gmail.com> wrote:
> On Tue, Nov 15, 2022 at 2:21 PM Conor Dooley <conor.dooley@microchip.com> wrote:
> > On Tue, Nov 15, 2022 at 10:51:32AM +0000, Prabhakar wrote:
> > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> > >
> > > Hi All,
> > >
> > > This patch series aims to enable support for below blocks
> > > on RZ/Five SoC/SMARC EVK:
> > > - ADC
> > > - CANFD
> > > - I2C
> > > - OPP
> > > - Thermal Zones
> > > - TSU
> > >
> > > Note, patches apply on top of [0].
> > >
> > > [0] https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git/log/?h=renesas-riscv-dt-for-v6.2
> > >
> > > Cheers,
> > > Prabhakar
> > >
> > > Lad Prabhakar (3):
> > >   riscv: Kconfig: Enable cpufreq kconfig menu
> > >   riscv: dts: renesas: r9a07g043f/rzfive-smarc-som: Enable
> > >     ADC/OPP/Thermal Zones/TSU
> > >   riscv: dts: renesas: rzfive-smarc: Enable CANFD/I2C
> >
> > I know ~nothing about your SoC so idk if the values are correct, but I
> > did give it a go earlier to see if it did anything warning wise. Seeing
> > that it didn't cause any I am curious - how come these didn't land in
> > the original dts? Just waiting for driver stuff to land to support it?
> >
> I wanted bare minimal stuff in the initial patchset.
>
> > Anyway, no new warnings which is what I care about - I suppose that
> > makes it an acked-by?
> > Acked-by: Conor Dooley <conor.dooley@microchip.com>
> > Can include that tag if you like. Either way, nice to see some of the
> > /delete-node/s etc being removed.
> >
> Thanks, Geert should pick the tag while picking the DTS/I patches.
>
> For the Kconfig patch it needs to go via the RISCV tree or can that be
> picked by Geert too with the rest of the other patches?

IMHO the Kconfig patch (or Conor's earlier version) should go through
the RISCV tree, as there is no hard dependency.

Yes, I can take it with an Acked-by, if all else fails, but the soc deadline
is near.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

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Re: [PATCH 0/3] RZ/Five: Enable ADC/CANFD/I2C/OPP/Thermal Zones/TSU

[patchwork-bot+linux-riscv]

Hello:

This series was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@rivosinc.com>:

On Tue, 15 Nov 2022 10:51:32 +0000 you wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> 
> Hi All,
> 
> This patch series aims to enable support for below blocks
> on RZ/Five SoC/SMARC EVK:
> - ADC
> - CANFD
> - I2C
> - OPP
> - Thermal Zones
> - TSU
> 
> [...]

Here is the summary with links:
  - [1/3] riscv: Kconfig: Enable cpufreq kconfig menu
    https://git.kernel.org/riscv/c/effae0e3d9e1
  - [2/3] riscv: dts: renesas: r9a07g043f/rzfive-smarc-som: Enable ADC/OPP/Thermal Zones/TSU
    (no matching commit)
  - [3/3] riscv: dts: renesas: rzfive-smarc: Enable CANFD/I2C
    (no matching commit)

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html

Re: [PATCH 0/3] RZ/Five: Enable ADC/CANFD/I2C/OPP/Thermal Zones/TSU

[patchwork-bot+linux-riscv]

Hello:

This series was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@rivosinc.com>:

On Tue, 15 Nov 2022 10:51:32 +0000 you wrote:
> From: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
> 
> Hi All,
> 
> This patch series aims to enable support for below blocks
> on RZ/Five SoC/SMARC EVK:
> - ADC
> - CANFD
> - I2C
> - OPP
> - Thermal Zones
> - TSU
> 
> [...]

Here is the summary with links:
  - [1/3] riscv: Kconfig: Enable cpufreq kconfig menu
    https://git.kernel.org/riscv/c/effae0e3d9e1
  - [2/3] riscv: dts: renesas: r9a07g043f/rzfive-smarc-som: Enable ADC/OPP/Thermal Zones/TSU
    (no matching commit)
  - [3/3] riscv: dts: renesas: rzfive-smarc: Enable CANFD/I2C
    (no matching commit)

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html



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