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From: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
To: Paul Cercueil <paul@crapouillou.net>
Cc: Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Ralf Baechle <ralf@linux-mips.org>,
	Paul Burton <paul.burton@mips.com>,
	James Hogan <jhogan@kernel.org>,
	Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>,
	Mathieu Malaterre <malat@debian.org>,
	Daniel Silsby <dansilsby@gmail.com>,
	dmaengine@vger.kernel.org,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>,
	open list <linux-kernel@vger.kernel.org>,
	Linux-MIPS <linux-mips@linux-mips.org>
Subject: [03/14] dmaengine: dma-jz4780: Use 4-word descriptors
Date: Wed, 4 Jul 2018 22:10:00 +0530	[thread overview]
Message-ID: <CANc+2y6iT=cDuzHibBuSvhp4s-e3y+Y4TcC_LBev+WXPaE_1rg@mail.gmail.com> (raw)

Hi Paul,

On 3 July 2018 at 18:02, Paul Cercueil <paul@crapouillou.net> wrote:
> The only information we use in the 8-word version of the hardware DMA
> descriptor that is not present in the 4-word version is the transfer
> type, aka. the ID of the source or recipient device.
>
> Since the transfer type will never change for a DMA channel in use,
> we can just set it once for all in the corresponding DMA register
> before starting any transfer.
>
> This has several benefits:
>
> * the driver will handle twice as many hardware DMA descriptors;
>
> * the driver is closer to support the JZ4740, which only supports 4-word
>   hardware DMA descriptors;
>
> * the JZ4770 SoC needs the transfer type to be set in the corresponding
>   DMA register anyway, even if 8-word descriptors are in use.
>
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
> ---
>  drivers/dma/dma-jz4780.c | 21 +++++++++------------
>  1 file changed, 9 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/dma/dma-jz4780.c b/drivers/dma/dma-jz4780.c
> index 4d234caf5d62..cd2cd70fd843 100644
> --- a/drivers/dma/dma-jz4780.c
> +++ b/drivers/dma/dma-jz4780.c
> @@ -93,17 +93,12 @@
>   * @dtc: transfer count (number of blocks of the transfer size specified in DCM
>   * to transfer) in the low 24 bits, offset of the next descriptor from the
>   * descriptor base address in the upper 8 bits.
> - * @sd: target/source stride difference (in stride transfer mode).
> - * @drt: request type
>   */
>  struct jz4780_dma_hwdesc {
>         uint32_t dcm;
>         uint32_t dsa;
>         uint32_t dta;
>         uint32_t dtc;
> -       uint32_t sd;
> -       uint32_t drt;
> -       uint32_t reserved[2];
>  };
>
>  /* Size of allocations for hardware descriptor blocks. */
> @@ -280,7 +275,6 @@ static int jz4780_dma_setup_hwdesc(struct jz4780_dma_chan *jzchan,
>                 desc->dcm = JZ_DMA_DCM_SAI;
>                 desc->dsa = addr;
>                 desc->dta = config->dst_addr;
> -               desc->drt = jzchan->transfer_type;
>
>                 width = config->dst_addr_width;
>                 maxburst = config->dst_maxburst;
> @@ -288,7 +282,6 @@ static int jz4780_dma_setup_hwdesc(struct jz4780_dma_chan *jzchan,
>                 desc->dcm = JZ_DMA_DCM_DAI;
>                 desc->dsa = config->src_addr;
>                 desc->dta = addr;
> -               desc->drt = jzchan->transfer_type;
>
>                 width = config->src_addr_width;
>                 maxburst = config->src_maxburst;
> @@ -433,9 +426,10 @@ static struct dma_async_tx_descriptor *jz4780_dma_prep_dma_memcpy(
>         tsz = jz4780_dma_transfer_size(dest | src | len,
>                                        &jzchan->transfer_shift);
>
> +       jzchan->transfer_type = JZ_DMA_DRT_AUTO;
> +
>         desc->desc[0].dsa = src;
>         desc->desc[0].dta = dest;
> -       desc->desc[0].drt = JZ_DMA_DRT_AUTO;
>         desc->desc[0].dcm = JZ_DMA_DCM_TIE | JZ_DMA_DCM_SAI | JZ_DMA_DCM_DAI |
>                             tsz << JZ_DMA_DCM_TSZ_SHIFT |
>                             JZ_DMA_WIDTH_32_BIT << JZ_DMA_DCM_SP_SHIFT |
> @@ -490,9 +484,12 @@ static void jz4780_dma_begin(struct jz4780_dma_chan *jzchan)
>                         (jzchan->curr_hwdesc + 1) % jzchan->desc->count;
>         }
>
> -       /* Use 8-word descriptors. */
> -       jz4780_dma_chn_writel(jzdma, jzchan->id,
> -                             JZ_DMA_REG_DCS, JZ_DMA_DCS_DES8);
> +       /* Use 4-word descriptors. */
> +       jz4780_dma_chn_writel(jzdma, jzchan->id, JZ_DMA_REG_DCS, 0);
> +
> +       /* Set transfer type. */
> +       jz4780_dma_chn_writel(jzdma, jzchan->id, JZ_DMA_REG_DRT,
> +                             jzchan->transfer_type);
>
>         /* Write descriptor address and initiate descriptor fetch. */
>         desc_phys = jzchan->desc->desc_phys +
> @@ -502,7 +499,7 @@ static void jz4780_dma_begin(struct jz4780_dma_chan *jzchan)
>
>         /* Enable the channel. */
>         jz4780_dma_chn_writel(jzdma, jzchan->id, JZ_DMA_REG_DCS,
> -                             JZ_DMA_DCS_DES8 | JZ_DMA_DCS_CTE);
> +                             JZ_DMA_DCS_CTE);
>  }
>
>  static void jz4780_dma_issue_pending(struct dma_chan *chan)
> --
> 2.18.0
>
>

Patch looks good to me.
Reviewed-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>

Regards,
PrasannaKumar
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WARNING: multiple messages have this Message-ID (diff)
From: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
To: Paul Cercueil <paul@crapouillou.net>
Cc: Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Ralf Baechle <ralf@linux-mips.org>,
	Paul Burton <paul.burton@mips.com>,
	James Hogan <jhogan@kernel.org>,
	Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>,
	Mathieu Malaterre <malat@debian.org>,
	Daniel Silsby <dansilsby@gmail.com>,
	dmaengine@vger.kernel.org,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" 
	<devicetree@vger.kernel.org>,
	open list <linux-kernel@vger.kernel.org>,
	Linux-MIPS <linux-mips@linux-mips.org>
Subject: Re: [PATCH 03/14] dmaengine: dma-jz4780: Use 4-word descriptors
Date: Wed, 4 Jul 2018 22:10:00 +0530	[thread overview]
Message-ID: <CANc+2y6iT=cDuzHibBuSvhp4s-e3y+Y4TcC_LBev+WXPaE_1rg@mail.gmail.com> (raw)
In-Reply-To: <20180703123214.23090-4-paul@crapouillou.net>

Hi Paul,

On 3 July 2018 at 18:02, Paul Cercueil <paul@crapouillou.net> wrote:
> The only information we use in the 8-word version of the hardware DMA
> descriptor that is not present in the 4-word version is the transfer
> type, aka. the ID of the source or recipient device.
>
> Since the transfer type will never change for a DMA channel in use,
> we can just set it once for all in the corresponding DMA register
> before starting any transfer.
>
> This has several benefits:
>
> * the driver will handle twice as many hardware DMA descriptors;
>
> * the driver is closer to support the JZ4740, which only supports 4-word
>   hardware DMA descriptors;
>
> * the JZ4770 SoC needs the transfer type to be set in the corresponding
>   DMA register anyway, even if 8-word descriptors are in use.
>
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
> ---
>  drivers/dma/dma-jz4780.c | 21 +++++++++------------
>  1 file changed, 9 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/dma/dma-jz4780.c b/drivers/dma/dma-jz4780.c
> index 4d234caf5d62..cd2cd70fd843 100644
> --- a/drivers/dma/dma-jz4780.c
> +++ b/drivers/dma/dma-jz4780.c
> @@ -93,17 +93,12 @@
>   * @dtc: transfer count (number of blocks of the transfer size specified in DCM
>   * to transfer) in the low 24 bits, offset of the next descriptor from the
>   * descriptor base address in the upper 8 bits.
> - * @sd: target/source stride difference (in stride transfer mode).
> - * @drt: request type
>   */
>  struct jz4780_dma_hwdesc {
>         uint32_t dcm;
>         uint32_t dsa;
>         uint32_t dta;
>         uint32_t dtc;
> -       uint32_t sd;
> -       uint32_t drt;
> -       uint32_t reserved[2];
>  };
>
>  /* Size of allocations for hardware descriptor blocks. */
> @@ -280,7 +275,6 @@ static int jz4780_dma_setup_hwdesc(struct jz4780_dma_chan *jzchan,
>                 desc->dcm = JZ_DMA_DCM_SAI;
>                 desc->dsa = addr;
>                 desc->dta = config->dst_addr;
> -               desc->drt = jzchan->transfer_type;
>
>                 width = config->dst_addr_width;
>                 maxburst = config->dst_maxburst;
> @@ -288,7 +282,6 @@ static int jz4780_dma_setup_hwdesc(struct jz4780_dma_chan *jzchan,
>                 desc->dcm = JZ_DMA_DCM_DAI;
>                 desc->dsa = config->src_addr;
>                 desc->dta = addr;
> -               desc->drt = jzchan->transfer_type;
>
>                 width = config->src_addr_width;
>                 maxburst = config->src_maxburst;
> @@ -433,9 +426,10 @@ static struct dma_async_tx_descriptor *jz4780_dma_prep_dma_memcpy(
>         tsz = jz4780_dma_transfer_size(dest | src | len,
>                                        &jzchan->transfer_shift);
>
> +       jzchan->transfer_type = JZ_DMA_DRT_AUTO;
> +
>         desc->desc[0].dsa = src;
>         desc->desc[0].dta = dest;
> -       desc->desc[0].drt = JZ_DMA_DRT_AUTO;
>         desc->desc[0].dcm = JZ_DMA_DCM_TIE | JZ_DMA_DCM_SAI | JZ_DMA_DCM_DAI |
>                             tsz << JZ_DMA_DCM_TSZ_SHIFT |
>                             JZ_DMA_WIDTH_32_BIT << JZ_DMA_DCM_SP_SHIFT |
> @@ -490,9 +484,12 @@ static void jz4780_dma_begin(struct jz4780_dma_chan *jzchan)
>                         (jzchan->curr_hwdesc + 1) % jzchan->desc->count;
>         }
>
> -       /* Use 8-word descriptors. */
> -       jz4780_dma_chn_writel(jzdma, jzchan->id,
> -                             JZ_DMA_REG_DCS, JZ_DMA_DCS_DES8);
> +       /* Use 4-word descriptors. */
> +       jz4780_dma_chn_writel(jzdma, jzchan->id, JZ_DMA_REG_DCS, 0);
> +
> +       /* Set transfer type. */
> +       jz4780_dma_chn_writel(jzdma, jzchan->id, JZ_DMA_REG_DRT,
> +                             jzchan->transfer_type);
>
>         /* Write descriptor address and initiate descriptor fetch. */
>         desc_phys = jzchan->desc->desc_phys +
> @@ -502,7 +499,7 @@ static void jz4780_dma_begin(struct jz4780_dma_chan *jzchan)
>
>         /* Enable the channel. */
>         jz4780_dma_chn_writel(jzdma, jzchan->id, JZ_DMA_REG_DCS,
> -                             JZ_DMA_DCS_DES8 | JZ_DMA_DCS_CTE);
> +                             JZ_DMA_DCS_CTE);
>  }
>
>  static void jz4780_dma_issue_pending(struct dma_chan *chan)
> --
> 2.18.0
>
>

Patch looks good to me.
Reviewed-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>

Regards,
PrasannaKumar

WARNING: multiple messages have this Message-ID (diff)
From: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
To: Paul Cercueil <paul@crapouillou.net>
Cc: Vinod Koul <vkoul@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Mark Rutland <mark.rutland@arm.com>,
	Ralf Baechle <ralf@linux-mips.org>,
	Paul Burton <paul.burton@mips.com>,
	James Hogan <jhogan@kernel.org>,
	Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com>,
	Mathieu Malaterre <malat@debian.org>,
	Daniel Silsby <dansilsby@gmail.com>,
	dmaengine@vger.kernel.org,
	"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
	<devicetree@vger.kernel.org>,
	open list <linux-kernel@vger.kernel.org>,
	Linux-MIPS <linux-mips@linux-mips.org>
Subject: Re: [PATCH 03/14] dmaengine: dma-jz4780: Use 4-word descriptors
Date: Wed, 4 Jul 2018 22:10:00 +0530	[thread overview]
Message-ID: <CANc+2y6iT=cDuzHibBuSvhp4s-e3y+Y4TcC_LBev+WXPaE_1rg@mail.gmail.com> (raw)
In-Reply-To: <20180703123214.23090-4-paul@crapouillou.net>

Hi Paul,

On 3 July 2018 at 18:02, Paul Cercueil <paul@crapouillou.net> wrote:
> The only information we use in the 8-word version of the hardware DMA
> descriptor that is not present in the 4-word version is the transfer
> type, aka. the ID of the source or recipient device.
>
> Since the transfer type will never change for a DMA channel in use,
> we can just set it once for all in the corresponding DMA register
> before starting any transfer.
>
> This has several benefits:
>
> * the driver will handle twice as many hardware DMA descriptors;
>
> * the driver is closer to support the JZ4740, which only supports 4-word
>   hardware DMA descriptors;
>
> * the JZ4770 SoC needs the transfer type to be set in the corresponding
>   DMA register anyway, even if 8-word descriptors are in use.
>
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
> ---
>  drivers/dma/dma-jz4780.c | 21 +++++++++------------
>  1 file changed, 9 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/dma/dma-jz4780.c b/drivers/dma/dma-jz4780.c
> index 4d234caf5d62..cd2cd70fd843 100644
> --- a/drivers/dma/dma-jz4780.c
> +++ b/drivers/dma/dma-jz4780.c
> @@ -93,17 +93,12 @@
>   * @dtc: transfer count (number of blocks of the transfer size specified in DCM
>   * to transfer) in the low 24 bits, offset of the next descriptor from the
>   * descriptor base address in the upper 8 bits.
> - * @sd: target/source stride difference (in stride transfer mode).
> - * @drt: request type
>   */
>  struct jz4780_dma_hwdesc {
>         uint32_t dcm;
>         uint32_t dsa;
>         uint32_t dta;
>         uint32_t dtc;
> -       uint32_t sd;
> -       uint32_t drt;
> -       uint32_t reserved[2];
>  };
>
>  /* Size of allocations for hardware descriptor blocks. */
> @@ -280,7 +275,6 @@ static int jz4780_dma_setup_hwdesc(struct jz4780_dma_chan *jzchan,
>                 desc->dcm = JZ_DMA_DCM_SAI;
>                 desc->dsa = addr;
>                 desc->dta = config->dst_addr;
> -               desc->drt = jzchan->transfer_type;
>
>                 width = config->dst_addr_width;
>                 maxburst = config->dst_maxburst;
> @@ -288,7 +282,6 @@ static int jz4780_dma_setup_hwdesc(struct jz4780_dma_chan *jzchan,
>                 desc->dcm = JZ_DMA_DCM_DAI;
>                 desc->dsa = config->src_addr;
>                 desc->dta = addr;
> -               desc->drt = jzchan->transfer_type;
>
>                 width = config->src_addr_width;
>                 maxburst = config->src_maxburst;
> @@ -433,9 +426,10 @@ static struct dma_async_tx_descriptor *jz4780_dma_prep_dma_memcpy(
>         tsz = jz4780_dma_transfer_size(dest | src | len,
>                                        &jzchan->transfer_shift);
>
> +       jzchan->transfer_type = JZ_DMA_DRT_AUTO;
> +
>         desc->desc[0].dsa = src;
>         desc->desc[0].dta = dest;
> -       desc->desc[0].drt = JZ_DMA_DRT_AUTO;
>         desc->desc[0].dcm = JZ_DMA_DCM_TIE | JZ_DMA_DCM_SAI | JZ_DMA_DCM_DAI |
>                             tsz << JZ_DMA_DCM_TSZ_SHIFT |
>                             JZ_DMA_WIDTH_32_BIT << JZ_DMA_DCM_SP_SHIFT |
> @@ -490,9 +484,12 @@ static void jz4780_dma_begin(struct jz4780_dma_chan *jzchan)
>                         (jzchan->curr_hwdesc + 1) % jzchan->desc->count;
>         }
>
> -       /* Use 8-word descriptors. */
> -       jz4780_dma_chn_writel(jzdma, jzchan->id,
> -                             JZ_DMA_REG_DCS, JZ_DMA_DCS_DES8);
> +       /* Use 4-word descriptors. */
> +       jz4780_dma_chn_writel(jzdma, jzchan->id, JZ_DMA_REG_DCS, 0);
> +
> +       /* Set transfer type. */
> +       jz4780_dma_chn_writel(jzdma, jzchan->id, JZ_DMA_REG_DRT,
> +                             jzchan->transfer_type);
>
>         /* Write descriptor address and initiate descriptor fetch. */
>         desc_phys = jzchan->desc->desc_phys +
> @@ -502,7 +499,7 @@ static void jz4780_dma_begin(struct jz4780_dma_chan *jzchan)
>
>         /* Enable the channel. */
>         jz4780_dma_chn_writel(jzdma, jzchan->id, JZ_DMA_REG_DCS,
> -                             JZ_DMA_DCS_DES8 | JZ_DMA_DCS_CTE);
> +                             JZ_DMA_DCS_CTE);
>  }
>
>  static void jz4780_dma_issue_pending(struct dma_chan *chan)
> --
> 2.18.0
>
>

Patch looks good to me.
Reviewed-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>

Regards,
PrasannaKumar

             reply	other threads:[~2018-07-04 16:40 UTC|newest]

Thread overview: 111+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-04 16:40 PrasannaKumar Muralidharan [this message]
2018-07-04 16:40 ` [PATCH 03/14] dmaengine: dma-jz4780: Use 4-word descriptors PrasannaKumar Muralidharan
2018-07-04 16:40 ` PrasannaKumar Muralidharan
  -- strict thread matches above, loose matches on Subject: below --
2018-07-18  5:27 [05/14] dmaengine: dma-jz4780: Add support for the JZ4740 SoC Vinod Koul
2018-07-18  5:27 ` [PATCH 05/14] " Vinod
2018-07-18  5:27 ` Vinod
2018-07-17 17:40 [05/14] " Rob Herring
2018-07-17 17:40 ` [PATCH 05/14] " Rob Herring
2018-07-17 17:40 ` Rob Herring
2018-07-17 15:34 [05/14] " Vinod Koul
2018-07-17 15:34 ` [PATCH 05/14] " Vinod
2018-07-17 11:00 [05/14] " Paul Cercueil
2018-07-17 11:00 ` [PATCH 05/14] " Paul Cercueil
2018-07-16 21:33 [05/14] " Rob Herring
2018-07-16 21:33 ` [PATCH 05/14] " Rob Herring
2018-07-16 21:28 [02/14] dmaengine: dma-jz4780: Separate chan/ctrl registers Rob Herring
2018-07-16 21:28 ` [PATCH 02/14] " Rob Herring
2018-07-11 23:27 [02/14] " Paul Burton
2018-07-11 23:27 ` [PATCH 02/14] " Paul Burton
2018-07-11 23:13 [06/14] dmaengine: dma-jz4780: Add support for the JZ4725B SoC Paul Cercueil
2018-07-11 23:13 ` [PATCH 06/14] " Paul Cercueil
2018-07-11 23:13 [02/14] dmaengine: dma-jz4780: Separate chan/ctrl registers Paul Cercueil
2018-07-11 23:13 ` [PATCH 02/14] " Paul Cercueil
2018-07-11 12:18 [06/14] dmaengine: dma-jz4780: Add support for the JZ4725B SoC Vinod Koul
2018-07-11 12:18 ` [PATCH 06/14] " Vinod
2018-07-11 12:16 [02/14] dmaengine: dma-jz4780: Separate chan/ctrl registers Vinod Koul
2018-07-11 12:16 ` [PATCH 02/14] " Vinod
2018-07-11 12:14 [01/14] dmaengine: dma-jz4780: Avoid hardcoding number of channels Vinod Koul
2018-07-11 12:14 ` [PATCH 01/14] " Vinod
2018-07-10 15:45 [06/14] dmaengine: dma-jz4780: Add support for the JZ4725B SoC Paul Cercueil
2018-07-10 15:45 ` [PATCH 06/14] " Paul Cercueil
2018-07-10 15:41 [04/14] dmaengine: dma-jz4780: Add support for the JZ4770 SoC Paul Cercueil
2018-07-10 15:41 ` [PATCH 04/14] " Paul Cercueil
2018-07-10 15:36 [02/14] dmaengine: dma-jz4780: Separate chan/ctrl registers Paul Cercueil
2018-07-10 15:36 ` [PATCH 02/14] " Paul Cercueil
2018-07-09 17:14 [06/14] dmaengine: dma-jz4780: Add support for the JZ4725B SoC Vinod Koul
2018-07-09 17:14 ` [PATCH 06/14] " Vinod
2018-07-09 17:12 [05/14] dmaengine: dma-jz4780: Add support for the JZ4740 SoC Vinod Koul
2018-07-09 17:12 ` [PATCH 05/14] " Vinod
2018-07-09 17:10 [04/14] dmaengine: dma-jz4780: Add support for the JZ4770 SoC Vinod Koul
2018-07-09 17:10 ` [PATCH 04/14] " Vinod
2018-07-09 17:03 [02/14] dmaengine: dma-jz4780: Separate chan/ctrl registers Vinod Koul
2018-07-09 17:03 ` [PATCH 02/14] " Vinod
2018-07-07 11:01 [01/14] dmaengine: dma-jz4780: Avoid hardcoding number of channels Paul Cercueil
2018-07-07 11:01 ` [PATCH 01/14] " Paul Cercueil
2018-07-07 11:01 ` Paul Cercueil
2018-07-07  7:34 [01/14] " PrasannaKumar Muralidharan
2018-07-07  7:34 ` [PATCH 01/14] " PrasannaKumar Muralidharan
2018-07-07  7:34 ` PrasannaKumar Muralidharan
2018-07-07  7:27 [02/14] dmaengine: dma-jz4780: Separate chan/ctrl registers PrasannaKumar Muralidharan
2018-07-07  7:27 ` [PATCH 02/14] " PrasannaKumar Muralidharan
2018-07-07  7:27 ` PrasannaKumar Muralidharan
2018-07-05 21:45 [02/14] " Paul Cercueil
2018-07-05 21:45 ` [PATCH 02/14] " Paul Cercueil
2018-07-05 21:45 ` Paul Cercueil
2018-07-05 18:26 [01/14] dmaengine: dma-jz4780: Avoid hardcoding number of channels Paul Cercueil
2018-07-05 18:26 ` [PATCH 01/14] " Paul Cercueil
2018-07-05 18:26 ` Paul Cercueil
2018-07-05 18:23 [02/14] dmaengine: dma-jz4780: Separate chan/ctrl registers Paul Cercueil
2018-07-05 18:23 ` [PATCH 02/14] " Paul Cercueil
2018-07-04 17:00 [07/14] dmaengine: dma-jz4780: Enable Fast DMA to the AIC PrasannaKumar Muralidharan
2018-07-04 17:00 ` [PATCH 07/14] " PrasannaKumar Muralidharan
2018-07-04 17:00 ` PrasannaKumar Muralidharan
2018-07-04 16:55 [06/14] dmaengine: dma-jz4780: Add support for the JZ4725B SoC PrasannaKumar Muralidharan
2018-07-04 16:55 ` [PATCH 06/14] " PrasannaKumar Muralidharan
2018-07-04 16:55 ` PrasannaKumar Muralidharan
2018-07-04 16:52 [05/14] dmaengine: dma-jz4780: Add support for the JZ4740 SoC PrasannaKumar Muralidharan
2018-07-04 16:52 ` [PATCH 05/14] " PrasannaKumar Muralidharan
2018-07-04 16:52 ` PrasannaKumar Muralidharan
2018-07-04 16:35 [02/14] dmaengine: dma-jz4780: Separate chan/ctrl registers PrasannaKumar Muralidharan
2018-07-04 16:35 ` [PATCH 02/14] " PrasannaKumar Muralidharan
2018-07-04 16:35 ` PrasannaKumar Muralidharan
2018-07-04 16:28 [01/14] dmaengine: dma-jz4780: Avoid hardcoding number of channels PrasannaKumar Muralidharan
2018-07-04 16:28 ` [PATCH 01/14] " PrasannaKumar Muralidharan
2018-07-04 16:28 ` PrasannaKumar Muralidharan
2018-07-03 16:53 [02/14] dmaengine: dma-jz4780: Separate chan/ctrl registers Paul Burton
2018-07-03 16:53 ` [PATCH 02/14] " Paul Burton
2018-07-03 12:32 [14/14] MIPS: JZ4770: DTS: Add DMA nodes Paul Cercueil
2018-07-03 12:32 ` [PATCH 14/14] " Paul Cercueil
2018-07-03 12:32 [13/14] MIPS: JZ4780: DTS: Update DMA node to match driver changes Paul Cercueil
2018-07-03 12:32 ` [PATCH 13/14] " Paul Cercueil
2018-07-03 12:32 [12/14] dmaengine: dma-jz4780: Use dma_set_residue() Paul Cercueil
2018-07-03 12:32 ` [PATCH 12/14] " Paul Cercueil
2018-07-03 12:32 [11/14] dmaengine: dma-jz4780: Further residue status fix Paul Cercueil
2018-07-03 12:32 ` [PATCH 11/14] " Paul Cercueil
2018-07-03 12:32 [10/14] dmaengine: dma-jz4780: Set DTCn register explicitly Paul Cercueil
2018-07-03 12:32 ` [PATCH 10/14] " Paul Cercueil
2018-07-03 12:32 [09/14] dmaengine: dma-jz4780: Simplify jz4780_dma_desc_residue() Paul Cercueil
2018-07-03 12:32 ` [PATCH 09/14] " Paul Cercueil
2018-07-03 12:32 [08/14] dmaengine: dma-jz4780: Add missing residue DTC mask Paul Cercueil
2018-07-03 12:32 ` [PATCH 08/14] " Paul Cercueil
2018-07-03 12:32 [07/14] dmaengine: dma-jz4780: Enable Fast DMA to the AIC Paul Cercueil
2018-07-03 12:32 ` [PATCH 07/14] " Paul Cercueil
2018-07-03 12:32 [06/14] dmaengine: dma-jz4780: Add support for the JZ4725B SoC Paul Cercueil
2018-07-03 12:32 ` [PATCH 06/14] " Paul Cercueil
2018-07-03 12:32 [05/14] dmaengine: dma-jz4780: Add support for the JZ4740 SoC Paul Cercueil
2018-07-03 12:32 ` [PATCH 05/14] " Paul Cercueil
2018-07-03 12:32 [04/14] dmaengine: dma-jz4780: Add support for the JZ4770 SoC Paul Cercueil
2018-07-03 12:32 ` [PATCH 04/14] " Paul Cercueil
2018-07-03 12:32 [03/14] dmaengine: dma-jz4780: Use 4-word descriptors Paul Cercueil
2018-07-03 12:32 ` [PATCH 03/14] " Paul Cercueil
2018-07-03 12:32 [02/14] dmaengine: dma-jz4780: Separate chan/ctrl registers Paul Cercueil
2018-07-03 12:32 ` [PATCH 02/14] " Paul Cercueil
2018-07-03 12:32 [PATCH 00/14] dma-jz4780 improvements Paul Cercueil
2018-07-03 12:32 ` [01/14] dmaengine: dma-jz4780: Avoid hardcoding number of channels Paul Cercueil
2018-07-03 12:32   ` [PATCH 01/14] " Paul Cercueil
2018-07-09 16:59   ` [01/14] " Vinod Koul
2018-07-09 16:59     ` [PATCH 01/14] " Vinod
2018-07-10 15:29     ` Paul Cercueil
2018-07-03 19:32 ` [PATCH 00/14] dma-jz4780 improvements Mathieu Malaterre
2018-07-03 19:32   ` Mathieu Malaterre

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