[PATCH 1/4] ARM: dts: imx6dl-alti6p: Fix the SPI chipselect polarity

[PATCH 1/4] ARM: dts: imx6dl-alti6p: Fix the SPI chipselect polarity

[Fabio Estevam]

The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd for example:
    
[    4.854337] m25p80@0 enforce active low on chipselect handle
   
Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.
    
The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:
    
* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.
    
To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
---
 arch/arm/boot/dts/imx6dl-alti6p.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/imx6dl-alti6p.dts b/arch/arm/boot/dts/imx6dl-alti6p.dts
index 4329b372d8cb..e8325fd680d9 100644
--- a/arch/arm/boot/dts/imx6dl-alti6p.dts
+++ b/arch/arm/boot/dts/imx6dl-alti6p.dts
@@ -192,7 +192,7 @@ &can1 {
 };
 
 &ecspi1 {
-	cs-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
+	cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_ecspi1>;
 	status = "okay";
-- 
2.25.1


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[PATCH 2/4] ARM: dts: imx6qp-prtwd3: Fix the SPI chipselect polarity

[Fabio Estevam]

The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd for example:
    
[    4.854337] m25p80@0 enforce active low on chipselect handle
   
Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.
    
The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:
    
* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.
    
To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.

The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd for example:
    
[    4.854337] m25p80@0 enforce active low on chipselect handle
   
Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.
    
The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:
    
* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.
    
To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
---
 arch/arm/boot/dts/imx6qp-prtwd3.dts | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/imx6qp-prtwd3.dts b/arch/arm/boot/dts/imx6qp-prtwd3.dts
index c42723989bc0..1a334918f9ca 100644
--- a/arch/arm/boot/dts/imx6qp-prtwd3.dts
+++ b/arch/arm/boot/dts/imx6qp-prtwd3.dts
@@ -123,7 +123,7 @@ &can1 {
 };
 
 &ecspi2 {
-	cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
+	cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_ecspi2>;
 	status = "okay";
@@ -189,7 +189,7 @@ fixed-link {
 };
 
 &ecspi3 {
-	cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
+	cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_ecspi3>;
 	status = "okay";
-- 
2.25.1


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Re: [PATCH 2/4] ARM: dts: imx6qp-prtwd3: Fix the SPI chipselect polarity

[Oleksij Rempel]

On Fri, Jul 16, 2021 at 10:36:57AM -0300, Fabio Estevam wrote:
> The conversion of the spi-imx driver to use GPIO descriptors
> in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
> helped to detect the following SPI chipselect polarity mismatch on an
> imx6q-sabresd for example:
>     
> [    4.854337] m25p80@0 enforce active low on chipselect handle
>    
> Prior to the above commit, the chipselect polarity passed via cs-gpios
> property was ignored and considered active-low.
>     
> The reason for such mismatch is clearly explained in the comments inside
> drivers/gpio/gpiolib-of.c:
>     
> * SPI children have active low chip selects
> * by default. This can be specified negatively
> * by just omitting "spi-cs-high" in the
> * device node, or actively by tagging on
> * GPIO_ACTIVE_LOW as flag in the device
> * tree. If the line is simultaneously
> * tagged as active low in the device tree
> * and has the "spi-cs-high" set, we get a
> * conflict and the "spi-cs-high" flag will
> * take precedence.
>     
> To properly represent the SPI chipselect polarity, change it to active-low
> when the "spi-cs-high" property is absent.
> 
> The conversion of the spi-imx driver to use GPIO descriptors
> in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
> helped to detect the following SPI chipselect polarity mismatch on an
> imx6q-sabresd for example:
>     
> [    4.854337] m25p80@0 enforce active low on chipselect handle
>    
> Prior to the above commit, the chipselect polarity passed via cs-gpios
> property was ignored and considered active-low.
>     
> The reason for such mismatch is clearly explained in the comments inside
> drivers/gpio/gpiolib-of.c:
>     
> * SPI children have active low chip selects
> * by default. This can be specified negatively
> * by just omitting "spi-cs-high" in the
> * device node, or actively by tagging on
> * GPIO_ACTIVE_LOW as flag in the device
> * tree. If the line is simultaneously
> * tagged as active low in the device tree
> * and has the "spi-cs-high" set, we get a
> * conflict and the "spi-cs-high" flag will
> * take precedence.
>     
> To properly represent the SPI chipselect polarity, change it to active-low
> when the "spi-cs-high" property is absent.
> 
> Signed-off-by: Fabio Estevam <festevam@gmail.com>

Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Thank you!

> ---
>  arch/arm/boot/dts/imx6qp-prtwd3.dts | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/imx6qp-prtwd3.dts b/arch/arm/boot/dts/imx6qp-prtwd3.dts
> index c42723989bc0..1a334918f9ca 100644
> --- a/arch/arm/boot/dts/imx6qp-prtwd3.dts
> +++ b/arch/arm/boot/dts/imx6qp-prtwd3.dts
> @@ -123,7 +123,7 @@ &can1 {
>  };
>  
>  &ecspi2 {
> -	cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
> +	cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_ecspi2>;
>  	status = "okay";
> @@ -189,7 +189,7 @@ fixed-link {
>  };
>  
>  &ecspi3 {
> -	cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
> +	cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_ecspi3>;
>  	status = "okay";
> -- 
> 2.25.1
> 
> 

-- 
Pengutronix e.K.                           |                             |
Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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Re: [PATCH 2/4] ARM: dts: imx6qp-prtwd3: Fix the SPI chipselect polarity

[Shawn Guo]

On Fri, Jul 16, 2021 at 10:36:57AM -0300, Fabio Estevam wrote:
> The conversion of the spi-imx driver to use GPIO descriptors
> in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
> helped to detect the following SPI chipselect polarity mismatch on an
> imx6q-sabresd for example:
>     
> [    4.854337] m25p80@0 enforce active low on chipselect handle
>    
> Prior to the above commit, the chipselect polarity passed via cs-gpios
> property was ignored and considered active-low.
>     
> The reason for such mismatch is clearly explained in the comments inside
> drivers/gpio/gpiolib-of.c:
>     
> * SPI children have active low chip selects
> * by default. This can be specified negatively
> * by just omitting "spi-cs-high" in the
> * device node, or actively by tagging on
> * GPIO_ACTIVE_LOW as flag in the device
> * tree. If the line is simultaneously
> * tagged as active low in the device tree
> * and has the "spi-cs-high" set, we get a
> * conflict and the "spi-cs-high" flag will
> * take precedence.
>     
> To properly represent the SPI chipselect polarity, change it to active-low
> when the "spi-cs-high" property is absent.

...

> The conversion of the spi-imx driver to use GPIO descriptors
> in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
> helped to detect the following SPI chipselect polarity mismatch on an
> imx6q-sabresd for example:
>     
> [    4.854337] m25p80@0 enforce active low on chipselect handle
>    
> Prior to the above commit, the chipselect polarity passed via cs-gpios
> property was ignored and considered active-low.
>     
> The reason for such mismatch is clearly explained in the comments inside
> drivers/gpio/gpiolib-of.c:
>     
> * SPI children have active low chip selects
> * by default. This can be specified negatively
> * by just omitting "spi-cs-high" in the
> * device node, or actively by tagging on
> * GPIO_ACTIVE_LOW as flag in the device
> * tree. If the line is simultaneously
> * tagged as active low in the device tree
> * and has the "spi-cs-high" set, we get a
> * conflict and the "spi-cs-high" flag will
> * take precedence.
>     
> To properly represent the SPI chipselect polarity, change it to active-low
> when the "spi-cs-high" property is absent.

So the commit log was written twice?  I will fix it up.

Shawn

> 
> Signed-off-by: Fabio Estevam <festevam@gmail.com>
> ---
>  arch/arm/boot/dts/imx6qp-prtwd3.dts | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/imx6qp-prtwd3.dts b/arch/arm/boot/dts/imx6qp-prtwd3.dts
> index c42723989bc0..1a334918f9ca 100644
> --- a/arch/arm/boot/dts/imx6qp-prtwd3.dts
> +++ b/arch/arm/boot/dts/imx6qp-prtwd3.dts
> @@ -123,7 +123,7 @@ &can1 {
>  };
>  
>  &ecspi2 {
> -	cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
> +	cs-gpios = <&gpio2 26 GPIO_ACTIVE_LOW>;
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_ecspi2>;
>  	status = "okay";
> @@ -189,7 +189,7 @@ fixed-link {
>  };
>  
>  &ecspi3 {
> -	cs-gpios = <&gpio4 24 GPIO_ACTIVE_HIGH>;
> +	cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_ecspi3>;
>  	status = "okay";
> -- 
> 2.25.1
> 

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[PATCH 3/4] ARM: dts: imx6qdl-tqma6: Fix the SPI chipselect polarity

[Fabio Estevam]

The conversion of the spi-imx driver to use GPIO descriptors
in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
helped to detect the following SPI chipselect polarity mismatch on an
imx6q-sabresd for example:
    
[    4.854337] m25p80@0 enforce active low on chipselect handle
   
Prior to the above commit, the chipselect polarity passed via cs-gpios
property was ignored and considered active-low.
    
The reason for such mismatch is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:
    
* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.
    
To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
---
 arch/arm/boot/dts/imx6qdl-tqma6.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/imx6qdl-tqma6.dtsi b/arch/arm/boot/dts/imx6qdl-tqma6.dtsi
index b18b83ac6aee..51a3a5392c95 100644
--- a/arch/arm/boot/dts/imx6qdl-tqma6.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-tqma6.dtsi
@@ -20,7 +20,7 @@ reg_3p3v: regulator-3p3v {
 &ecspi1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_ecspi1>;
-	cs-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
+	cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
 	status = "okay";
 
 	m25p80: flash@0 {
-- 
2.25.1


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[PATCH 4/4] ARM: dts: imx7d-sdb: Fix the SPI chipselect polarity

[Fabio Estevam]

The following warning is seen when the SPI GPIO driver probes:

gpio-expander@0 enforce active low on chipselect handle

The reason for this warning is clearly explained in the comments inside
drivers/gpio/gpiolib-of.c:
    
* SPI children have active low chip selects
* by default. This can be specified negatively
* by just omitting "spi-cs-high" in the
* device node, or actively by tagging on
* GPIO_ACTIVE_LOW as flag in the device
* tree. If the line is simultaneously
* tagged as active low in the device tree
* and has the "spi-cs-high" set, we get a
* conflict and the "spi-cs-high" flag will
* take precedence.
    
To properly represent the SPI chipselect polarity, change it to active-low
when the "spi-cs-high" property is absent.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
---
 arch/arm/boot/dts/imx7d-sdb.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/imx7d-sdb.dts b/arch/arm/boot/dts/imx7d-sdb.dts
index 4a0d83784d7d..7813ef960f6e 100644
--- a/arch/arm/boot/dts/imx7d-sdb.dts
+++ b/arch/arm/boot/dts/imx7d-sdb.dts
@@ -45,7 +45,7 @@ spi4 {
 		pinctrl-0 = <&pinctrl_spi4>;
 		gpio-sck = <&gpio1 13 GPIO_ACTIVE_HIGH>;
 		gpio-mosi = <&gpio1 9 GPIO_ACTIVE_HIGH>;
-		cs-gpios = <&gpio1 12 GPIO_ACTIVE_HIGH>;
+		cs-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>;
 		num-chipselects = <1>;
 		#address-cells = <1>;
 		#size-cells = <0>;
-- 
2.25.1


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Re: [PATCH 1/4] ARM: dts: imx6dl-alti6p: Fix the SPI chipselect polarity

[Oleksij Rempel]

On Fri, Jul 16, 2021 at 10:36:56AM -0300, Fabio Estevam wrote:
> The conversion of the spi-imx driver to use GPIO descriptors
> in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
> helped to detect the following SPI chipselect polarity mismatch on an
> imx6q-sabresd for example:
>     
> [    4.854337] m25p80@0 enforce active low on chipselect handle
>    
> Prior to the above commit, the chipselect polarity passed via cs-gpios
> property was ignored and considered active-low.
>     
> The reason for such mismatch is clearly explained in the comments inside
> drivers/gpio/gpiolib-of.c:
>     
> * SPI children have active low chip selects
> * by default. This can be specified negatively
> * by just omitting "spi-cs-high" in the
> * device node, or actively by tagging on
> * GPIO_ACTIVE_LOW as flag in the device
> * tree. If the line is simultaneously
> * tagged as active low in the device tree
> * and has the "spi-cs-high" set, we get a
> * conflict and the "spi-cs-high" flag will
> * take precedence.
>     
> To properly represent the SPI chipselect polarity, change it to active-low
> when the "spi-cs-high" property is absent.
> 
> Signed-off-by: Fabio Estevam <festevam@gmail.com>

Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Thank you!

> ---
>  arch/arm/boot/dts/imx6dl-alti6p.dts | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm/boot/dts/imx6dl-alti6p.dts b/arch/arm/boot/dts/imx6dl-alti6p.dts
> index 4329b372d8cb..e8325fd680d9 100644
> --- a/arch/arm/boot/dts/imx6dl-alti6p.dts
> +++ b/arch/arm/boot/dts/imx6dl-alti6p.dts
> @@ -192,7 +192,7 @@ &can1 {
>  };
>  
>  &ecspi1 {
> -	cs-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
> +	cs-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
>  	pinctrl-names = "default";
>  	pinctrl-0 = <&pinctrl_ecspi1>;
>  	status = "okay";
> -- 
> 2.25.1
> 
> 

-- 
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Steuerwalder Str. 21                       | http://www.pengutronix.de/  |
31137 Hildesheim, Germany                  | Phone: +49-5121-206917-0    |
Amtsgericht Hildesheim, HRA 2686           | Fax:   +49-5121-206917-5555 |

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Re: [PATCH 1/4] ARM: dts: imx6dl-alti6p: Fix the SPI chipselect polarity

[Fabio Estevam]

Hi Shawn,

On Sat, Jul 17, 2021 at 1:57 AM Oleksij Rempel <o.rempel@pengutronix.de> wrote:
>
> On Fri, Jul 16, 2021 at 10:36:56AM -0300, Fabio Estevam wrote:
> > The conversion of the spi-imx driver to use GPIO descriptors
> > in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
> > helped to detect the following SPI chipselect polarity mismatch on an
> > imx6q-sabresd for example:
> >
> > [    4.854337] m25p80@0 enforce active low on chipselect handle
> >
> > Prior to the above commit, the chipselect polarity passed via cs-gpios
> > property was ignored and considered active-low.
> >
> > The reason for such mismatch is clearly explained in the comments inside
> > drivers/gpio/gpiolib-of.c:
> >
> > * SPI children have active low chip selects
> > * by default. This can be specified negatively
> > * by just omitting "spi-cs-high" in the
> > * device node, or actively by tagging on
> > * GPIO_ACTIVE_LOW as flag in the device
> > * tree. If the line is simultaneously
> > * tagged as active low in the device tree
> > * and has the "spi-cs-high" set, we get a
> > * conflict and the "spi-cs-high" flag will
> > * take precedence.
> >
> > To properly represent the SPI chipselect polarity, change it to active-low
> > when the "spi-cs-high" property is absent.
> >
> > Signed-off-by: Fabio Estevam <festevam@gmail.com>
>
> Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
> Thank you!

A gentle ping on this series.

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Re: [PATCH 1/4] ARM: dts: imx6dl-alti6p: Fix the SPI chipselect polarity

[Shawn Guo]

On Sat, Aug 14, 2021 at 10:27:13AM -0300, Fabio Estevam wrote:
> Hi Shawn,
> 
> On Sat, Jul 17, 2021 at 1:57 AM Oleksij Rempel <o.rempel@pengutronix.de> wrote:
> >
> > On Fri, Jul 16, 2021 at 10:36:56AM -0300, Fabio Estevam wrote:
> > > The conversion of the spi-imx driver to use GPIO descriptors
> > > in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
> > > helped to detect the following SPI chipselect polarity mismatch on an
> > > imx6q-sabresd for example:
> > >
> > > [    4.854337] m25p80@0 enforce active low on chipselect handle
> > >
> > > Prior to the above commit, the chipselect polarity passed via cs-gpios
> > > property was ignored and considered active-low.
> > >
> > > The reason for such mismatch is clearly explained in the comments inside
> > > drivers/gpio/gpiolib-of.c:
> > >
> > > * SPI children have active low chip selects
> > > * by default. This can be specified negatively
> > > * by just omitting "spi-cs-high" in the
> > > * device node, or actively by tagging on
> > > * GPIO_ACTIVE_LOW as flag in the device
> > > * tree. If the line is simultaneously
> > > * tagged as active low in the device tree
> > > * and has the "spi-cs-high" set, we get a
> > > * conflict and the "spi-cs-high" flag will
> > > * take precedence.
> > >
> > > To properly represent the SPI chipselect polarity, change it to active-low
> > > when the "spi-cs-high" property is absent.
> > >
> > > Signed-off-by: Fabio Estevam <festevam@gmail.com>
> >
> > Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
> > Thank you!
> 
> A gentle ping on this series.

Should we have Fixes tags for the patches?

Shawn

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Re: [PATCH 1/4] ARM: dts: imx6dl-alti6p: Fix the SPI chipselect polarity

[Fabio Estevam]

Hi Shawn,

On Tue, Sep 21, 2021 at 10:23 PM Shawn Guo <shawnguo@kernel.org> wrote:

> Should we have Fixes tags for the patches?

As this does not change the functionality, I did not put a Fixes tag.

It will only fix a warning like this:

[    4.854337] m25p80@0 enforce active low on chipselect handle

IMHO it is OK to apply them without a Fixes tag.

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Re: [PATCH 1/4] ARM: dts: imx6dl-alti6p: Fix the SPI chipselect polarity

[Shawn Guo]

On Tue, Sep 21, 2021 at 10:28:08PM -0300, Fabio Estevam wrote:
> Hi Shawn,
> 
> On Tue, Sep 21, 2021 at 10:23 PM Shawn Guo <shawnguo@kernel.org> wrote:
> 
> > Should we have Fixes tags for the patches?
> 
> As this does not change the functionality, I did not put a Fixes tag.
> 
> It will only fix a warning like this:
> 
> [    4.854337] m25p80@0 enforce active low on chipselect handle
> 
> IMHO it is OK to apply them without a Fixes tag.

Okay, then I assume it applies to imx8mm-kontron-n801x-som and
imx8mm-venice patches as well?

Shawn

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Re: [PATCH 1/4] ARM: dts: imx6dl-alti6p: Fix the SPI chipselect polarity

[Fabio Estevam]

On Tue, Sep 21, 2021 at 11:03 PM Shawn Guo <shawnguo@kernel.org> wrote:

> Okay, then I assume it applies to imx8mm-kontron-n801x-som and
> imx8mm-venice patches as well?

Yes, that's correct.

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Re: [PATCH 1/4] ARM: dts: imx6dl-alti6p: Fix the SPI chipselect polarity

[Shawn Guo]

On Fri, Jul 16, 2021 at 10:36:56AM -0300, Fabio Estevam wrote:
> The conversion of the spi-imx driver to use GPIO descriptors
> in commit 8cdcd8aeee28 ("spi: imx/fsl-lpspi: Convert to GPIO descriptors")
> helped to detect the following SPI chipselect polarity mismatch on an
> imx6q-sabresd for example:
>     
> [    4.854337] m25p80@0 enforce active low on chipselect handle
>    
> Prior to the above commit, the chipselect polarity passed via cs-gpios
> property was ignored and considered active-low.
>     
> The reason for such mismatch is clearly explained in the comments inside
> drivers/gpio/gpiolib-of.c:
>     
> * SPI children have active low chip selects
> * by default. This can be specified negatively
> * by just omitting "spi-cs-high" in the
> * device node, or actively by tagging on
> * GPIO_ACTIVE_LOW as flag in the device
> * tree. If the line is simultaneously
> * tagged as active low in the device tree
> * and has the "spi-cs-high" set, we get a
> * conflict and the "spi-cs-high" flag will
> * take precedence.
>     
> To properly represent the SPI chipselect polarity, change it to active-low
> when the "spi-cs-high" property is absent.
> 
> Signed-off-by: Fabio Estevam <festevam@gmail.com>

Applied all, thanks!

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