imx: mx25: Remove SION bit in all pin-mux

From: Michael Trimarchi <michael@amarulasolutions.com>
To: Fabio Estevam <festevam@gmail.com>
Cc: "Fabio Estevam" <fabio.estevam@nxp.com>,
	"Peter Chen" <peter.chen@nxp.com>,
	U-Boot-Denx <u-boot@lists.denx.de>,
	"USB list" <linux-usb@vger.kernel.org>,
	"Benoît Thébaudeau" <benoit@wsystem.com>
Subject: imx: mx25: Remove SION bit in all pin-mux
Date: Wed, 24 Jan 2018 17:31:46 +0100	[thread overview]
Message-ID: <CAOf5uw=1mgNsatRsR-C-shLEefERG42NKp7L4kmLjNtwb5mHGw@mail.gmail.com> (raw)

Hi Fabio

On Wed, Jan 24, 2018 at 4:26 PM, Michael Nazzareno Trimarchi
<michael@amarulasolutions.com> wrote:
> Hi Fabio
>
> On Wed, Jan 24, 2018 at 4:14 PM, Fabio Estevam <festevam@gmail.com> wrote:
>> Hi Michael,
>>

Can you check where SION bit is mandatory for mx25? I have on IMX51
some PINMUX where sion is enabled.
I can clean up a bit the patch to just minimize the change. We have for example:

arch/arm/include/asm/arch-mx5/iomux-mx51.h: MX51_PAD_SD1_CMD__SD1_CMD
= IOMUX_PAD(0x79c, 0x394, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h: MX51_PAD_SD1_CLK__SD1_CLK
= IOMUX_PAD(0x7a0, 0x398, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL |
PAD_CTL_HYS),
arch/arm/include/asm/arch-mx5/iomux-mx51.h:
MX51_PAD_SD1_DATA0__SD1_DATA0 = IOMUX_PAD(0x7a4, 0x39c, 0x10, __NA_,
0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h:
MX51_PAD_SD1_DATA1__SD1_DATA1 = IOMUX_PAD(0x7a8, 0x3a0, 0x10, __NA_,
0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h:
MX51_PAD_SD1_DATA2__SD1_DATA2 = IOMUX_PAD(0x7ac, 0x3a4, 0x10, __NA_,
0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h:
MX51_PAD_SD1_DATA3__SD1_DATA3 = IOMUX_PAD(0x7b0, 0x3a8, 0x10, __NA_,
0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h: MX51_PAD_SD2_CMD__SD2_CMD
= IOMUX_PAD(0x7bc, 0x3b4, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h: MX51_PAD_SD2_CLK__SD2_CLK
= IOMUX_PAD(0x7c0, 0x3b8, 0x10, __NA_, 0, MX51_SDHCI_PAD_CTRL |
PAD_CTL_HYS),
arch/arm/include/asm/arch-mx5/iomux-mx51.h:
MX51_PAD_SD2_DATA0__SD2_DATA0 = IOMUX_PAD(0x7c4, 0x3bc, 0x10, __NA_,
0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h:
MX51_PAD_SD2_DATA1__SD2_DATA1 = IOMUX_PAD(0x7c8, 0x3c0, 0x10, __NA_,
0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h:
MX51_PAD_SD2_DATA2__SD2_DATA2 = IOMUX_PAD(0x7cc, 0x3c4, 0x10, __NA_,
0, MX51_SDHCI_PAD_CTRL),
arch/arm/include/asm/arch-mx5/iomux-mx51.h:
MX51_PAD_SD2_DATA3__SD2_DATA3 = IOMUX_PAD(0x7d0, 0x3c8, 0x10, __NA_,
0, MX51_SDHCI_PAD_CTRL),

In this way we can be sure that we have done in proper way

Michael

>> On Wed, Jan 24, 2018 at 12:56 PM, Michael Trimarchi
>> <michael@amarulasolutions.com> wrote:
>>> SION bit should be used in the situation that we need
>>> to read back the value of a pin and should be set by
>>> default. This can generate any kind of random malfunction
>>> as described in this thread.
>>>
>>> According to this thread:
>>> https://www.spinics.net/lists/linux-usb/msg162574.html
>>>
>>> We consider this an early bug so all the boards running imx25
>>> with a minimimal set of functionalities can be affected.
>>>
>>> As reported by this application note:
>>> https://www.nxp.com/docs/en/application-note/AN5078.pdf
>>>
>>> The software input on (SION) bit is an option to force an input
>>> path to be active regardless of the value driven by the
>>> corresponding module. It is used when the nature direction
>>> of a pin depending on selected alternative function is an output,
>>> but it is needed to read the real logic value on a pin.
>>>
>>> The SION bit can be used in:
>>> • Loopback: the module of a selected alternative function drives
>>> the pad and also receives the pad value as an input
>>> • GPIO capture: the module of a selected alternative function
>>> drives the pin and the value is captured by the GPIO
>>>
>>> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
>>> ---
>>> Refer-to:
>>>         MX25 USB timeout on ID 0951:1665 Kingston Technology Digital
>>>         DataTraveler SE9 64GB
>>
>> Glad you found a fix for the issue!
>>
>
> The idea was to align to the other freescale architecture. I can
> create two patches on it
>
> Michael
>
>>
>>> ---
>>>  arch/arm/include/asm/arch-mx25/iomux-mx25.h | 680 ++++++++++++++--------------
>>>  1 file changed, 340 insertions(+), 340 deletions(-)
>>>
>>> diff --git a/arch/arm/include/asm/arch-mx25/iomux-mx25.h b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>> index 5b2863e..2fcaf60 100644
>>> --- a/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>> +++ b/arch/arm/include/asm/arch-mx25/iomux-mx25.h
>>> @@ -30,481 +30,481 @@
>>>
>>>  /*                                                         PAD    MUX    ALT INPSE PATH PADCTRL */
>>>  enum {
>>> -       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0x00, 0, 0, NO_PAD_CTRL),
>>> -       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 0x05, 0, 0, NO_PAD_CTRL),
>>> +       MX25_PAD_A10__A10                       = IOMUX_PAD(0x000, 0x008, 0, 0, 0, NO_PAD_CTRL),
>>> +       MX25_PAD_A10__GPIO_4_0                  = IOMUX_PAD(0x000, 0x008, 5, 0, 0, NO_PAD_CTRL),
>>
>> In many places in this patch you are only changing things like 0x00
>> --> 0 or 0x05--> 5, which just makes it harder to review.
>>
>> Please send a new version that only removes the SION bit.
>
>
>
> --
> | Michael Nazzareno Trimarchi                     Amarula Solutions BV |
> | COO  -  Founder                                      Cruquiuskade 47 |
> | +31(0)851119172                                 Amsterdam 1018 AM NL |
> |                  [`as] http://www.amarulasolutions.com               |