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From: Atish Patra <atishp@atishpatra.org>
To: Palmer Dabbelt <palmer@dabbelt.com>
Cc: "Atish Patra" <Atish.Patra@wdc.com>,
	"linux-kernel@vger.kernel.org List"
	<linux-kernel@vger.kernel.org>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Alistair Francis" <Alistair.Francis@wdc.com>,
	"Anup Patel" <Anup.Patel@wdc.com>,
	"Björn Töpel" <bjorn@kernel.org>,
	devicetree <devicetree@vger.kernel.org>,
	linux-riscv <linux-riscv@lists.infradead.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	Conor.Dooley@microchip.com,
	"Daire McNamara" <daire.mcnamara@microchip.com>,
	Ivan.Griffin@microchip.com, Lewis.Hanly@microchip.com
Subject: Re: [PATCH v4 0/5] Add Microchip PolarFire Soc Support
Date: Thu, 22 Apr 2021 15:33:39 -0700	[thread overview]
Message-ID: <CAOnJCUKvyDPO55QtPXDhCMKYBb70WpR01jM1F=ddA=pmFJo5_Q@mail.gmail.com> (raw)
In-Reply-To: <CAOnJCUKtt3LF0zh6dKAAUtbCKsYCMby5TasA59fY2hpODX3vnQ@mail.gmail.com>

On Sat, Apr 17, 2021 at 8:26 PM Atish Patra <atishp@atishpatra.org> wrote:
>
> On Mon, Mar 29, 2021 at 9:17 PM Palmer Dabbelt <palmer@dabbelt.com> wrote:
> >
> > On Wed, 03 Mar 2021 12:02:48 PST (-0800), Atish Patra wrote:
> > > This series adds minimal support for Microchip Polar Fire Soc Icicle kit.
> > > It is rebased on v5.12-rc1 and depends on clock support.
> > > Only MMC and ethernet drivers are enabled via this series.
> > > The idea here is to add the foundational patches so that other drivers
> > > can be added to on top of this. The device tree may change based on
> > > feedback on bindings of individual driver support patches.
> > >
> > > This series has been tested on Qemu and Polar Fire Soc Icicle kit.
> > > It depends on the updated clock-series[2] and macb fix[3].
> > > The series is also tested by Lewis from Microchip.
> > >
> > > The series can also be found at.
> > > https://github.com/atishp04/linux/tree/polarfire_support_upstream_v4
> > >
> > > [1] https://lists.nongnu.org/archive/html/qemu-devel/2020-10/msg08582.html
> > > [2] https://www.spinics.net/lists/linux-clk/msg54579.html
> > >
> > > Changes from v3->v4:
> > > 1. Fixed few DT specific issues.
> > > 2. Rebased on top of new clock driver.
> > > 3. SD card functionality is verified.
> > >
> > > Changes from v2->v3:
> > > 1. Fixed a typo in dt binding.
> > > 2. Included MAINTAINERS entry for PolarFire SoC.
> > > 3. Improved the dts file by using lowercase clock names and keeping phy
> > >    details in board specific dts file.
> > >
> > > Changes from v1->v2:
> > > 1. Modified the DT to match the device tree in U-Boot.
> > > 2. Added both eMMC & SDcard entries in DT. However, SD card is only enabled
> > >    as it allows larger storage option for linux distros.
> > >
> > > Atish Patra (4):
> > > RISC-V: Add Microchip PolarFire SoC kconfig option
> > > dt-bindings: riscv: microchip: Add YAML documentation for the
> > > PolarFire SoC
> > > RISC-V: Initial DTS for Microchip ICICLE board
> > > RISC-V: Enable Microchip PolarFire ICICLE SoC
> > >
> > > Conor Dooley (1):
> > > MAINTAINERS: add microchip polarfire soc support
> > >
> > > .../devicetree/bindings/riscv/microchip.yaml  |  27 ++
> > > MAINTAINERS                                   |   8 +
> > > arch/riscv/Kconfig.socs                       |   7 +
> > > arch/riscv/boot/dts/Makefile                  |   1 +
> > > arch/riscv/boot/dts/microchip/Makefile        |   2 +
> > > .../microchip/microchip-mpfs-icicle-kit.dts   |  72 ++++
> > > .../boot/dts/microchip/microchip-mpfs.dtsi    | 329 ++++++++++++++++++
> > > arch/riscv/configs/defconfig                  |   4 +
> > > 8 files changed, 450 insertions(+)
> > > create mode 100644 Documentation/devicetree/bindings/riscv/microchip.yaml
> > > create mode 100644 arch/riscv/boot/dts/microchip/Makefile
> > > create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
> > > create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> >
> > I had this left in my inbox waiting for either some reviews to come in or a v2,
> > but I don't see any.  Did I miss something?
> >
> Sorry for the late reply. I am on vacation until May. I think I saw
> all the patches have already been reviewed.
> Let me know if it is not the case.
>
I cross checked and all the patches are reviewed-by.
@palmer: Is it possible to take this series for 5.13 MW ?

> > _______________________________________________
> > linux-riscv mailing list
> > linux-riscv@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-riscv
>
>
>
> --
> Regards,
> Atish



-- 
Regards,
Atish

WARNING: multiple messages have this Message-ID (diff)
From: Atish Patra <atishp@atishpatra.org>
To: Palmer Dabbelt <palmer@dabbelt.com>
Cc: "Atish Patra" <Atish.Patra@wdc.com>,
	"linux-kernel@vger.kernel.org List"
	<linux-kernel@vger.kernel.org>,
	"Albert Ou" <aou@eecs.berkeley.edu>,
	"Alistair Francis" <Alistair.Francis@wdc.com>,
	"Anup Patel" <Anup.Patel@wdc.com>,
	"Björn Töpel" <bjorn@kernel.org>,
	devicetree <devicetree@vger.kernel.org>,
	linux-riscv <linux-riscv@lists.infradead.org>,
	"Paul Walmsley" <paul.walmsley@sifive.com>,
	"Rob Herring" <robh+dt@kernel.org>,
	Conor.Dooley@microchip.com,
	"Daire McNamara" <daire.mcnamara@microchip.com>,
	Ivan.Griffin@microchip.com, Lewis.Hanly@microchip.com
Subject: Re: [PATCH v4 0/5] Add Microchip PolarFire Soc Support
Date: Thu, 22 Apr 2021 15:33:39 -0700	[thread overview]
Message-ID: <CAOnJCUKvyDPO55QtPXDhCMKYBb70WpR01jM1F=ddA=pmFJo5_Q@mail.gmail.com> (raw)
In-Reply-To: <CAOnJCUKtt3LF0zh6dKAAUtbCKsYCMby5TasA59fY2hpODX3vnQ@mail.gmail.com>

On Sat, Apr 17, 2021 at 8:26 PM Atish Patra <atishp@atishpatra.org> wrote:
>
> On Mon, Mar 29, 2021 at 9:17 PM Palmer Dabbelt <palmer@dabbelt.com> wrote:
> >
> > On Wed, 03 Mar 2021 12:02:48 PST (-0800), Atish Patra wrote:
> > > This series adds minimal support for Microchip Polar Fire Soc Icicle kit.
> > > It is rebased on v5.12-rc1 and depends on clock support.
> > > Only MMC and ethernet drivers are enabled via this series.
> > > The idea here is to add the foundational patches so that other drivers
> > > can be added to on top of this. The device tree may change based on
> > > feedback on bindings of individual driver support patches.
> > >
> > > This series has been tested on Qemu and Polar Fire Soc Icicle kit.
> > > It depends on the updated clock-series[2] and macb fix[3].
> > > The series is also tested by Lewis from Microchip.
> > >
> > > The series can also be found at.
> > > https://github.com/atishp04/linux/tree/polarfire_support_upstream_v4
> > >
> > > [1] https://lists.nongnu.org/archive/html/qemu-devel/2020-10/msg08582.html
> > > [2] https://www.spinics.net/lists/linux-clk/msg54579.html
> > >
> > > Changes from v3->v4:
> > > 1. Fixed few DT specific issues.
> > > 2. Rebased on top of new clock driver.
> > > 3. SD card functionality is verified.
> > >
> > > Changes from v2->v3:
> > > 1. Fixed a typo in dt binding.
> > > 2. Included MAINTAINERS entry for PolarFire SoC.
> > > 3. Improved the dts file by using lowercase clock names and keeping phy
> > >    details in board specific dts file.
> > >
> > > Changes from v1->v2:
> > > 1. Modified the DT to match the device tree in U-Boot.
> > > 2. Added both eMMC & SDcard entries in DT. However, SD card is only enabled
> > >    as it allows larger storage option for linux distros.
> > >
> > > Atish Patra (4):
> > > RISC-V: Add Microchip PolarFire SoC kconfig option
> > > dt-bindings: riscv: microchip: Add YAML documentation for the
> > > PolarFire SoC
> > > RISC-V: Initial DTS for Microchip ICICLE board
> > > RISC-V: Enable Microchip PolarFire ICICLE SoC
> > >
> > > Conor Dooley (1):
> > > MAINTAINERS: add microchip polarfire soc support
> > >
> > > .../devicetree/bindings/riscv/microchip.yaml  |  27 ++
> > > MAINTAINERS                                   |   8 +
> > > arch/riscv/Kconfig.socs                       |   7 +
> > > arch/riscv/boot/dts/Makefile                  |   1 +
> > > arch/riscv/boot/dts/microchip/Makefile        |   2 +
> > > .../microchip/microchip-mpfs-icicle-kit.dts   |  72 ++++
> > > .../boot/dts/microchip/microchip-mpfs.dtsi    | 329 ++++++++++++++++++
> > > arch/riscv/configs/defconfig                  |   4 +
> > > 8 files changed, 450 insertions(+)
> > > create mode 100644 Documentation/devicetree/bindings/riscv/microchip.yaml
> > > create mode 100644 arch/riscv/boot/dts/microchip/Makefile
> > > create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs-icicle-kit.dts
> > > create mode 100644 arch/riscv/boot/dts/microchip/microchip-mpfs.dtsi
> >
> > I had this left in my inbox waiting for either some reviews to come in or a v2,
> > but I don't see any.  Did I miss something?
> >
> Sorry for the late reply. I am on vacation until May. I think I saw
> all the patches have already been reviewed.
> Let me know if it is not the case.
>
I cross checked and all the patches are reviewed-by.
@palmer: Is it possible to take this series for 5.13 MW ?

> > _______________________________________________
> > linux-riscv mailing list
> > linux-riscv@lists.infradead.org
> > http://lists.infradead.org/mailman/listinfo/linux-riscv
>
>
>
> --
> Regards,
> Atish



-- 
Regards,
Atish

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2021-04-22 22:33 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-03 20:02 [PATCH v4 0/5] Add Microchip PolarFire Soc Support Atish Patra
2021-03-03 20:02 ` Atish Patra
2021-03-03 20:02 ` [PATCH v4 1/5] RISC-V: Add Microchip PolarFire SoC kconfig option Atish Patra
2021-03-03 20:02   ` Atish Patra
2021-03-03 20:02 ` [PATCH v4 2/5] dt-bindings: riscv: microchip: Add YAML documentation for the PolarFire SoC Atish Patra
2021-03-03 20:02   ` Atish Patra
2021-03-08 20:11   ` Rob Herring
2021-03-08 20:11     ` Rob Herring
2021-03-03 20:02 ` [PATCH v4 3/5] RISC-V: Initial DTS for Microchip ICICLE board Atish Patra
2021-03-03 20:02   ` Atish Patra
2021-03-09 10:56   ` Ben Dooks
2021-03-09 10:56     ` Ben Dooks
     [not found]     ` <DM6PR11MB3770E7FA8121AA91D9EDC4FEE5929@DM6PR11MB3770.namprd11.prod.outlook.com>
2021-03-09 19:34       ` Atish Patra
2021-03-09 19:34         ` Atish Patra
2021-03-22  6:04   ` Bin Meng
2021-03-22  6:04     ` Bin Meng
2021-03-27 17:22   ` Alex Ghiti
2021-03-27 17:22     ` Alex Ghiti
2021-03-28 15:22     ` Vitaly Wool
2021-03-28 15:22       ` Vitaly Wool
2021-04-18  3:36       ` Atish Patra
2021-04-18  3:36         ` Atish Patra
2021-04-18  4:24         ` Atish Patra
2021-04-18  4:24           ` Atish Patra
2021-04-18 18:39         ` Vitaly Wool
2021-04-18 18:39           ` Vitaly Wool
2021-03-03 20:02 ` [PATCH v4 4/5] RISC-V: Enable Microchip PolarFire ICICLE SoC Atish Patra
2021-03-03 20:02   ` Atish Patra
2021-03-03 20:02 ` [PATCH v4 5/5] MAINTAINERS: add microchip polarfire soc support Atish Patra
2021-03-03 20:02   ` Atish Patra
2021-03-30  4:17 ` [PATCH v4 0/5] Add Microchip PolarFire Soc Support Palmer Dabbelt
2021-03-30  4:17   ` Palmer Dabbelt
2021-04-18  3:26   ` Atish Patra
2021-04-18  3:26     ` Atish Patra
2021-04-22 22:33     ` Atish Patra [this message]
2021-04-22 22:33       ` Atish Patra
2021-04-23  1:37       ` Palmer Dabbelt
2021-04-23  1:37         ` Palmer Dabbelt
2021-04-23  8:44         ` Conor.Dooley
2021-04-23  8:44           ` Conor.Dooley
     [not found] <CAOnJCUL5tLzk73GJNVXMmJmBKo_kVcAQ7OYwpi9bjKgTbabhyg@mail.gmail.com>
2021-04-23 19:56 ` Palmer Dabbelt
2021-04-23 19:56   ` Palmer Dabbelt

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