* [PATCH v2 1/4] mtd:fsl-quadspi:use the property fields of SPI-NOR @ 2016-02-01 11:30 ` Yunhui Cui 0 siblings, 0 replies; 25+ messages in thread From: Yunhui Cui @ 2016-02-01 11:30 UTC (permalink / raw) To: dwmw2, computersforpeace, han.xu Cc: linux-kernel, linux-mtd, linux-arm-kernel, yao.yuan We can get the read/write/erase opcode from the spi nor framework directly. This patch uses the information stored in the SPI-NOR to remove the hardcode in the fsl_qspi_init_lut(). Signed-off-by: Yunhui Cui <B56489@freescale.com> --- drivers/mtd/spi-nor/fsl-quadspi.c | 40 ++++++++++++--------------------------- 1 file changed, 12 insertions(+), 28 deletions(-) diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c index 9ab2b51..517ffe2 100644 --- a/drivers/mtd/spi-nor/fsl-quadspi.c +++ b/drivers/mtd/spi-nor/fsl-quadspi.c @@ -373,9 +373,13 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) void __iomem *base = q->iobase; int rxfifo = q->devtype_data->rxfifo; u32 lut_base; - u8 cmd, addrlen, dummy; int i; + struct spi_nor *nor = &q->nor[0]; + u8 addrlen = (nor->addr_width == 3) ? ADDR24BIT : ADDR32BIT; + u8 read_op = nor->read_opcode; + u8 read_dm = nor->read_dummy; + fsl_qspi_unlock_lut(q); /* Clear all the LUT table */ @@ -385,20 +389,10 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) /* Quad Read */ lut_base = SEQID_QUAD_READ * 4; - if (q->nor_size <= SZ_16M) { - cmd = SPINOR_OP_READ_1_1_4; - addrlen = ADDR24BIT; - dummy = 8; - } else { - /* use the 4-byte address */ - cmd = SPINOR_OP_READ_1_1_4; - addrlen = ADDR32BIT; - dummy = 8; - } - - qspi_writel(q, LUT0(CMD, PAD1, cmd) | LUT1(ADDR, PAD1, addrlen), + qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen), base + QUADSPI_LUT(lut_base)); - qspi_writel(q, LUT0(DUMMY, PAD1, dummy) | LUT1(FSL_READ, PAD4, rxfifo), + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | + LUT1(FSL_READ, PAD4, rxfifo), base + QUADSPI_LUT(lut_base + 1)); /* Write enable */ @@ -409,16 +403,8 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) /* Page Program */ lut_base = SEQID_PP * 4; - if (q->nor_size <= SZ_16M) { - cmd = SPINOR_OP_PP; - addrlen = ADDR24BIT; - } else { - /* use the 4-byte address */ - cmd = SPINOR_OP_PP; - addrlen = ADDR32BIT; - } - - qspi_writel(q, LUT0(CMD, PAD1, cmd) | LUT1(ADDR, PAD1, addrlen), + qspi_writel(q, LUT0(CMD, PAD1, nor->program_opcode) | + LUT1(ADDR, PAD1, addrlen), base + QUADSPI_LUT(lut_base)); qspi_writel(q, LUT0(FSL_WRITE, PAD1, 0), base + QUADSPI_LUT(lut_base + 1)); @@ -432,10 +418,8 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) /* Erase a sector */ lut_base = SEQID_SE * 4; - cmd = q->nor[0].erase_opcode; - addrlen = q->nor_size <= SZ_16M ? ADDR24BIT : ADDR32BIT; - - qspi_writel(q, LUT0(CMD, PAD1, cmd) | LUT1(ADDR, PAD1, addrlen), + qspi_writel(q, LUT0(CMD, PAD1, nor->erase_opcode) | + LUT1(ADDR, PAD1, addrlen), base + QUADSPI_LUT(lut_base)); /* Erase the whole chip */ -- 2.1.0.27.g96db324 ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v2 1/4] mtd:fsl-quadspi:use the property fields of SPI-NOR @ 2016-02-01 11:30 ` Yunhui Cui 0 siblings, 0 replies; 25+ messages in thread From: Yunhui Cui @ 2016-02-01 11:30 UTC (permalink / raw) To: linux-arm-kernel We can get the read/write/erase opcode from the spi nor framework directly. This patch uses the information stored in the SPI-NOR to remove the hardcode in the fsl_qspi_init_lut(). Signed-off-by: Yunhui Cui <B56489@freescale.com> --- drivers/mtd/spi-nor/fsl-quadspi.c | 40 ++++++++++++--------------------------- 1 file changed, 12 insertions(+), 28 deletions(-) diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c index 9ab2b51..517ffe2 100644 --- a/drivers/mtd/spi-nor/fsl-quadspi.c +++ b/drivers/mtd/spi-nor/fsl-quadspi.c @@ -373,9 +373,13 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) void __iomem *base = q->iobase; int rxfifo = q->devtype_data->rxfifo; u32 lut_base; - u8 cmd, addrlen, dummy; int i; + struct spi_nor *nor = &q->nor[0]; + u8 addrlen = (nor->addr_width == 3) ? ADDR24BIT : ADDR32BIT; + u8 read_op = nor->read_opcode; + u8 read_dm = nor->read_dummy; + fsl_qspi_unlock_lut(q); /* Clear all the LUT table */ @@ -385,20 +389,10 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) /* Quad Read */ lut_base = SEQID_QUAD_READ * 4; - if (q->nor_size <= SZ_16M) { - cmd = SPINOR_OP_READ_1_1_4; - addrlen = ADDR24BIT; - dummy = 8; - } else { - /* use the 4-byte address */ - cmd = SPINOR_OP_READ_1_1_4; - addrlen = ADDR32BIT; - dummy = 8; - } - - qspi_writel(q, LUT0(CMD, PAD1, cmd) | LUT1(ADDR, PAD1, addrlen), + qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen), base + QUADSPI_LUT(lut_base)); - qspi_writel(q, LUT0(DUMMY, PAD1, dummy) | LUT1(FSL_READ, PAD4, rxfifo), + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | + LUT1(FSL_READ, PAD4, rxfifo), base + QUADSPI_LUT(lut_base + 1)); /* Write enable */ @@ -409,16 +403,8 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) /* Page Program */ lut_base = SEQID_PP * 4; - if (q->nor_size <= SZ_16M) { - cmd = SPINOR_OP_PP; - addrlen = ADDR24BIT; - } else { - /* use the 4-byte address */ - cmd = SPINOR_OP_PP; - addrlen = ADDR32BIT; - } - - qspi_writel(q, LUT0(CMD, PAD1, cmd) | LUT1(ADDR, PAD1, addrlen), + qspi_writel(q, LUT0(CMD, PAD1, nor->program_opcode) | + LUT1(ADDR, PAD1, addrlen), base + QUADSPI_LUT(lut_base)); qspi_writel(q, LUT0(FSL_WRITE, PAD1, 0), base + QUADSPI_LUT(lut_base + 1)); @@ -432,10 +418,8 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) /* Erase a sector */ lut_base = SEQID_SE * 4; - cmd = q->nor[0].erase_opcode; - addrlen = q->nor_size <= SZ_16M ? ADDR24BIT : ADDR32BIT; - - qspi_writel(q, LUT0(CMD, PAD1, cmd) | LUT1(ADDR, PAD1, addrlen), + qspi_writel(q, LUT0(CMD, PAD1, nor->erase_opcode) | + LUT1(ADDR, PAD1, addrlen), base + QUADSPI_LUT(lut_base)); /* Erase the whole chip */ -- 2.1.0.27.g96db324 ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v2 2/4] mtd: fsl-quadspi: Rename SEQID_QUAD_READ to SEQID_READ 2016-02-01 11:30 ` Yunhui Cui @ 2016-02-01 11:30 ` Yunhui Cui -1 siblings, 0 replies; 25+ messages in thread From: Yunhui Cui @ 2016-02-01 11:30 UTC (permalink / raw) To: dwmw2, computersforpeace, han.xu Cc: linux-kernel, linux-mtd, linux-arm-kernel, yao.yuan There are some read modes for flash, such as NORMAL, FAST, QUAD, DDR QUAD. These modes will use the identical lut table base So rename SEQID_QUAD_READ to SEQID_READ. Signed-off-by: Yunhui Cui <B56489@freescale.com> --- drivers/mtd/spi-nor/fsl-quadspi.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c index 517ffe2..9861290 100644 --- a/drivers/mtd/spi-nor/fsl-quadspi.c +++ b/drivers/mtd/spi-nor/fsl-quadspi.c @@ -193,7 +193,7 @@ #define QUADSPI_LUT_NUM 64 /* SEQID -- we can have 16 seqids at most. */ -#define SEQID_QUAD_READ 0 +#define SEQID_READ 0 #define SEQID_WREN 1 #define SEQID_WRDI 2 #define SEQID_RDSR 3 @@ -386,8 +386,8 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) for (i = 0; i < QUADSPI_LUT_NUM; i++) qspi_writel(q, 0, base + QUADSPI_LUT_BASE + i * 4); - /* Quad Read */ - lut_base = SEQID_QUAD_READ * 4; + /* Read */ + lut_base = SEQID_READ * 4; qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen), base + QUADSPI_LUT(lut_base)); @@ -468,7 +468,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi *q, u8 cmd) { switch (cmd) { case SPINOR_OP_READ_1_1_4: - return SEQID_QUAD_READ; + return SEQID_READ; case SPINOR_OP_WREN: return SEQID_WREN; case SPINOR_OP_WRDI: -- 2.1.0.27.g96db324 ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v2 2/4] mtd: fsl-quadspi: Rename SEQID_QUAD_READ to SEQID_READ @ 2016-02-01 11:30 ` Yunhui Cui 0 siblings, 0 replies; 25+ messages in thread From: Yunhui Cui @ 2016-02-01 11:30 UTC (permalink / raw) To: linux-arm-kernel There are some read modes for flash, such as NORMAL, FAST, QUAD, DDR QUAD. These modes will use the identical lut table base So rename SEQID_QUAD_READ to SEQID_READ. Signed-off-by: Yunhui Cui <B56489@freescale.com> --- drivers/mtd/spi-nor/fsl-quadspi.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c index 517ffe2..9861290 100644 --- a/drivers/mtd/spi-nor/fsl-quadspi.c +++ b/drivers/mtd/spi-nor/fsl-quadspi.c @@ -193,7 +193,7 @@ #define QUADSPI_LUT_NUM 64 /* SEQID -- we can have 16 seqids at most. */ -#define SEQID_QUAD_READ 0 +#define SEQID_READ 0 #define SEQID_WREN 1 #define SEQID_WRDI 2 #define SEQID_RDSR 3 @@ -386,8 +386,8 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) for (i = 0; i < QUADSPI_LUT_NUM; i++) qspi_writel(q, 0, base + QUADSPI_LUT_BASE + i * 4); - /* Quad Read */ - lut_base = SEQID_QUAD_READ * 4; + /* Read */ + lut_base = SEQID_READ * 4; qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen), base + QUADSPI_LUT(lut_base)); @@ -468,7 +468,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi *q, u8 cmd) { switch (cmd) { case SPINOR_OP_READ_1_1_4: - return SEQID_QUAD_READ; + return SEQID_READ; case SPINOR_OP_WREN: return SEQID_WREN; case SPINOR_OP_WRDI: -- 2.1.0.27.g96db324 ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support 2016-02-01 11:30 ` Yunhui Cui @ 2016-02-01 11:30 ` Yunhui Cui -1 siblings, 0 replies; 25+ messages in thread From: Yunhui Cui @ 2016-02-01 11:30 UTC (permalink / raw) To: dwmw2, computersforpeace, han.xu Cc: linux-kernel, linux-mtd, linux-arm-kernel, yao.yuan The qspi driver add generic fast-read mode for different flash venders. There are some different board flash work on different mode, such fast-read, quad-mode. So we have to modify the third entrace parameter of spi_nor_scan(). Signed-off-by: Yunhui Cui <B56489@freescale.com> --- drivers/mtd/spi-nor/fsl-quadspi.c | 27 +++++++++++++++++++++------ 1 file changed, 21 insertions(+), 6 deletions(-) diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c index 9861290..0a31cb1 100644 --- a/drivers/mtd/spi-nor/fsl-quadspi.c +++ b/drivers/mtd/spi-nor/fsl-quadspi.c @@ -389,11 +389,21 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) /* Read */ lut_base = SEQID_READ * 4; - qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen), - base + QUADSPI_LUT(lut_base)); - qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | - LUT1(FSL_READ, PAD4, rxfifo), - base + QUADSPI_LUT(lut_base + 1)); + if (nor->flash_read == SPI_NOR_FAST) { + qspi_writel(q, LUT0(CMD, PAD1, read_op) | + LUT1(ADDR, PAD1, addrlen), + base + QUADSPI_LUT(lut_base)); + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | + LUT1(FSL_READ, PAD1, rxfifo), + base + QUADSPI_LUT(lut_base + 1)); + } else if (nor->flash_read == SPI_NOR_QUAD) { + qspi_writel(q, LUT0(CMD, PAD1, read_op) | + LUT1(ADDR, PAD1, addrlen), + base + QUADSPI_LUT(lut_base)); + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | + LUT1(FSL_READ, PAD4, rxfifo), + base + QUADSPI_LUT(lut_base + 1)); + } /* Write enable */ lut_base = SEQID_WREN * 4; @@ -468,6 +478,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi *q, u8 cmd) { switch (cmd) { case SPINOR_OP_READ_1_1_4: + case SPINOR_OP_READ_FAST: return SEQID_READ; case SPINOR_OP_WREN: return SEQID_WREN; @@ -963,6 +974,7 @@ static int fsl_qspi_probe(struct platform_device *pdev) struct spi_nor *nor; struct mtd_info *mtd; int ret, i = 0; + enum read_mode mode = SPI_NOR_QUAD; q = devm_kzalloc(dev, sizeof(*q), GFP_KERNEL); if (!q) @@ -1064,7 +1076,10 @@ static int fsl_qspi_probe(struct platform_device *pdev) /* set the chip address for READID */ fsl_qspi_set_base_addr(q, nor); - ret = spi_nor_scan(nor, NULL, SPI_NOR_QUAD); + ret = of_property_read_bool(np, "m25p,fast-read"); + mode = (ret) ? SPI_NOR_FAST : SPI_NOR_QUAD; + + ret = spi_nor_scan(nor, NULL, mode); if (ret) goto mutex_failed; -- 2.1.0.27.g96db324 ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support @ 2016-02-01 11:30 ` Yunhui Cui 0 siblings, 0 replies; 25+ messages in thread From: Yunhui Cui @ 2016-02-01 11:30 UTC (permalink / raw) To: linux-arm-kernel The qspi driver add generic fast-read mode for different flash venders. There are some different board flash work on different mode, such fast-read, quad-mode. So we have to modify the third entrace parameter of spi_nor_scan(). Signed-off-by: Yunhui Cui <B56489@freescale.com> --- drivers/mtd/spi-nor/fsl-quadspi.c | 27 +++++++++++++++++++++------ 1 file changed, 21 insertions(+), 6 deletions(-) diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c index 9861290..0a31cb1 100644 --- a/drivers/mtd/spi-nor/fsl-quadspi.c +++ b/drivers/mtd/spi-nor/fsl-quadspi.c @@ -389,11 +389,21 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) /* Read */ lut_base = SEQID_READ * 4; - qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen), - base + QUADSPI_LUT(lut_base)); - qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | - LUT1(FSL_READ, PAD4, rxfifo), - base + QUADSPI_LUT(lut_base + 1)); + if (nor->flash_read == SPI_NOR_FAST) { + qspi_writel(q, LUT0(CMD, PAD1, read_op) | + LUT1(ADDR, PAD1, addrlen), + base + QUADSPI_LUT(lut_base)); + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | + LUT1(FSL_READ, PAD1, rxfifo), + base + QUADSPI_LUT(lut_base + 1)); + } else if (nor->flash_read == SPI_NOR_QUAD) { + qspi_writel(q, LUT0(CMD, PAD1, read_op) | + LUT1(ADDR, PAD1, addrlen), + base + QUADSPI_LUT(lut_base)); + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | + LUT1(FSL_READ, PAD4, rxfifo), + base + QUADSPI_LUT(lut_base + 1)); + } /* Write enable */ lut_base = SEQID_WREN * 4; @@ -468,6 +478,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi *q, u8 cmd) { switch (cmd) { case SPINOR_OP_READ_1_1_4: + case SPINOR_OP_READ_FAST: return SEQID_READ; case SPINOR_OP_WREN: return SEQID_WREN; @@ -963,6 +974,7 @@ static int fsl_qspi_probe(struct platform_device *pdev) struct spi_nor *nor; struct mtd_info *mtd; int ret, i = 0; + enum read_mode mode = SPI_NOR_QUAD; q = devm_kzalloc(dev, sizeof(*q), GFP_KERNEL); if (!q) @@ -1064,7 +1076,10 @@ static int fsl_qspi_probe(struct platform_device *pdev) /* set the chip address for READID */ fsl_qspi_set_base_addr(q, nor); - ret = spi_nor_scan(nor, NULL, SPI_NOR_QUAD); + ret = of_property_read_bool(np, "m25p,fast-read"); + mode = (ret) ? SPI_NOR_FAST : SPI_NOR_QUAD; + + ret = spi_nor_scan(nor, NULL, mode); if (ret) goto mutex_failed; -- 2.1.0.27.g96db324 ^ permalink raw reply related [flat|nested] 25+ messages in thread
* Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support 2016-02-01 11:30 ` Yunhui Cui @ 2016-02-17 18:07 ` Han Xu -1 siblings, 0 replies; 25+ messages in thread From: Han Xu @ 2016-02-17 18:07 UTC (permalink / raw) To: Yunhui Cui Cc: dwmw2, computersforpeace, han.xu, linux-mtd, linux-kernel, linux-arm-kernel, yao.yuan On Mon, Feb 01, 2016 at 07:30:07PM +0800, Yunhui Cui wrote: > The qspi driver add generic fast-read mode for different > flash venders. There are some different board flash work on > different mode, such fast-read, quad-mode. > So we have to modify the third entrace parameter of spi_nor_scan(). > > Signed-off-by: Yunhui Cui <B56489@freescale.com> > --- > drivers/mtd/spi-nor/fsl-quadspi.c | 27 +++++++++++++++++++++------ > 1 file changed, 21 insertions(+), 6 deletions(-) > > diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c > index 9861290..0a31cb1 100644 > --- a/drivers/mtd/spi-nor/fsl-quadspi.c > +++ b/drivers/mtd/spi-nor/fsl-quadspi.c > @@ -389,11 +389,21 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) > /* Read */ > lut_base = SEQID_READ * 4; > > - qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen), > - base + QUADSPI_LUT(lut_base)); > - qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > - LUT1(FSL_READ, PAD4, rxfifo), > - base + QUADSPI_LUT(lut_base + 1)); > + if (nor->flash_read == SPI_NOR_FAST) { > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > + LUT1(ADDR, PAD1, addrlen), > + base + QUADSPI_LUT(lut_base)); > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > + LUT1(FSL_READ, PAD1, rxfifo), > + base + QUADSPI_LUT(lut_base + 1)); > + } else if (nor->flash_read == SPI_NOR_QUAD) { > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > + LUT1(ADDR, PAD1, addrlen), > + base + QUADSPI_LUT(lut_base)); > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > + LUT1(FSL_READ, PAD4, rxfifo), > + base + QUADSPI_LUT(lut_base + 1)); > + } > > /* Write enable */ > lut_base = SEQID_WREN * 4; > @@ -468,6 +478,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi *q, u8 cmd) > { > switch (cmd) { > case SPINOR_OP_READ_1_1_4: > + case SPINOR_OP_READ_FAST: > return SEQID_READ; > case SPINOR_OP_WREN: > return SEQID_WREN; > @@ -963,6 +974,7 @@ static int fsl_qspi_probe(struct platform_device *pdev) > struct spi_nor *nor; > struct mtd_info *mtd; > int ret, i = 0; > + enum read_mode mode = SPI_NOR_QUAD; > > q = devm_kzalloc(dev, sizeof(*q), GFP_KERNEL); > if (!q) > @@ -1064,7 +1076,10 @@ static int fsl_qspi_probe(struct platform_device *pdev) > /* set the chip address for READID */ > fsl_qspi_set_base_addr(q, nor); > > - ret = spi_nor_scan(nor, NULL, SPI_NOR_QUAD); > + ret = of_property_read_bool(np, "m25p,fast-read"); > + mode = (ret) ? SPI_NOR_FAST : SPI_NOR_QUAD; > + > + ret = spi_nor_scan(nor, NULL, mode); > if (ret) > goto mutex_failed; > I understand you want to provide a more generic read mode, but this is a quad spi driver, I prefer to provide the options, either quad read/quad IO read, or just normal read. > -- > 2.1.0.27.g96db324 > > > ______________________________________________________ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support @ 2016-02-17 18:07 ` Han Xu 0 siblings, 0 replies; 25+ messages in thread From: Han Xu @ 2016-02-17 18:07 UTC (permalink / raw) To: linux-arm-kernel On Mon, Feb 01, 2016 at 07:30:07PM +0800, Yunhui Cui wrote: > The qspi driver add generic fast-read mode for different > flash venders. There are some different board flash work on > different mode, such fast-read, quad-mode. > So we have to modify the third entrace parameter of spi_nor_scan(). > > Signed-off-by: Yunhui Cui <B56489@freescale.com> > --- > drivers/mtd/spi-nor/fsl-quadspi.c | 27 +++++++++++++++++++++------ > 1 file changed, 21 insertions(+), 6 deletions(-) > > diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c b/drivers/mtd/spi-nor/fsl-quadspi.c > index 9861290..0a31cb1 100644 > --- a/drivers/mtd/spi-nor/fsl-quadspi.c > +++ b/drivers/mtd/spi-nor/fsl-quadspi.c > @@ -389,11 +389,21 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) > /* Read */ > lut_base = SEQID_READ * 4; > > - qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen), > - base + QUADSPI_LUT(lut_base)); > - qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > - LUT1(FSL_READ, PAD4, rxfifo), > - base + QUADSPI_LUT(lut_base + 1)); > + if (nor->flash_read == SPI_NOR_FAST) { > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > + LUT1(ADDR, PAD1, addrlen), > + base + QUADSPI_LUT(lut_base)); > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > + LUT1(FSL_READ, PAD1, rxfifo), > + base + QUADSPI_LUT(lut_base + 1)); > + } else if (nor->flash_read == SPI_NOR_QUAD) { > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > + LUT1(ADDR, PAD1, addrlen), > + base + QUADSPI_LUT(lut_base)); > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > + LUT1(FSL_READ, PAD4, rxfifo), > + base + QUADSPI_LUT(lut_base + 1)); > + } > > /* Write enable */ > lut_base = SEQID_WREN * 4; > @@ -468,6 +478,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi *q, u8 cmd) > { > switch (cmd) { > case SPINOR_OP_READ_1_1_4: > + case SPINOR_OP_READ_FAST: > return SEQID_READ; > case SPINOR_OP_WREN: > return SEQID_WREN; > @@ -963,6 +974,7 @@ static int fsl_qspi_probe(struct platform_device *pdev) > struct spi_nor *nor; > struct mtd_info *mtd; > int ret, i = 0; > + enum read_mode mode = SPI_NOR_QUAD; > > q = devm_kzalloc(dev, sizeof(*q), GFP_KERNEL); > if (!q) > @@ -1064,7 +1076,10 @@ static int fsl_qspi_probe(struct platform_device *pdev) > /* set the chip address for READID */ > fsl_qspi_set_base_addr(q, nor); > > - ret = spi_nor_scan(nor, NULL, SPI_NOR_QUAD); > + ret = of_property_read_bool(np, "m25p,fast-read"); > + mode = (ret) ? SPI_NOR_FAST : SPI_NOR_QUAD; > + > + ret = spi_nor_scan(nor, NULL, mode); > if (ret) > goto mutex_failed; > I understand you want to provide a more generic read mode, but this is a quad spi driver, I prefer to provide the options, either quad read/quad IO read, or just normal read. > -- > 2.1.0.27.g96db324 > > > ______________________________________________________ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
* RE: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support 2016-02-17 18:07 ` Han Xu (?) @ 2016-02-25 8:07 ` Yunhui Cui -1 siblings, 0 replies; 25+ messages in thread From: Yunhui Cui @ 2016-02-25 8:07 UTC (permalink / raw) To: Han Xu, Yunhui Cui Cc: dwmw2, computersforpeace, han.xu, linux-mtd, linux-kernel, linux-arm-kernel, Yao Yuan Hi Han, I have provided the options " m25p,fast-read ", because there are probable some flashes can't support quad mode. So we should support fast-read mode in our driver. Moreover, There is a option to select fast-read mode in spi_nor.c : /* If we were instantiated by DT, use it */ if (of_property_read_bool(np, "m25p,fast-read")) nor->flash_read = SPI_NOR_FAST; Thanks Yunhui -----Original Message----- From: Han Xu [mailto:xhnjupt@gmail.com] Sent: Thursday, February 18, 2016 2:08 AM To: Yunhui Cui Cc: dwmw2@infradead.org; computersforpeace@gmail.com; han.xu@freescale.com; linux-mtd@lists.infradead.org; linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Yao Yuan Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support On Mon, Feb 01, 2016 at 07:30:07PM +0800, Yunhui Cui wrote: > The qspi driver add generic fast-read mode for different flash > venders. There are some different board flash work on different mode, > such fast-read, quad-mode. > So we have to modify the third entrace parameter of spi_nor_scan(). > > Signed-off-by: Yunhui Cui <B56489@freescale.com> > --- > drivers/mtd/spi-nor/fsl-quadspi.c | 27 +++++++++++++++++++++------ > 1 file changed, 21 insertions(+), 6 deletions(-) > > diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c > b/drivers/mtd/spi-nor/fsl-quadspi.c > index 9861290..0a31cb1 100644 > --- a/drivers/mtd/spi-nor/fsl-quadspi.c > +++ b/drivers/mtd/spi-nor/fsl-quadspi.c > @@ -389,11 +389,21 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) > /* Read */ > lut_base = SEQID_READ * 4; > > - qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen), > - base + QUADSPI_LUT(lut_base)); > - qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > - LUT1(FSL_READ, PAD4, rxfifo), > - base + QUADSPI_LUT(lut_base + 1)); > + if (nor->flash_read == SPI_NOR_FAST) { > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > + LUT1(ADDR, PAD1, addrlen), > + base + QUADSPI_LUT(lut_base)); > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > + LUT1(FSL_READ, PAD1, rxfifo), > + base + QUADSPI_LUT(lut_base + 1)); > + } else if (nor->flash_read == SPI_NOR_QUAD) { > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > + LUT1(ADDR, PAD1, addrlen), > + base + QUADSPI_LUT(lut_base)); > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > + LUT1(FSL_READ, PAD4, rxfifo), > + base + QUADSPI_LUT(lut_base + 1)); > + } > > /* Write enable */ > lut_base = SEQID_WREN * 4; > @@ -468,6 +478,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi *q, > u8 cmd) { > switch (cmd) { > case SPINOR_OP_READ_1_1_4: > + case SPINOR_OP_READ_FAST: > return SEQID_READ; > case SPINOR_OP_WREN: > return SEQID_WREN; > @@ -963,6 +974,7 @@ static int fsl_qspi_probe(struct platform_device *pdev) > struct spi_nor *nor; > struct mtd_info *mtd; > int ret, i = 0; > + enum read_mode mode = SPI_NOR_QUAD; > > q = devm_kzalloc(dev, sizeof(*q), GFP_KERNEL); > if (!q) > @@ -1064,7 +1076,10 @@ static int fsl_qspi_probe(struct platform_device *pdev) > /* set the chip address for READID */ > fsl_qspi_set_base_addr(q, nor); > > - ret = spi_nor_scan(nor, NULL, SPI_NOR_QUAD); > + ret = of_property_read_bool(np, "m25p,fast-read"); > + mode = (ret) ? SPI_NOR_FAST : SPI_NOR_QUAD; > + > + ret = spi_nor_scan(nor, NULL, mode); > if (ret) > goto mutex_failed; > I understand you want to provide a more generic read mode, but this is a quad spi driver, I prefer to provide the options, either quad read/quad IO read, or just normal read. > -- > 2.1.0.27.g96db324 > > > ______________________________________________________ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support @ 2016-02-25 8:07 ` Yunhui Cui 0 siblings, 0 replies; 25+ messages in thread From: Yunhui Cui @ 2016-02-25 8:07 UTC (permalink / raw) To: linux-arm-kernel Hi Han, I have provided the options " m25p,fast-read ", because there are probable some flashes can't support quad mode. So we should support fast-read mode in our driver. Moreover, There is a option to select fast-read mode in spi_nor.c : /* If we were instantiated by DT, use it */ if (of_property_read_bool(np, "m25p,fast-read")) nor->flash_read = SPI_NOR_FAST; Thanks Yunhui -----Original Message----- From: Han Xu [mailto:xhnjupt at gmail.com] Sent: Thursday, February 18, 2016 2:08 AM To: Yunhui Cui Cc: dwmw2 at infradead.org; computersforpeace at gmail.com; han.xu at freescale.com; linux-mtd at lists.infradead.org; linux-kernel at vger.kernel.org; linux-arm-kernel at lists.infradead.org; Yao Yuan Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support On Mon, Feb 01, 2016 at 07:30:07PM +0800, Yunhui Cui wrote: > The qspi driver add generic fast-read mode for different flash > venders. There are some different board flash work on different mode, > such fast-read, quad-mode. > So we have to modify the third entrace parameter of spi_nor_scan(). > > Signed-off-by: Yunhui Cui <B56489@freescale.com> > --- > drivers/mtd/spi-nor/fsl-quadspi.c | 27 +++++++++++++++++++++------ > 1 file changed, 21 insertions(+), 6 deletions(-) > > diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c > b/drivers/mtd/spi-nor/fsl-quadspi.c > index 9861290..0a31cb1 100644 > --- a/drivers/mtd/spi-nor/fsl-quadspi.c > +++ b/drivers/mtd/spi-nor/fsl-quadspi.c > @@ -389,11 +389,21 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) > /* Read */ > lut_base = SEQID_READ * 4; > > - qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen), > - base + QUADSPI_LUT(lut_base)); > - qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > - LUT1(FSL_READ, PAD4, rxfifo), > - base + QUADSPI_LUT(lut_base + 1)); > + if (nor->flash_read == SPI_NOR_FAST) { > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > + LUT1(ADDR, PAD1, addrlen), > + base + QUADSPI_LUT(lut_base)); > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > + LUT1(FSL_READ, PAD1, rxfifo), > + base + QUADSPI_LUT(lut_base + 1)); > + } else if (nor->flash_read == SPI_NOR_QUAD) { > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > + LUT1(ADDR, PAD1, addrlen), > + base + QUADSPI_LUT(lut_base)); > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > + LUT1(FSL_READ, PAD4, rxfifo), > + base + QUADSPI_LUT(lut_base + 1)); > + } > > /* Write enable */ > lut_base = SEQID_WREN * 4; > @@ -468,6 +478,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi *q, > u8 cmd) { > switch (cmd) { > case SPINOR_OP_READ_1_1_4: > + case SPINOR_OP_READ_FAST: > return SEQID_READ; > case SPINOR_OP_WREN: > return SEQID_WREN; > @@ -963,6 +974,7 @@ static int fsl_qspi_probe(struct platform_device *pdev) > struct spi_nor *nor; > struct mtd_info *mtd; > int ret, i = 0; > + enum read_mode mode = SPI_NOR_QUAD; > > q = devm_kzalloc(dev, sizeof(*q), GFP_KERNEL); > if (!q) > @@ -1064,7 +1076,10 @@ static int fsl_qspi_probe(struct platform_device *pdev) > /* set the chip address for READID */ > fsl_qspi_set_base_addr(q, nor); > > - ret = spi_nor_scan(nor, NULL, SPI_NOR_QUAD); > + ret = of_property_read_bool(np, "m25p,fast-read"); > + mode = (ret) ? SPI_NOR_FAST : SPI_NOR_QUAD; > + > + ret = spi_nor_scan(nor, NULL, mode); > if (ret) > goto mutex_failed; > I understand you want to provide a more generic read mode, but this is a quad spi driver, I prefer to provide the options, either quad read/quad IO read, or just normal read. > -- > 2.1.0.27.g96db324 > > > ______________________________________________________ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
* RE: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support @ 2016-02-25 8:07 ` Yunhui Cui 0 siblings, 0 replies; 25+ messages in thread From: Yunhui Cui @ 2016-02-25 8:07 UTC (permalink / raw) To: Han Xu, Yunhui Cui Cc: dwmw2, computersforpeace, han.xu, linux-mtd, linux-kernel, linux-arm-kernel, Yao Yuan Hi Han, I have provided the options " m25p,fast-read ", because there are probable some flashes can't support quad mode. So we should support fast-read mode in our driver. Moreover, There is a option to select fast-read mode in spi_nor.c : /* If we were instantiated by DT, use it */ if (of_property_read_bool(np, "m25p,fast-read")) nor->flash_read = SPI_NOR_FAST; Thanks Yunhui -----Original Message----- From: Han Xu [mailto:xhnjupt@gmail.com] Sent: Thursday, February 18, 2016 2:08 AM To: Yunhui Cui Cc: dwmw2@infradead.org; computersforpeace@gmail.com; han.xu@freescale.com; linux-mtd@lists.infradead.org; linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Yao Yuan Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support On Mon, Feb 01, 2016 at 07:30:07PM +0800, Yunhui Cui wrote: > The qspi driver add generic fast-read mode for different flash > venders. There are some different board flash work on different mode, > such fast-read, quad-mode. > So we have to modify the third entrace parameter of spi_nor_scan(). > > Signed-off-by: Yunhui Cui <B56489@freescale.com> > --- > drivers/mtd/spi-nor/fsl-quadspi.c | 27 +++++++++++++++++++++------ > 1 file changed, 21 insertions(+), 6 deletions(-) > > diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c > b/drivers/mtd/spi-nor/fsl-quadspi.c > index 9861290..0a31cb1 100644 > --- a/drivers/mtd/spi-nor/fsl-quadspi.c > +++ b/drivers/mtd/spi-nor/fsl-quadspi.c > @@ -389,11 +389,21 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) > /* Read */ > lut_base = SEQID_READ * 4; > > - qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen), > - base + QUADSPI_LUT(lut_base)); > - qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > - LUT1(FSL_READ, PAD4, rxfifo), > - base + QUADSPI_LUT(lut_base + 1)); > + if (nor->flash_read == SPI_NOR_FAST) { > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > + LUT1(ADDR, PAD1, addrlen), > + base + QUADSPI_LUT(lut_base)); > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > + LUT1(FSL_READ, PAD1, rxfifo), > + base + QUADSPI_LUT(lut_base + 1)); > + } else if (nor->flash_read == SPI_NOR_QUAD) { > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > + LUT1(ADDR, PAD1, addrlen), > + base + QUADSPI_LUT(lut_base)); > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > + LUT1(FSL_READ, PAD4, rxfifo), > + base + QUADSPI_LUT(lut_base + 1)); > + } > > /* Write enable */ > lut_base = SEQID_WREN * 4; > @@ -468,6 +478,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi *q, > u8 cmd) { > switch (cmd) { > case SPINOR_OP_READ_1_1_4: > + case SPINOR_OP_READ_FAST: > return SEQID_READ; > case SPINOR_OP_WREN: > return SEQID_WREN; > @@ -963,6 +974,7 @@ static int fsl_qspi_probe(struct platform_device *pdev) > struct spi_nor *nor; > struct mtd_info *mtd; > int ret, i = 0; > + enum read_mode mode = SPI_NOR_QUAD; > > q = devm_kzalloc(dev, sizeof(*q), GFP_KERNEL); > if (!q) > @@ -1064,7 +1076,10 @@ static int fsl_qspi_probe(struct platform_device *pdev) > /* set the chip address for READID */ > fsl_qspi_set_base_addr(q, nor); > > - ret = spi_nor_scan(nor, NULL, SPI_NOR_QUAD); > + ret = of_property_read_bool(np, "m25p,fast-read"); > + mode = (ret) ? SPI_NOR_FAST : SPI_NOR_QUAD; > + > + ret = spi_nor_scan(nor, NULL, mode); > if (ret) > goto mutex_failed; > I understand you want to provide a more generic read mode, but this is a quad spi driver, I prefer to provide the options, either quad read/quad IO read, or just normal read. > -- > 2.1.0.27.g96db324 > > > ______________________________________________________ > Linux MTD discussion mailing list > http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support 2016-02-25 8:07 ` Yunhui Cui (?) @ 2016-02-26 16:31 ` Han Xu -1 siblings, 0 replies; 25+ messages in thread From: Han Xu @ 2016-02-26 16:31 UTC (permalink / raw) To: Yunhui Cui Cc: Yunhui Cui, dwmw2, computersforpeace, han.xu, linux-mtd, linux-kernel, linux-arm-kernel, Yao Yuan On Thu, Feb 25, 2016 at 08:07:22AM +0000, Yunhui Cui wrote: > Hi Han, > > I have provided the options " m25p,fast-read ", because there are probable some flashes can't support quad mode. > So we should support fast-read mode in our driver. Moreover, There is a option to select fast-read mode in spi_nor.c : > /* If we were instantiated by DT, use it */ > if (of_property_read_bool(np, "m25p,fast-read")) > nor->flash_read = SPI_NOR_FAST; Did you have some REAL cases using SPI NOR that only supports upto fast-read with Quad SPI driver? Neither fast-read or normal-read, which is actually more general, supported in the driver, just because I didn't see any REAL cases till now. I didn't run against the patch, although IMO it's not that necessary. But I don't think QuadSPI driver need to check the m25p,fast-read property again since spi-nor layer has already done that. Adding the property in flash node should work in the same way. > > Thanks > Yunhui > > -----Original Message----- > From: Han Xu [mailto:xhnjupt@gmail.com] > Sent: Thursday, February 18, 2016 2:08 AM > To: Yunhui Cui > Cc: dwmw2@infradead.org; computersforpeace@gmail.com; han.xu@freescale.com; linux-mtd@lists.infradead.org; linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Yao Yuan > Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support > > On Mon, Feb 01, 2016 at 07:30:07PM +0800, Yunhui Cui wrote: > > The qspi driver add generic fast-read mode for different flash > > venders. There are some different board flash work on different mode, > > such fast-read, quad-mode. > > So we have to modify the third entrace parameter of spi_nor_scan(). > > > > Signed-off-by: Yunhui Cui <B56489@freescale.com> > > --- > > drivers/mtd/spi-nor/fsl-quadspi.c | 27 +++++++++++++++++++++------ > > 1 file changed, 21 insertions(+), 6 deletions(-) > > > > diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c > > b/drivers/mtd/spi-nor/fsl-quadspi.c > > index 9861290..0a31cb1 100644 > > --- a/drivers/mtd/spi-nor/fsl-quadspi.c > > +++ b/drivers/mtd/spi-nor/fsl-quadspi.c > > @@ -389,11 +389,21 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) > > /* Read */ > > lut_base = SEQID_READ * 4; > > > > - qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen), > > - base + QUADSPI_LUT(lut_base)); > > - qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > - LUT1(FSL_READ, PAD4, rxfifo), > > - base + QUADSPI_LUT(lut_base + 1)); > > + if (nor->flash_read == SPI_NOR_FAST) { > > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > > + LUT1(ADDR, PAD1, addrlen), > > + base + QUADSPI_LUT(lut_base)); > > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > + LUT1(FSL_READ, PAD1, rxfifo), > > + base + QUADSPI_LUT(lut_base + 1)); > > + } else if (nor->flash_read == SPI_NOR_QUAD) { > > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > > + LUT1(ADDR, PAD1, addrlen), > > + base + QUADSPI_LUT(lut_base)); > > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > + LUT1(FSL_READ, PAD4, rxfifo), > > + base + QUADSPI_LUT(lut_base + 1)); > > + } > > > > /* Write enable */ > > lut_base = SEQID_WREN * 4; > > @@ -468,6 +478,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi *q, > > u8 cmd) { > > switch (cmd) { > > case SPINOR_OP_READ_1_1_4: > > + case SPINOR_OP_READ_FAST: > > return SEQID_READ; > > case SPINOR_OP_WREN: > > return SEQID_WREN; > > @@ -963,6 +974,7 @@ static int fsl_qspi_probe(struct platform_device *pdev) > > struct spi_nor *nor; > > struct mtd_info *mtd; > > int ret, i = 0; > > + enum read_mode mode = SPI_NOR_QUAD; > > > > q = devm_kzalloc(dev, sizeof(*q), GFP_KERNEL); > > if (!q) > > @@ -1064,7 +1076,10 @@ static int fsl_qspi_probe(struct platform_device *pdev) > > /* set the chip address for READID */ > > fsl_qspi_set_base_addr(q, nor); > > > > - ret = spi_nor_scan(nor, NULL, SPI_NOR_QUAD); > > + ret = of_property_read_bool(np, "m25p,fast-read"); > > + mode = (ret) ? SPI_NOR_FAST : SPI_NOR_QUAD; > > + > > + ret = spi_nor_scan(nor, NULL, mode); > > if (ret) > > goto mutex_failed; > > > I understand you want to provide a more generic read mode, but this is a quad spi driver, I prefer to provide the options, either quad read/quad IO read, or just normal read. > > -- > > 2.1.0.27.g96db324 > > > > > > ______________________________________________________ > > Linux MTD discussion mailing list > > http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support @ 2016-02-26 16:31 ` Han Xu 0 siblings, 0 replies; 25+ messages in thread From: Han Xu @ 2016-02-26 16:31 UTC (permalink / raw) To: linux-arm-kernel On Thu, Feb 25, 2016 at 08:07:22AM +0000, Yunhui Cui wrote: > Hi Han, > > I have provided the options " m25p,fast-read ", because there are probable some flashes can't support quad mode. > So we should support fast-read mode in our driver. Moreover, There is a option to select fast-read mode in spi_nor.c : > /* If we were instantiated by DT, use it */ > if (of_property_read_bool(np, "m25p,fast-read")) > nor->flash_read = SPI_NOR_FAST; Did you have some REAL cases using SPI NOR that only supports upto fast-read with Quad SPI driver? Neither fast-read or normal-read, which is actually more general, supported in the driver, just because I didn't see any REAL cases till now. I didn't run against the patch, although IMO it's not that necessary. But I don't think QuadSPI driver need to check the m25p,fast-read property again since spi-nor layer has already done that. Adding the property in flash node should work in the same way. > > Thanks > Yunhui > > -----Original Message----- > From: Han Xu [mailto:xhnjupt at gmail.com] > Sent: Thursday, February 18, 2016 2:08 AM > To: Yunhui Cui > Cc: dwmw2 at infradead.org; computersforpeace at gmail.com; han.xu at freescale.com; linux-mtd at lists.infradead.org; linux-kernel at vger.kernel.org; linux-arm-kernel at lists.infradead.org; Yao Yuan > Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support > > On Mon, Feb 01, 2016 at 07:30:07PM +0800, Yunhui Cui wrote: > > The qspi driver add generic fast-read mode for different flash > > venders. There are some different board flash work on different mode, > > such fast-read, quad-mode. > > So we have to modify the third entrace parameter of spi_nor_scan(). > > > > Signed-off-by: Yunhui Cui <B56489@freescale.com> > > --- > > drivers/mtd/spi-nor/fsl-quadspi.c | 27 +++++++++++++++++++++------ > > 1 file changed, 21 insertions(+), 6 deletions(-) > > > > diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c > > b/drivers/mtd/spi-nor/fsl-quadspi.c > > index 9861290..0a31cb1 100644 > > --- a/drivers/mtd/spi-nor/fsl-quadspi.c > > +++ b/drivers/mtd/spi-nor/fsl-quadspi.c > > @@ -389,11 +389,21 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) > > /* Read */ > > lut_base = SEQID_READ * 4; > > > > - qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen), > > - base + QUADSPI_LUT(lut_base)); > > - qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > - LUT1(FSL_READ, PAD4, rxfifo), > > - base + QUADSPI_LUT(lut_base + 1)); > > + if (nor->flash_read == SPI_NOR_FAST) { > > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > > + LUT1(ADDR, PAD1, addrlen), > > + base + QUADSPI_LUT(lut_base)); > > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > + LUT1(FSL_READ, PAD1, rxfifo), > > + base + QUADSPI_LUT(lut_base + 1)); > > + } else if (nor->flash_read == SPI_NOR_QUAD) { > > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > > + LUT1(ADDR, PAD1, addrlen), > > + base + QUADSPI_LUT(lut_base)); > > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > + LUT1(FSL_READ, PAD4, rxfifo), > > + base + QUADSPI_LUT(lut_base + 1)); > > + } > > > > /* Write enable */ > > lut_base = SEQID_WREN * 4; > > @@ -468,6 +478,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi *q, > > u8 cmd) { > > switch (cmd) { > > case SPINOR_OP_READ_1_1_4: > > + case SPINOR_OP_READ_FAST: > > return SEQID_READ; > > case SPINOR_OP_WREN: > > return SEQID_WREN; > > @@ -963,6 +974,7 @@ static int fsl_qspi_probe(struct platform_device *pdev) > > struct spi_nor *nor; > > struct mtd_info *mtd; > > int ret, i = 0; > > + enum read_mode mode = SPI_NOR_QUAD; > > > > q = devm_kzalloc(dev, sizeof(*q), GFP_KERNEL); > > if (!q) > > @@ -1064,7 +1076,10 @@ static int fsl_qspi_probe(struct platform_device *pdev) > > /* set the chip address for READID */ > > fsl_qspi_set_base_addr(q, nor); > > > > - ret = spi_nor_scan(nor, NULL, SPI_NOR_QUAD); > > + ret = of_property_read_bool(np, "m25p,fast-read"); > > + mode = (ret) ? SPI_NOR_FAST : SPI_NOR_QUAD; > > + > > + ret = spi_nor_scan(nor, NULL, mode); > > if (ret) > > goto mutex_failed; > > > I understand you want to provide a more generic read mode, but this is a quad spi driver, I prefer to provide the options, either quad read/quad IO read, or just normal read. > > -- > > 2.1.0.27.g96db324 > > > > > > ______________________________________________________ > > Linux MTD discussion mailing list > > http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support @ 2016-02-26 16:31 ` Han Xu 0 siblings, 0 replies; 25+ messages in thread From: Han Xu @ 2016-02-26 16:31 UTC (permalink / raw) To: Yunhui Cui Cc: Yunhui Cui, dwmw2, computersforpeace, han.xu, linux-mtd, linux-kernel, linux-arm-kernel, Yao Yuan On Thu, Feb 25, 2016 at 08:07:22AM +0000, Yunhui Cui wrote: > Hi Han, > > I have provided the options " m25p,fast-read ", because there are probable some flashes can't support quad mode. > So we should support fast-read mode in our driver. Moreover, There is a option to select fast-read mode in spi_nor.c : > /* If we were instantiated by DT, use it */ > if (of_property_read_bool(np, "m25p,fast-read")) > nor->flash_read = SPI_NOR_FAST; Did you have some REAL cases using SPI NOR that only supports upto fast-read with Quad SPI driver? Neither fast-read or normal-read, which is actually more general, supported in the driver, just because I didn't see any REAL cases till now. I didn't run against the patch, although IMO it's not that necessary. But I don't think QuadSPI driver need to check the m25p,fast-read property again since spi-nor layer has already done that. Adding the property in flash node should work in the same way. > > Thanks > Yunhui > > -----Original Message----- > From: Han Xu [mailto:xhnjupt@gmail.com] > Sent: Thursday, February 18, 2016 2:08 AM > To: Yunhui Cui > Cc: dwmw2@infradead.org; computersforpeace@gmail.com; han.xu@freescale.com; linux-mtd@lists.infradead.org; linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Yao Yuan > Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support > > On Mon, Feb 01, 2016 at 07:30:07PM +0800, Yunhui Cui wrote: > > The qspi driver add generic fast-read mode for different flash > > venders. There are some different board flash work on different mode, > > such fast-read, quad-mode. > > So we have to modify the third entrace parameter of spi_nor_scan(). > > > > Signed-off-by: Yunhui Cui <B56489@freescale.com> > > --- > > drivers/mtd/spi-nor/fsl-quadspi.c | 27 +++++++++++++++++++++------ > > 1 file changed, 21 insertions(+), 6 deletions(-) > > > > diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c > > b/drivers/mtd/spi-nor/fsl-quadspi.c > > index 9861290..0a31cb1 100644 > > --- a/drivers/mtd/spi-nor/fsl-quadspi.c > > +++ b/drivers/mtd/spi-nor/fsl-quadspi.c > > @@ -389,11 +389,21 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) > > /* Read */ > > lut_base = SEQID_READ * 4; > > > > - qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen), > > - base + QUADSPI_LUT(lut_base)); > > - qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > - LUT1(FSL_READ, PAD4, rxfifo), > > - base + QUADSPI_LUT(lut_base + 1)); > > + if (nor->flash_read == SPI_NOR_FAST) { > > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > > + LUT1(ADDR, PAD1, addrlen), > > + base + QUADSPI_LUT(lut_base)); > > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > + LUT1(FSL_READ, PAD1, rxfifo), > > + base + QUADSPI_LUT(lut_base + 1)); > > + } else if (nor->flash_read == SPI_NOR_QUAD) { > > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > > + LUT1(ADDR, PAD1, addrlen), > > + base + QUADSPI_LUT(lut_base)); > > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > + LUT1(FSL_READ, PAD4, rxfifo), > > + base + QUADSPI_LUT(lut_base + 1)); > > + } > > > > /* Write enable */ > > lut_base = SEQID_WREN * 4; > > @@ -468,6 +478,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi *q, > > u8 cmd) { > > switch (cmd) { > > case SPINOR_OP_READ_1_1_4: > > + case SPINOR_OP_READ_FAST: > > return SEQID_READ; > > case SPINOR_OP_WREN: > > return SEQID_WREN; > > @@ -963,6 +974,7 @@ static int fsl_qspi_probe(struct platform_device *pdev) > > struct spi_nor *nor; > > struct mtd_info *mtd; > > int ret, i = 0; > > + enum read_mode mode = SPI_NOR_QUAD; > > > > q = devm_kzalloc(dev, sizeof(*q), GFP_KERNEL); > > if (!q) > > @@ -1064,7 +1076,10 @@ static int fsl_qspi_probe(struct platform_device *pdev) > > /* set the chip address for READID */ > > fsl_qspi_set_base_addr(q, nor); > > > > - ret = spi_nor_scan(nor, NULL, SPI_NOR_QUAD); > > + ret = of_property_read_bool(np, "m25p,fast-read"); > > + mode = (ret) ? SPI_NOR_FAST : SPI_NOR_QUAD; > > + > > + ret = spi_nor_scan(nor, NULL, mode); > > if (ret) > > goto mutex_failed; > > > I understand you want to provide a more generic read mode, but this is a quad spi driver, I prefer to provide the options, either quad read/quad IO read, or just normal read. > > -- > > 2.1.0.27.g96db324 > > > > > > ______________________________________________________ > > Linux MTD discussion mailing list > > http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
* RE: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support 2016-02-26 16:31 ` Han Xu (?) @ 2016-02-29 3:43 ` Yunhui Cui -1 siblings, 0 replies; 25+ messages in thread From: Yunhui Cui @ 2016-02-29 3:43 UTC (permalink / raw) To: Han Xu Cc: Yunhui Cui, dwmw2, computersforpeace, han.xu, linux-mtd, linux-kernel, linux-arm-kernel, Yao Yuan Hi Han, But I don't think QuadSPI driver need to check the m25p,fast-read property again since spi-nor layer has already done that. Adding the property in flash node should work in the same way. [Yunhui]: There are three modes in fsl-quadspi driver , fast mode, quad mode, ddr quad read. The last parameter mode of spi_nor_scan() I have to specify . Otherwise, flash is still set to quad mode. spi-nor.c: 1419 if (mode == SPI_NOR_QUAD && info->flags & SPI_NOR_QUAD_READ) { 1420 ret = set_quad_mode(nor, info); 1421 if (ret) { 1422 dev_err(dev, "quad mode not supported\n"); 1423 return ret; 1424 } 1425 nor->flash_read = SPI_NOR_QUAD; 1426 } else if (mode == SPI_NOR_DUAL && info->flags & SPI_NOR_DUAL_READ) { 1427 nor->flash_read = SPI_NOR_DUAL; 1428 } Thanks Yunhui -----Original Message----- From: Han Xu [mailto:xhnjupt@gmail.com] Sent: Saturday, February 27, 2016 12:32 AM To: Yunhui Cui Cc: Yunhui Cui; dwmw2@infradead.org; computersforpeace@gmail.com; han.xu@freescale.com; linux-mtd@lists.infradead.org; linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Yao Yuan Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support On Thu, Feb 25, 2016 at 08:07:22AM +0000, Yunhui Cui wrote: > Hi Han, > > I have provided the options " m25p,fast-read ", because there are probable some flashes can't support quad mode. > So we should support fast-read mode in our driver. Moreover, There is a option to select fast-read mode in spi_nor.c : > /* If we were instantiated by DT, use it */ > if (of_property_read_bool(np, "m25p,fast-read")) > nor->flash_read = SPI_NOR_FAST; Did you have some REAL cases using SPI NOR that only supports upto fast-read with Quad SPI driver? Neither fast-read or normal-read, which is actually more general, supported in the driver, just because I didn't see any REAL cases till now. I didn't run against the patch, although IMO it's not that necessary. But I don't think QuadSPI driver need to check the m25p,fast-read property again since spi-nor layer has already done that. Adding the property in flash node should work in the same way. > > Thanks > Yunhui > > -----Original Message----- > From: Han Xu [mailto:xhnjupt@gmail.com] > Sent: Thursday, February 18, 2016 2:08 AM > To: Yunhui Cui > Cc: dwmw2@infradead.org; computersforpeace@gmail.com; > han.xu@freescale.com; linux-mtd@lists.infradead.org; > linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; > Yao Yuan > Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode > support > > On Mon, Feb 01, 2016 at 07:30:07PM +0800, Yunhui Cui wrote: > > The qspi driver add generic fast-read mode for different flash > > venders. There are some different board flash work on different > > mode, such fast-read, quad-mode. > > So we have to modify the third entrace parameter of spi_nor_scan(). > > > > Signed-off-by: Yunhui Cui <B56489@freescale.com> > > --- > > drivers/mtd/spi-nor/fsl-quadspi.c | 27 +++++++++++++++++++++------ > > 1 file changed, 21 insertions(+), 6 deletions(-) > > > > diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c > > b/drivers/mtd/spi-nor/fsl-quadspi.c > > index 9861290..0a31cb1 100644 > > --- a/drivers/mtd/spi-nor/fsl-quadspi.c > > +++ b/drivers/mtd/spi-nor/fsl-quadspi.c > > @@ -389,11 +389,21 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) > > /* Read */ > > lut_base = SEQID_READ * 4; > > > > - qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen), > > - base + QUADSPI_LUT(lut_base)); > > - qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > - LUT1(FSL_READ, PAD4, rxfifo), > > - base + QUADSPI_LUT(lut_base + 1)); > > + if (nor->flash_read == SPI_NOR_FAST) { > > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > > + LUT1(ADDR, PAD1, addrlen), > > + base + QUADSPI_LUT(lut_base)); > > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > + LUT1(FSL_READ, PAD1, rxfifo), > > + base + QUADSPI_LUT(lut_base + 1)); > > + } else if (nor->flash_read == SPI_NOR_QUAD) { > > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > > + LUT1(ADDR, PAD1, addrlen), > > + base + QUADSPI_LUT(lut_base)); > > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > + LUT1(FSL_READ, PAD4, rxfifo), > > + base + QUADSPI_LUT(lut_base + 1)); > > + } > > > > /* Write enable */ > > lut_base = SEQID_WREN * 4; > > @@ -468,6 +478,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi > > *q, > > u8 cmd) { > > switch (cmd) { > > case SPINOR_OP_READ_1_1_4: > > + case SPINOR_OP_READ_FAST: > > return SEQID_READ; > > case SPINOR_OP_WREN: > > return SEQID_WREN; > > @@ -963,6 +974,7 @@ static int fsl_qspi_probe(struct platform_device *pdev) > > struct spi_nor *nor; > > struct mtd_info *mtd; > > int ret, i = 0; > > + enum read_mode mode = SPI_NOR_QUAD; > > > > q = devm_kzalloc(dev, sizeof(*q), GFP_KERNEL); > > if (!q) > > @@ -1064,7 +1076,10 @@ static int fsl_qspi_probe(struct platform_device *pdev) > > /* set the chip address for READID */ > > fsl_qspi_set_base_addr(q, nor); > > > > - ret = spi_nor_scan(nor, NULL, SPI_NOR_QUAD); > > + ret = of_property_read_bool(np, "m25p,fast-read"); > > + mode = (ret) ? SPI_NOR_FAST : SPI_NOR_QUAD; > > + > > + ret = spi_nor_scan(nor, NULL, mode); > > if (ret) > > goto mutex_failed; > > > I understand you want to provide a more generic read mode, but this is a quad spi driver, I prefer to provide the options, either quad read/quad IO read, or just normal read. > > -- > > 2.1.0.27.g96db324 > > > > > > ______________________________________________________ > > Linux MTD discussion mailing list > > http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support @ 2016-02-29 3:43 ` Yunhui Cui 0 siblings, 0 replies; 25+ messages in thread From: Yunhui Cui @ 2016-02-29 3:43 UTC (permalink / raw) To: linux-arm-kernel Hi Han, But I don't think QuadSPI driver need to check the m25p,fast-read property again since spi-nor layer has already done that. Adding the property in flash node should work in the same way. [Yunhui]: There are three modes in fsl-quadspi driver , fast mode, quad mode, ddr quad read. The last parameter mode of spi_nor_scan() I have to specify . Otherwise, flash is still set to quad mode. spi-nor.c: 1419 if (mode == SPI_NOR_QUAD && info->flags & SPI_NOR_QUAD_READ) { 1420 ret = set_quad_mode(nor, info); 1421 if (ret) { 1422 dev_err(dev, "quad mode not supported\n"); 1423 return ret; 1424 } 1425 nor->flash_read = SPI_NOR_QUAD; 1426 } else if (mode == SPI_NOR_DUAL && info->flags & SPI_NOR_DUAL_READ) { 1427 nor->flash_read = SPI_NOR_DUAL; 1428 } Thanks Yunhui -----Original Message----- From: Han Xu [mailto:xhnjupt at gmail.com] Sent: Saturday, February 27, 2016 12:32 AM To: Yunhui Cui Cc: Yunhui Cui; dwmw2 at infradead.org; computersforpeace at gmail.com; han.xu at freescale.com; linux-mtd at lists.infradead.org; linux-kernel at vger.kernel.org; linux-arm-kernel at lists.infradead.org; Yao Yuan Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support On Thu, Feb 25, 2016 at 08:07:22AM +0000, Yunhui Cui wrote: > Hi Han, > > I have provided the options " m25p,fast-read ", because there are probable some flashes can't support quad mode. > So we should support fast-read mode in our driver. Moreover, There is a option to select fast-read mode in spi_nor.c : > /* If we were instantiated by DT, use it */ > if (of_property_read_bool(np, "m25p,fast-read")) > nor->flash_read = SPI_NOR_FAST; Did you have some REAL cases using SPI NOR that only supports upto fast-read with Quad SPI driver? Neither fast-read or normal-read, which is actually more general, supported in the driver, just because I didn't see any REAL cases till now. I didn't run against the patch, although IMO it's not that necessary. But I don't think QuadSPI driver need to check the m25p,fast-read property again since spi-nor layer has already done that. Adding the property in flash node should work in the same way. > > Thanks > Yunhui > > -----Original Message----- > From: Han Xu [mailto:xhnjupt at gmail.com] > Sent: Thursday, February 18, 2016 2:08 AM > To: Yunhui Cui > Cc: dwmw2 at infradead.org; computersforpeace at gmail.com; > han.xu at freescale.com; linux-mtd at lists.infradead.org; > linux-kernel at vger.kernel.org; linux-arm-kernel at lists.infradead.org; > Yao Yuan > Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode > support > > On Mon, Feb 01, 2016 at 07:30:07PM +0800, Yunhui Cui wrote: > > The qspi driver add generic fast-read mode for different flash > > venders. There are some different board flash work on different > > mode, such fast-read, quad-mode. > > So we have to modify the third entrace parameter of spi_nor_scan(). > > > > Signed-off-by: Yunhui Cui <B56489@freescale.com> > > --- > > drivers/mtd/spi-nor/fsl-quadspi.c | 27 +++++++++++++++++++++------ > > 1 file changed, 21 insertions(+), 6 deletions(-) > > > > diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c > > b/drivers/mtd/spi-nor/fsl-quadspi.c > > index 9861290..0a31cb1 100644 > > --- a/drivers/mtd/spi-nor/fsl-quadspi.c > > +++ b/drivers/mtd/spi-nor/fsl-quadspi.c > > @@ -389,11 +389,21 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) > > /* Read */ > > lut_base = SEQID_READ * 4; > > > > - qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen), > > - base + QUADSPI_LUT(lut_base)); > > - qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > - LUT1(FSL_READ, PAD4, rxfifo), > > - base + QUADSPI_LUT(lut_base + 1)); > > + if (nor->flash_read == SPI_NOR_FAST) { > > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > > + LUT1(ADDR, PAD1, addrlen), > > + base + QUADSPI_LUT(lut_base)); > > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > + LUT1(FSL_READ, PAD1, rxfifo), > > + base + QUADSPI_LUT(lut_base + 1)); > > + } else if (nor->flash_read == SPI_NOR_QUAD) { > > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > > + LUT1(ADDR, PAD1, addrlen), > > + base + QUADSPI_LUT(lut_base)); > > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > + LUT1(FSL_READ, PAD4, rxfifo), > > + base + QUADSPI_LUT(lut_base + 1)); > > + } > > > > /* Write enable */ > > lut_base = SEQID_WREN * 4; > > @@ -468,6 +478,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi > > *q, > > u8 cmd) { > > switch (cmd) { > > case SPINOR_OP_READ_1_1_4: > > + case SPINOR_OP_READ_FAST: > > return SEQID_READ; > > case SPINOR_OP_WREN: > > return SEQID_WREN; > > @@ -963,6 +974,7 @@ static int fsl_qspi_probe(struct platform_device *pdev) > > struct spi_nor *nor; > > struct mtd_info *mtd; > > int ret, i = 0; > > + enum read_mode mode = SPI_NOR_QUAD; > > > > q = devm_kzalloc(dev, sizeof(*q), GFP_KERNEL); > > if (!q) > > @@ -1064,7 +1076,10 @@ static int fsl_qspi_probe(struct platform_device *pdev) > > /* set the chip address for READID */ > > fsl_qspi_set_base_addr(q, nor); > > > > - ret = spi_nor_scan(nor, NULL, SPI_NOR_QUAD); > > + ret = of_property_read_bool(np, "m25p,fast-read"); > > + mode = (ret) ? SPI_NOR_FAST : SPI_NOR_QUAD; > > + > > + ret = spi_nor_scan(nor, NULL, mode); > > if (ret) > > goto mutex_failed; > > > I understand you want to provide a more generic read mode, but this is a quad spi driver, I prefer to provide the options, either quad read/quad IO read, or just normal read. > > -- > > 2.1.0.27.g96db324 > > > > > > ______________________________________________________ > > Linux MTD discussion mailing list > > http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
* RE: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support @ 2016-02-29 3:43 ` Yunhui Cui 0 siblings, 0 replies; 25+ messages in thread From: Yunhui Cui @ 2016-02-29 3:43 UTC (permalink / raw) To: Han Xu Cc: Yunhui Cui, dwmw2, computersforpeace, han.xu, linux-mtd, linux-kernel, linux-arm-kernel, Yao Yuan Hi Han, But I don't think QuadSPI driver need to check the m25p,fast-read property again since spi-nor layer has already done that. Adding the property in flash node should work in the same way. [Yunhui]: There are three modes in fsl-quadspi driver , fast mode, quad mode, ddr quad read. The last parameter mode of spi_nor_scan() I have to specify . Otherwise, flash is still set to quad mode. spi-nor.c: 1419 if (mode == SPI_NOR_QUAD && info->flags & SPI_NOR_QUAD_READ) { 1420 ret = set_quad_mode(nor, info); 1421 if (ret) { 1422 dev_err(dev, "quad mode not supported\n"); 1423 return ret; 1424 } 1425 nor->flash_read = SPI_NOR_QUAD; 1426 } else if (mode == SPI_NOR_DUAL && info->flags & SPI_NOR_DUAL_READ) { 1427 nor->flash_read = SPI_NOR_DUAL; 1428 } Thanks Yunhui -----Original Message----- From: Han Xu [mailto:xhnjupt@gmail.com] Sent: Saturday, February 27, 2016 12:32 AM To: Yunhui Cui Cc: Yunhui Cui; dwmw2@infradead.org; computersforpeace@gmail.com; han.xu@freescale.com; linux-mtd@lists.infradead.org; linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Yao Yuan Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support On Thu, Feb 25, 2016 at 08:07:22AM +0000, Yunhui Cui wrote: > Hi Han, > > I have provided the options " m25p,fast-read ", because there are probable some flashes can't support quad mode. > So we should support fast-read mode in our driver. Moreover, There is a option to select fast-read mode in spi_nor.c : > /* If we were instantiated by DT, use it */ > if (of_property_read_bool(np, "m25p,fast-read")) > nor->flash_read = SPI_NOR_FAST; Did you have some REAL cases using SPI NOR that only supports upto fast-read with Quad SPI driver? Neither fast-read or normal-read, which is actually more general, supported in the driver, just because I didn't see any REAL cases till now. I didn't run against the patch, although IMO it's not that necessary. But I don't think QuadSPI driver need to check the m25p,fast-read property again since spi-nor layer has already done that. Adding the property in flash node should work in the same way. > > Thanks > Yunhui > > -----Original Message----- > From: Han Xu [mailto:xhnjupt@gmail.com] > Sent: Thursday, February 18, 2016 2:08 AM > To: Yunhui Cui > Cc: dwmw2@infradead.org; computersforpeace@gmail.com; > han.xu@freescale.com; linux-mtd@lists.infradead.org; > linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; > Yao Yuan > Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode > support > > On Mon, Feb 01, 2016 at 07:30:07PM +0800, Yunhui Cui wrote: > > The qspi driver add generic fast-read mode for different flash > > venders. There are some different board flash work on different > > mode, such fast-read, quad-mode. > > So we have to modify the third entrace parameter of spi_nor_scan(). > > > > Signed-off-by: Yunhui Cui <B56489@freescale.com> > > --- > > drivers/mtd/spi-nor/fsl-quadspi.c | 27 +++++++++++++++++++++------ > > 1 file changed, 21 insertions(+), 6 deletions(-) > > > > diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c > > b/drivers/mtd/spi-nor/fsl-quadspi.c > > index 9861290..0a31cb1 100644 > > --- a/drivers/mtd/spi-nor/fsl-quadspi.c > > +++ b/drivers/mtd/spi-nor/fsl-quadspi.c > > @@ -389,11 +389,21 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) > > /* Read */ > > lut_base = SEQID_READ * 4; > > > > - qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen), > > - base + QUADSPI_LUT(lut_base)); > > - qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > - LUT1(FSL_READ, PAD4, rxfifo), > > - base + QUADSPI_LUT(lut_base + 1)); > > + if (nor->flash_read == SPI_NOR_FAST) { > > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > > + LUT1(ADDR, PAD1, addrlen), > > + base + QUADSPI_LUT(lut_base)); > > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > + LUT1(FSL_READ, PAD1, rxfifo), > > + base + QUADSPI_LUT(lut_base + 1)); > > + } else if (nor->flash_read == SPI_NOR_QUAD) { > > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > > + LUT1(ADDR, PAD1, addrlen), > > + base + QUADSPI_LUT(lut_base)); > > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > + LUT1(FSL_READ, PAD4, rxfifo), > > + base + QUADSPI_LUT(lut_base + 1)); > > + } > > > > /* Write enable */ > > lut_base = SEQID_WREN * 4; > > @@ -468,6 +478,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi > > *q, > > u8 cmd) { > > switch (cmd) { > > case SPINOR_OP_READ_1_1_4: > > + case SPINOR_OP_READ_FAST: > > return SEQID_READ; > > case SPINOR_OP_WREN: > > return SEQID_WREN; > > @@ -963,6 +974,7 @@ static int fsl_qspi_probe(struct platform_device *pdev) > > struct spi_nor *nor; > > struct mtd_info *mtd; > > int ret, i = 0; > > + enum read_mode mode = SPI_NOR_QUAD; > > > > q = devm_kzalloc(dev, sizeof(*q), GFP_KERNEL); > > if (!q) > > @@ -1064,7 +1076,10 @@ static int fsl_qspi_probe(struct platform_device *pdev) > > /* set the chip address for READID */ > > fsl_qspi_set_base_addr(q, nor); > > > > - ret = spi_nor_scan(nor, NULL, SPI_NOR_QUAD); > > + ret = of_property_read_bool(np, "m25p,fast-read"); > > + mode = (ret) ? SPI_NOR_FAST : SPI_NOR_QUAD; > > + > > + ret = spi_nor_scan(nor, NULL, mode); > > if (ret) > > goto mutex_failed; > > > I understand you want to provide a more generic read mode, but this is a quad spi driver, I prefer to provide the options, either quad read/quad IO read, or just normal read. > > -- > > 2.1.0.27.g96db324 > > > > > > ______________________________________________________ > > Linux MTD discussion mailing list > > http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support 2016-02-29 3:43 ` Yunhui Cui (?) @ 2016-02-29 20:17 ` Han Xu -1 siblings, 0 replies; 25+ messages in thread From: Han Xu @ 2016-02-29 20:17 UTC (permalink / raw) To: Yunhui Cui Cc: Yunhui Cui, dwmw2, computersforpeace, han.xu, linux-mtd, linux-kernel, linux-arm-kernel, Yao Yuan On Mon, Feb 29, 2016 at 03:43:36AM +0000, Yunhui Cui wrote: > Hi Han, > > But I don't think QuadSPI driver need to check the m25p,fast-read property again since spi-nor layer has already done that. Adding the property in flash node should work in the same way. > > [Yunhui]: There are three modes in fsl-quadspi driver , fast mode, quad mode, ddr quad read. The last parameter mode of spi_nor_scan() I have to specify . Otherwise, flash is still set to quad mode. If the Nor chip behaves as you said only support fasst-read, the (info->flags & SPI_NOR_QUAD_READ) can only take false path. > spi-nor.c: > > 1419 if (mode == SPI_NOR_QUAD && info->flags & SPI_NOR_QUAD_READ) { > 1420 ret = set_quad_mode(nor, info); > 1421 if (ret) { > 1422 dev_err(dev, "quad mode not supported\n"); > 1423 return ret; > 1424 } > 1425 nor->flash_read = SPI_NOR_QUAD; > 1426 } else if (mode == SPI_NOR_DUAL && info->flags & SPI_NOR_DUAL_READ) { > 1427 nor->flash_read = SPI_NOR_DUAL; > 1428 } > > > Thanks > Yunhui > -----Original Message----- > From: Han Xu [mailto:xhnjupt@gmail.com] > Sent: Saturday, February 27, 2016 12:32 AM > To: Yunhui Cui > Cc: Yunhui Cui; dwmw2@infradead.org; computersforpeace@gmail.com; han.xu@freescale.com; linux-mtd@lists.infradead.org; linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Yao Yuan > Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support > > On Thu, Feb 25, 2016 at 08:07:22AM +0000, Yunhui Cui wrote: > > Hi Han, > > > > I have provided the options " m25p,fast-read ", because there are probable some flashes can't support quad mode. > > So we should support fast-read mode in our driver. Moreover, There is a option to select fast-read mode in spi_nor.c : > > /* If we were instantiated by DT, use it */ > > if (of_property_read_bool(np, "m25p,fast-read")) > > nor->flash_read = SPI_NOR_FAST; > > Did you have some REAL cases using SPI NOR that only supports upto fast-read with Quad SPI driver? Neither fast-read or normal-read, which is actually more general, supported in the driver, just because I didn't see any REAL cases till now. > > I didn't run against the patch, although IMO it's not that necessary. But I don't think QuadSPI driver need to check the m25p,fast-read property again since spi-nor layer has already done that. Adding the property in flash node should work in the same way. > > > > > Thanks > > Yunhui > > > > -----Original Message----- > > From: Han Xu [mailto:xhnjupt@gmail.com] > > Sent: Thursday, February 18, 2016 2:08 AM > > To: Yunhui Cui > > Cc: dwmw2@infradead.org; computersforpeace@gmail.com; > > han.xu@freescale.com; linux-mtd@lists.infradead.org; > > linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; > > Yao Yuan > > Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode > > support > > > > On Mon, Feb 01, 2016 at 07:30:07PM +0800, Yunhui Cui wrote: > > > The qspi driver add generic fast-read mode for different flash > > > venders. There are some different board flash work on different > > > mode, such fast-read, quad-mode. > > > So we have to modify the third entrace parameter of spi_nor_scan(). > > > > > > Signed-off-by: Yunhui Cui <B56489@freescale.com> > > > --- > > > drivers/mtd/spi-nor/fsl-quadspi.c | 27 +++++++++++++++++++++------ > > > 1 file changed, 21 insertions(+), 6 deletions(-) > > > > > > diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c > > > b/drivers/mtd/spi-nor/fsl-quadspi.c > > > index 9861290..0a31cb1 100644 > > > --- a/drivers/mtd/spi-nor/fsl-quadspi.c > > > +++ b/drivers/mtd/spi-nor/fsl-quadspi.c > > > @@ -389,11 +389,21 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) > > > /* Read */ > > > lut_base = SEQID_READ * 4; > > > > > > - qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen), > > > - base + QUADSPI_LUT(lut_base)); > > > - qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > > - LUT1(FSL_READ, PAD4, rxfifo), > > > - base + QUADSPI_LUT(lut_base + 1)); > > > + if (nor->flash_read == SPI_NOR_FAST) { > > > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > > > + LUT1(ADDR, PAD1, addrlen), > > > + base + QUADSPI_LUT(lut_base)); > > > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > > + LUT1(FSL_READ, PAD1, rxfifo), > > > + base + QUADSPI_LUT(lut_base + 1)); > > > + } else if (nor->flash_read == SPI_NOR_QUAD) { > > > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > > > + LUT1(ADDR, PAD1, addrlen), > > > + base + QUADSPI_LUT(lut_base)); > > > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > > + LUT1(FSL_READ, PAD4, rxfifo), > > > + base + QUADSPI_LUT(lut_base + 1)); > > > + } > > > > > > /* Write enable */ > > > lut_base = SEQID_WREN * 4; > > > @@ -468,6 +478,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi > > > *q, > > > u8 cmd) { > > > switch (cmd) { > > > case SPINOR_OP_READ_1_1_4: > > > + case SPINOR_OP_READ_FAST: > > > return SEQID_READ; > > > case SPINOR_OP_WREN: > > > return SEQID_WREN; > > > @@ -963,6 +974,7 @@ static int fsl_qspi_probe(struct platform_device *pdev) > > > struct spi_nor *nor; > > > struct mtd_info *mtd; > > > int ret, i = 0; > > > + enum read_mode mode = SPI_NOR_QUAD; > > > > > > q = devm_kzalloc(dev, sizeof(*q), GFP_KERNEL); > > > if (!q) > > > @@ -1064,7 +1076,10 @@ static int fsl_qspi_probe(struct platform_device *pdev) > > > /* set the chip address for READID */ > > > fsl_qspi_set_base_addr(q, nor); > > > > > > - ret = spi_nor_scan(nor, NULL, SPI_NOR_QUAD); > > > + ret = of_property_read_bool(np, "m25p,fast-read"); > > > + mode = (ret) ? SPI_NOR_FAST : SPI_NOR_QUAD; > > > + > > > + ret = spi_nor_scan(nor, NULL, mode); > > > if (ret) > > > goto mutex_failed; > > > > > I understand you want to provide a more generic read mode, but this is a quad spi driver, I prefer to provide the options, either quad read/quad IO read, or just normal read. > > > -- > > > 2.1.0.27.g96db324 > > > > > > > > > ______________________________________________________ > > > Linux MTD discussion mailing list > > > http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support @ 2016-02-29 20:17 ` Han Xu 0 siblings, 0 replies; 25+ messages in thread From: Han Xu @ 2016-02-29 20:17 UTC (permalink / raw) To: linux-arm-kernel On Mon, Feb 29, 2016 at 03:43:36AM +0000, Yunhui Cui wrote: > Hi Han, > > But I don't think QuadSPI driver need to check the m25p,fast-read property again since spi-nor layer has already done that. Adding the property in flash node should work in the same way. > > [Yunhui]: There are three modes in fsl-quadspi driver , fast mode, quad mode, ddr quad read. The last parameter mode of spi_nor_scan() I have to specify . Otherwise, flash is still set to quad mode. If the Nor chip behaves as you said only support fasst-read, the (info->flags & SPI_NOR_QUAD_READ) can only take false path. > spi-nor.c: > > 1419 if (mode == SPI_NOR_QUAD && info->flags & SPI_NOR_QUAD_READ) { > 1420 ret = set_quad_mode(nor, info); > 1421 if (ret) { > 1422 dev_err(dev, "quad mode not supported\n"); > 1423 return ret; > 1424 } > 1425 nor->flash_read = SPI_NOR_QUAD; > 1426 } else if (mode == SPI_NOR_DUAL && info->flags & SPI_NOR_DUAL_READ) { > 1427 nor->flash_read = SPI_NOR_DUAL; > 1428 } > > > Thanks > Yunhui > -----Original Message----- > From: Han Xu [mailto:xhnjupt at gmail.com] > Sent: Saturday, February 27, 2016 12:32 AM > To: Yunhui Cui > Cc: Yunhui Cui; dwmw2 at infradead.org; computersforpeace at gmail.com; han.xu at freescale.com; linux-mtd at lists.infradead.org; linux-kernel at vger.kernel.org; linux-arm-kernel at lists.infradead.org; Yao Yuan > Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support > > On Thu, Feb 25, 2016 at 08:07:22AM +0000, Yunhui Cui wrote: > > Hi Han, > > > > I have provided the options " m25p,fast-read ", because there are probable some flashes can't support quad mode. > > So we should support fast-read mode in our driver. Moreover, There is a option to select fast-read mode in spi_nor.c : > > /* If we were instantiated by DT, use it */ > > if (of_property_read_bool(np, "m25p,fast-read")) > > nor->flash_read = SPI_NOR_FAST; > > Did you have some REAL cases using SPI NOR that only supports upto fast-read with Quad SPI driver? Neither fast-read or normal-read, which is actually more general, supported in the driver, just because I didn't see any REAL cases till now. > > I didn't run against the patch, although IMO it's not that necessary. But I don't think QuadSPI driver need to check the m25p,fast-read property again since spi-nor layer has already done that. Adding the property in flash node should work in the same way. > > > > > Thanks > > Yunhui > > > > -----Original Message----- > > From: Han Xu [mailto:xhnjupt at gmail.com] > > Sent: Thursday, February 18, 2016 2:08 AM > > To: Yunhui Cui > > Cc: dwmw2 at infradead.org; computersforpeace at gmail.com; > > han.xu at freescale.com; linux-mtd at lists.infradead.org; > > linux-kernel at vger.kernel.org; linux-arm-kernel at lists.infradead.org; > > Yao Yuan > > Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode > > support > > > > On Mon, Feb 01, 2016 at 07:30:07PM +0800, Yunhui Cui wrote: > > > The qspi driver add generic fast-read mode for different flash > > > venders. There are some different board flash work on different > > > mode, such fast-read, quad-mode. > > > So we have to modify the third entrace parameter of spi_nor_scan(). > > > > > > Signed-off-by: Yunhui Cui <B56489@freescale.com> > > > --- > > > drivers/mtd/spi-nor/fsl-quadspi.c | 27 +++++++++++++++++++++------ > > > 1 file changed, 21 insertions(+), 6 deletions(-) > > > > > > diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c > > > b/drivers/mtd/spi-nor/fsl-quadspi.c > > > index 9861290..0a31cb1 100644 > > > --- a/drivers/mtd/spi-nor/fsl-quadspi.c > > > +++ b/drivers/mtd/spi-nor/fsl-quadspi.c > > > @@ -389,11 +389,21 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) > > > /* Read */ > > > lut_base = SEQID_READ * 4; > > > > > > - qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen), > > > - base + QUADSPI_LUT(lut_base)); > > > - qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > > - LUT1(FSL_READ, PAD4, rxfifo), > > > - base + QUADSPI_LUT(lut_base + 1)); > > > + if (nor->flash_read == SPI_NOR_FAST) { > > > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > > > + LUT1(ADDR, PAD1, addrlen), > > > + base + QUADSPI_LUT(lut_base)); > > > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > > + LUT1(FSL_READ, PAD1, rxfifo), > > > + base + QUADSPI_LUT(lut_base + 1)); > > > + } else if (nor->flash_read == SPI_NOR_QUAD) { > > > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > > > + LUT1(ADDR, PAD1, addrlen), > > > + base + QUADSPI_LUT(lut_base)); > > > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > > + LUT1(FSL_READ, PAD4, rxfifo), > > > + base + QUADSPI_LUT(lut_base + 1)); > > > + } > > > > > > /* Write enable */ > > > lut_base = SEQID_WREN * 4; > > > @@ -468,6 +478,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi > > > *q, > > > u8 cmd) { > > > switch (cmd) { > > > case SPINOR_OP_READ_1_1_4: > > > + case SPINOR_OP_READ_FAST: > > > return SEQID_READ; > > > case SPINOR_OP_WREN: > > > return SEQID_WREN; > > > @@ -963,6 +974,7 @@ static int fsl_qspi_probe(struct platform_device *pdev) > > > struct spi_nor *nor; > > > struct mtd_info *mtd; > > > int ret, i = 0; > > > + enum read_mode mode = SPI_NOR_QUAD; > > > > > > q = devm_kzalloc(dev, sizeof(*q), GFP_KERNEL); > > > if (!q) > > > @@ -1064,7 +1076,10 @@ static int fsl_qspi_probe(struct platform_device *pdev) > > > /* set the chip address for READID */ > > > fsl_qspi_set_base_addr(q, nor); > > > > > > - ret = spi_nor_scan(nor, NULL, SPI_NOR_QUAD); > > > + ret = of_property_read_bool(np, "m25p,fast-read"); > > > + mode = (ret) ? SPI_NOR_FAST : SPI_NOR_QUAD; > > > + > > > + ret = spi_nor_scan(nor, NULL, mode); > > > if (ret) > > > goto mutex_failed; > > > > > I understand you want to provide a more generic read mode, but this is a quad spi driver, I prefer to provide the options, either quad read/quad IO read, or just normal read. > > > -- > > > 2.1.0.27.g96db324 > > > > > > > > > ______________________________________________________ > > > Linux MTD discussion mailing list > > > http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support @ 2016-02-29 20:17 ` Han Xu 0 siblings, 0 replies; 25+ messages in thread From: Han Xu @ 2016-02-29 20:17 UTC (permalink / raw) To: Yunhui Cui Cc: Yunhui Cui, dwmw2, computersforpeace, han.xu, linux-mtd, linux-kernel, linux-arm-kernel, Yao Yuan On Mon, Feb 29, 2016 at 03:43:36AM +0000, Yunhui Cui wrote: > Hi Han, > > But I don't think QuadSPI driver need to check the m25p,fast-read property again since spi-nor layer has already done that. Adding the property in flash node should work in the same way. > > [Yunhui]: There are three modes in fsl-quadspi driver , fast mode, quad mode, ddr quad read. The last parameter mode of spi_nor_scan() I have to specify . Otherwise, flash is still set to quad mode. If the Nor chip behaves as you said only support fasst-read, the (info->flags & SPI_NOR_QUAD_READ) can only take false path. > spi-nor.c: > > 1419 if (mode == SPI_NOR_QUAD && info->flags & SPI_NOR_QUAD_READ) { > 1420 ret = set_quad_mode(nor, info); > 1421 if (ret) { > 1422 dev_err(dev, "quad mode not supported\n"); > 1423 return ret; > 1424 } > 1425 nor->flash_read = SPI_NOR_QUAD; > 1426 } else if (mode == SPI_NOR_DUAL && info->flags & SPI_NOR_DUAL_READ) { > 1427 nor->flash_read = SPI_NOR_DUAL; > 1428 } > > > Thanks > Yunhui > -----Original Message----- > From: Han Xu [mailto:xhnjupt@gmail.com] > Sent: Saturday, February 27, 2016 12:32 AM > To: Yunhui Cui > Cc: Yunhui Cui; dwmw2@infradead.org; computersforpeace@gmail.com; han.xu@freescale.com; linux-mtd@lists.infradead.org; linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Yao Yuan > Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support > > On Thu, Feb 25, 2016 at 08:07:22AM +0000, Yunhui Cui wrote: > > Hi Han, > > > > I have provided the options " m25p,fast-read ", because there are probable some flashes can't support quad mode. > > So we should support fast-read mode in our driver. Moreover, There is a option to select fast-read mode in spi_nor.c : > > /* If we were instantiated by DT, use it */ > > if (of_property_read_bool(np, "m25p,fast-read")) > > nor->flash_read = SPI_NOR_FAST; > > Did you have some REAL cases using SPI NOR that only supports upto fast-read with Quad SPI driver? Neither fast-read or normal-read, which is actually more general, supported in the driver, just because I didn't see any REAL cases till now. > > I didn't run against the patch, although IMO it's not that necessary. But I don't think QuadSPI driver need to check the m25p,fast-read property again since spi-nor layer has already done that. Adding the property in flash node should work in the same way. > > > > > Thanks > > Yunhui > > > > -----Original Message----- > > From: Han Xu [mailto:xhnjupt@gmail.com] > > Sent: Thursday, February 18, 2016 2:08 AM > > To: Yunhui Cui > > Cc: dwmw2@infradead.org; computersforpeace@gmail.com; > > han.xu@freescale.com; linux-mtd@lists.infradead.org; > > linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; > > Yao Yuan > > Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode > > support > > > > On Mon, Feb 01, 2016 at 07:30:07PM +0800, Yunhui Cui wrote: > > > The qspi driver add generic fast-read mode for different flash > > > venders. There are some different board flash work on different > > > mode, such fast-read, quad-mode. > > > So we have to modify the third entrace parameter of spi_nor_scan(). > > > > > > Signed-off-by: Yunhui Cui <B56489@freescale.com> > > > --- > > > drivers/mtd/spi-nor/fsl-quadspi.c | 27 +++++++++++++++++++++------ > > > 1 file changed, 21 insertions(+), 6 deletions(-) > > > > > > diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c > > > b/drivers/mtd/spi-nor/fsl-quadspi.c > > > index 9861290..0a31cb1 100644 > > > --- a/drivers/mtd/spi-nor/fsl-quadspi.c > > > +++ b/drivers/mtd/spi-nor/fsl-quadspi.c > > > @@ -389,11 +389,21 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) > > > /* Read */ > > > lut_base = SEQID_READ * 4; > > > > > > - qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen), > > > - base + QUADSPI_LUT(lut_base)); > > > - qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > > - LUT1(FSL_READ, PAD4, rxfifo), > > > - base + QUADSPI_LUT(lut_base + 1)); > > > + if (nor->flash_read == SPI_NOR_FAST) { > > > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > > > + LUT1(ADDR, PAD1, addrlen), > > > + base + QUADSPI_LUT(lut_base)); > > > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > > + LUT1(FSL_READ, PAD1, rxfifo), > > > + base + QUADSPI_LUT(lut_base + 1)); > > > + } else if (nor->flash_read == SPI_NOR_QUAD) { > > > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > > > + LUT1(ADDR, PAD1, addrlen), > > > + base + QUADSPI_LUT(lut_base)); > > > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > > + LUT1(FSL_READ, PAD4, rxfifo), > > > + base + QUADSPI_LUT(lut_base + 1)); > > > + } > > > > > > /* Write enable */ > > > lut_base = SEQID_WREN * 4; > > > @@ -468,6 +478,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi > > > *q, > > > u8 cmd) { > > > switch (cmd) { > > > case SPINOR_OP_READ_1_1_4: > > > + case SPINOR_OP_READ_FAST: > > > return SEQID_READ; > > > case SPINOR_OP_WREN: > > > return SEQID_WREN; > > > @@ -963,6 +974,7 @@ static int fsl_qspi_probe(struct platform_device *pdev) > > > struct spi_nor *nor; > > > struct mtd_info *mtd; > > > int ret, i = 0; > > > + enum read_mode mode = SPI_NOR_QUAD; > > > > > > q = devm_kzalloc(dev, sizeof(*q), GFP_KERNEL); > > > if (!q) > > > @@ -1064,7 +1076,10 @@ static int fsl_qspi_probe(struct platform_device *pdev) > > > /* set the chip address for READID */ > > > fsl_qspi_set_base_addr(q, nor); > > > > > > - ret = spi_nor_scan(nor, NULL, SPI_NOR_QUAD); > > > + ret = of_property_read_bool(np, "m25p,fast-read"); > > > + mode = (ret) ? SPI_NOR_FAST : SPI_NOR_QUAD; > > > + > > > + ret = spi_nor_scan(nor, NULL, mode); > > > if (ret) > > > goto mutex_failed; > > > > > I understand you want to provide a more generic read mode, but this is a quad spi driver, I prefer to provide the options, either quad read/quad IO read, or just normal read. > > > -- > > > 2.1.0.27.g96db324 > > > > > > > > > ______________________________________________________ > > > Linux MTD discussion mailing list > > > http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
* RE: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support 2016-02-29 20:17 ` Han Xu (?) @ 2016-03-02 1:50 ` Yunhui Cui -1 siblings, 0 replies; 25+ messages in thread From: Yunhui Cui @ 2016-03-02 1:50 UTC (permalink / raw) To: Han Xu Cc: Yunhui Cui, dwmw2, computersforpeace, han.xu, linux-mtd, linux-kernel, linux-arm-kernel, Yao Yuan Hi Han, Thanks for your suggestions about this patch. I will update it in driver next version patch set. Do you have some other comments for the patch set except for removing "+ ret = of_property_read_bool(np, "m25p,fast-read");" in driver ? Thanks Yunhui -----Original Message----- From: Han Xu [mailto:xhnjupt@gmail.com] Sent: Tuesday, March 01, 2016 4:17 AM To: Yunhui Cui Cc: Yunhui Cui; dwmw2@infradead.org; computersforpeace@gmail.com; han.xu@freescale.com; linux-mtd@lists.infradead.org; linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Yao Yuan Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support On Mon, Feb 29, 2016 at 03:43:36AM +0000, Yunhui Cui wrote: > Hi Han, > > But I don't think QuadSPI driver need to check the m25p,fast-read property again since spi-nor layer has already done that. Adding the property in flash node should work in the same way. > > [Yunhui]: There are three modes in fsl-quadspi driver , fast mode, quad mode, ddr quad read. The last parameter mode of spi_nor_scan() I have to specify . Otherwise, flash is still set to quad mode. If the Nor chip behaves as you said only support fasst-read, the (info->flags & SPI_NOR_QUAD_READ) can only take false path. > spi-nor.c: > > 1419 if (mode == SPI_NOR_QUAD && info->flags & SPI_NOR_QUAD_READ) { > 1420 ret = set_quad_mode(nor, info); > 1421 if (ret) { > 1422 dev_err(dev, "quad mode not supported\n"); > 1423 return ret; > 1424 } > 1425 nor->flash_read = SPI_NOR_QUAD; > 1426 } else if (mode == SPI_NOR_DUAL && info->flags & SPI_NOR_DUAL_READ) { > 1427 nor->flash_read = SPI_NOR_DUAL; > 1428 } > > > Thanks > Yunhui > -----Original Message----- > From: Han Xu [mailto:xhnjupt@gmail.com] > Sent: Saturday, February 27, 2016 12:32 AM > To: Yunhui Cui > Cc: Yunhui Cui; dwmw2@infradead.org; computersforpeace@gmail.com; > han.xu@freescale.com; linux-mtd@lists.infradead.org; > linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; > Yao Yuan > Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode > support > > On Thu, Feb 25, 2016 at 08:07:22AM +0000, Yunhui Cui wrote: > > Hi Han, > > > > I have provided the options " m25p,fast-read ", because there are probable some flashes can't support quad mode. > > So we should support fast-read mode in our driver. Moreover, There is a option to select fast-read mode in spi_nor.c : > > /* If we were instantiated by DT, use it */ > > if (of_property_read_bool(np, "m25p,fast-read")) > > nor->flash_read = SPI_NOR_FAST; > > Did you have some REAL cases using SPI NOR that only supports upto fast-read with Quad SPI driver? Neither fast-read or normal-read, which is actually more general, supported in the driver, just because I didn't see any REAL cases till now. > > I didn't run against the patch, although IMO it's not that necessary. But I don't think QuadSPI driver need to check the m25p,fast-read property again since spi-nor layer has already done that. Adding the property in flash node should work in the same way. > > > > > Thanks > > Yunhui > > > > -----Original Message----- > > From: Han Xu [mailto:xhnjupt@gmail.com] > > Sent: Thursday, February 18, 2016 2:08 AM > > To: Yunhui Cui > > Cc: dwmw2@infradead.org; computersforpeace@gmail.com; > > han.xu@freescale.com; linux-mtd@lists.infradead.org; > > linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; > > Yao Yuan > > Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read > > mode support > > > > On Mon, Feb 01, 2016 at 07:30:07PM +0800, Yunhui Cui wrote: > > > The qspi driver add generic fast-read mode for different flash > > > venders. There are some different board flash work on different > > > mode, such fast-read, quad-mode. > > > So we have to modify the third entrace parameter of spi_nor_scan(). > > > > > > Signed-off-by: Yunhui Cui <B56489@freescale.com> > > > --- > > > drivers/mtd/spi-nor/fsl-quadspi.c | 27 > > > +++++++++++++++++++++------ > > > 1 file changed, 21 insertions(+), 6 deletions(-) > > > > > > diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c > > > b/drivers/mtd/spi-nor/fsl-quadspi.c > > > index 9861290..0a31cb1 100644 > > > --- a/drivers/mtd/spi-nor/fsl-quadspi.c > > > +++ b/drivers/mtd/spi-nor/fsl-quadspi.c > > > @@ -389,11 +389,21 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) > > > /* Read */ > > > lut_base = SEQID_READ * 4; > > > > > > - qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen), > > > - base + QUADSPI_LUT(lut_base)); > > > - qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > > - LUT1(FSL_READ, PAD4, rxfifo), > > > - base + QUADSPI_LUT(lut_base + 1)); > > > + if (nor->flash_read == SPI_NOR_FAST) { > > > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > > > + LUT1(ADDR, PAD1, addrlen), > > > + base + QUADSPI_LUT(lut_base)); > > > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > > + LUT1(FSL_READ, PAD1, rxfifo), > > > + base + QUADSPI_LUT(lut_base + 1)); > > > + } else if (nor->flash_read == SPI_NOR_QUAD) { > > > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > > > + LUT1(ADDR, PAD1, addrlen), > > > + base + QUADSPI_LUT(lut_base)); > > > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > > + LUT1(FSL_READ, PAD4, rxfifo), > > > + base + QUADSPI_LUT(lut_base + 1)); > > > + } > > > > > > /* Write enable */ > > > lut_base = SEQID_WREN * 4; > > > @@ -468,6 +478,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi > > > *q, > > > u8 cmd) { > > > switch (cmd) { > > > case SPINOR_OP_READ_1_1_4: > > > + case SPINOR_OP_READ_FAST: > > > return SEQID_READ; > > > case SPINOR_OP_WREN: > > > return SEQID_WREN; > > > @@ -963,6 +974,7 @@ static int fsl_qspi_probe(struct platform_device *pdev) > > > struct spi_nor *nor; > > > struct mtd_info *mtd; > > > int ret, i = 0; > > > + enum read_mode mode = SPI_NOR_QUAD; > > > > > > q = devm_kzalloc(dev, sizeof(*q), GFP_KERNEL); > > > if (!q) > > > @@ -1064,7 +1076,10 @@ static int fsl_qspi_probe(struct platform_device *pdev) > > > /* set the chip address for READID */ > > > fsl_qspi_set_base_addr(q, nor); > > > > > > - ret = spi_nor_scan(nor, NULL, SPI_NOR_QUAD); > > > + ret = of_property_read_bool(np, "m25p,fast-read"); > > > + mode = (ret) ? SPI_NOR_FAST : SPI_NOR_QUAD; > > > + > > > + ret = spi_nor_scan(nor, NULL, mode); > > > if (ret) > > > goto mutex_failed; > > > > > I understand you want to provide a more generic read mode, but this is a quad spi driver, I prefer to provide the options, either quad read/quad IO read, or just normal read. > > > -- > > > 2.1.0.27.g96db324 > > > > > > > > > ______________________________________________________ > > > Linux MTD discussion mailing list > > > http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support @ 2016-03-02 1:50 ` Yunhui Cui 0 siblings, 0 replies; 25+ messages in thread From: Yunhui Cui @ 2016-03-02 1:50 UTC (permalink / raw) To: linux-arm-kernel Hi Han, Thanks for your suggestions about this patch. I will update it in driver next version patch set. Do you have some other comments for the patch set except for removing "+ ret = of_property_read_bool(np, "m25p,fast-read");" in driver ? Thanks Yunhui -----Original Message----- From: Han Xu [mailto:xhnjupt at gmail.com] Sent: Tuesday, March 01, 2016 4:17 AM To: Yunhui Cui Cc: Yunhui Cui; dwmw2 at infradead.org; computersforpeace at gmail.com; han.xu at freescale.com; linux-mtd at lists.infradead.org; linux-kernel at vger.kernel.org; linux-arm-kernel at lists.infradead.org; Yao Yuan Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support On Mon, Feb 29, 2016 at 03:43:36AM +0000, Yunhui Cui wrote: > Hi Han, > > But I don't think QuadSPI driver need to check the m25p,fast-read property again since spi-nor layer has already done that. Adding the property in flash node should work in the same way. > > [Yunhui]: There are three modes in fsl-quadspi driver , fast mode, quad mode, ddr quad read. The last parameter mode of spi_nor_scan() I have to specify . Otherwise, flash is still set to quad mode. If the Nor chip behaves as you said only support fasst-read, the (info->flags & SPI_NOR_QUAD_READ) can only take false path. > spi-nor.c: > > 1419 if (mode == SPI_NOR_QUAD && info->flags & SPI_NOR_QUAD_READ) { > 1420 ret = set_quad_mode(nor, info); > 1421 if (ret) { > 1422 dev_err(dev, "quad mode not supported\n"); > 1423 return ret; > 1424 } > 1425 nor->flash_read = SPI_NOR_QUAD; > 1426 } else if (mode == SPI_NOR_DUAL && info->flags & SPI_NOR_DUAL_READ) { > 1427 nor->flash_read = SPI_NOR_DUAL; > 1428 } > > > Thanks > Yunhui > -----Original Message----- > From: Han Xu [mailto:xhnjupt at gmail.com] > Sent: Saturday, February 27, 2016 12:32 AM > To: Yunhui Cui > Cc: Yunhui Cui; dwmw2 at infradead.org; computersforpeace at gmail.com; > han.xu at freescale.com; linux-mtd at lists.infradead.org; > linux-kernel at vger.kernel.org; linux-arm-kernel at lists.infradead.org; > Yao Yuan > Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode > support > > On Thu, Feb 25, 2016 at 08:07:22AM +0000, Yunhui Cui wrote: > > Hi Han, > > > > I have provided the options " m25p,fast-read ", because there are probable some flashes can't support quad mode. > > So we should support fast-read mode in our driver. Moreover, There is a option to select fast-read mode in spi_nor.c : > > /* If we were instantiated by DT, use it */ > > if (of_property_read_bool(np, "m25p,fast-read")) > > nor->flash_read = SPI_NOR_FAST; > > Did you have some REAL cases using SPI NOR that only supports upto fast-read with Quad SPI driver? Neither fast-read or normal-read, which is actually more general, supported in the driver, just because I didn't see any REAL cases till now. > > I didn't run against the patch, although IMO it's not that necessary. But I don't think QuadSPI driver need to check the m25p,fast-read property again since spi-nor layer has already done that. Adding the property in flash node should work in the same way. > > > > > Thanks > > Yunhui > > > > -----Original Message----- > > From: Han Xu [mailto:xhnjupt at gmail.com] > > Sent: Thursday, February 18, 2016 2:08 AM > > To: Yunhui Cui > > Cc: dwmw2 at infradead.org; computersforpeace at gmail.com; > > han.xu at freescale.com; linux-mtd at lists.infradead.org; > > linux-kernel at vger.kernel.org; linux-arm-kernel at lists.infradead.org; > > Yao Yuan > > Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read > > mode support > > > > On Mon, Feb 01, 2016 at 07:30:07PM +0800, Yunhui Cui wrote: > > > The qspi driver add generic fast-read mode for different flash > > > venders. There are some different board flash work on different > > > mode, such fast-read, quad-mode. > > > So we have to modify the third entrace parameter of spi_nor_scan(). > > > > > > Signed-off-by: Yunhui Cui <B56489@freescale.com> > > > --- > > > drivers/mtd/spi-nor/fsl-quadspi.c | 27 > > > +++++++++++++++++++++------ > > > 1 file changed, 21 insertions(+), 6 deletions(-) > > > > > > diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c > > > b/drivers/mtd/spi-nor/fsl-quadspi.c > > > index 9861290..0a31cb1 100644 > > > --- a/drivers/mtd/spi-nor/fsl-quadspi.c > > > +++ b/drivers/mtd/spi-nor/fsl-quadspi.c > > > @@ -389,11 +389,21 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) > > > /* Read */ > > > lut_base = SEQID_READ * 4; > > > > > > - qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen), > > > - base + QUADSPI_LUT(lut_base)); > > > - qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > > - LUT1(FSL_READ, PAD4, rxfifo), > > > - base + QUADSPI_LUT(lut_base + 1)); > > > + if (nor->flash_read == SPI_NOR_FAST) { > > > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > > > + LUT1(ADDR, PAD1, addrlen), > > > + base + QUADSPI_LUT(lut_base)); > > > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > > + LUT1(FSL_READ, PAD1, rxfifo), > > > + base + QUADSPI_LUT(lut_base + 1)); > > > + } else if (nor->flash_read == SPI_NOR_QUAD) { > > > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > > > + LUT1(ADDR, PAD1, addrlen), > > > + base + QUADSPI_LUT(lut_base)); > > > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > > + LUT1(FSL_READ, PAD4, rxfifo), > > > + base + QUADSPI_LUT(lut_base + 1)); > > > + } > > > > > > /* Write enable */ > > > lut_base = SEQID_WREN * 4; > > > @@ -468,6 +478,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi > > > *q, > > > u8 cmd) { > > > switch (cmd) { > > > case SPINOR_OP_READ_1_1_4: > > > + case SPINOR_OP_READ_FAST: > > > return SEQID_READ; > > > case SPINOR_OP_WREN: > > > return SEQID_WREN; > > > @@ -963,6 +974,7 @@ static int fsl_qspi_probe(struct platform_device *pdev) > > > struct spi_nor *nor; > > > struct mtd_info *mtd; > > > int ret, i = 0; > > > + enum read_mode mode = SPI_NOR_QUAD; > > > > > > q = devm_kzalloc(dev, sizeof(*q), GFP_KERNEL); > > > if (!q) > > > @@ -1064,7 +1076,10 @@ static int fsl_qspi_probe(struct platform_device *pdev) > > > /* set the chip address for READID */ > > > fsl_qspi_set_base_addr(q, nor); > > > > > > - ret = spi_nor_scan(nor, NULL, SPI_NOR_QUAD); > > > + ret = of_property_read_bool(np, "m25p,fast-read"); > > > + mode = (ret) ? SPI_NOR_FAST : SPI_NOR_QUAD; > > > + > > > + ret = spi_nor_scan(nor, NULL, mode); > > > if (ret) > > > goto mutex_failed; > > > > > I understand you want to provide a more generic read mode, but this is a quad spi driver, I prefer to provide the options, either quad read/quad IO read, or just normal read. > > > -- > > > 2.1.0.27.g96db324 > > > > > > > > > ______________________________________________________ > > > Linux MTD discussion mailing list > > > http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
* RE: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support @ 2016-03-02 1:50 ` Yunhui Cui 0 siblings, 0 replies; 25+ messages in thread From: Yunhui Cui @ 2016-03-02 1:50 UTC (permalink / raw) To: Han Xu Cc: Yunhui Cui, dwmw2, computersforpeace, han.xu, linux-mtd, linux-kernel, linux-arm-kernel, Yao Yuan Hi Han, Thanks for your suggestions about this patch. I will update it in driver next version patch set. Do you have some other comments for the patch set except for removing "+ ret = of_property_read_bool(np, "m25p,fast-read");" in driver ? Thanks Yunhui -----Original Message----- From: Han Xu [mailto:xhnjupt@gmail.com] Sent: Tuesday, March 01, 2016 4:17 AM To: Yunhui Cui Cc: Yunhui Cui; dwmw2@infradead.org; computersforpeace@gmail.com; han.xu@freescale.com; linux-mtd@lists.infradead.org; linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Yao Yuan Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support On Mon, Feb 29, 2016 at 03:43:36AM +0000, Yunhui Cui wrote: > Hi Han, > > But I don't think QuadSPI driver need to check the m25p,fast-read property again since spi-nor layer has already done that. Adding the property in flash node should work in the same way. > > [Yunhui]: There are three modes in fsl-quadspi driver , fast mode, quad mode, ddr quad read. The last parameter mode of spi_nor_scan() I have to specify . Otherwise, flash is still set to quad mode. If the Nor chip behaves as you said only support fasst-read, the (info->flags & SPI_NOR_QUAD_READ) can only take false path. > spi-nor.c: > > 1419 if (mode == SPI_NOR_QUAD && info->flags & SPI_NOR_QUAD_READ) { > 1420 ret = set_quad_mode(nor, info); > 1421 if (ret) { > 1422 dev_err(dev, "quad mode not supported\n"); > 1423 return ret; > 1424 } > 1425 nor->flash_read = SPI_NOR_QUAD; > 1426 } else if (mode == SPI_NOR_DUAL && info->flags & SPI_NOR_DUAL_READ) { > 1427 nor->flash_read = SPI_NOR_DUAL; > 1428 } > > > Thanks > Yunhui > -----Original Message----- > From: Han Xu [mailto:xhnjupt@gmail.com] > Sent: Saturday, February 27, 2016 12:32 AM > To: Yunhui Cui > Cc: Yunhui Cui; dwmw2@infradead.org; computersforpeace@gmail.com; > han.xu@freescale.com; linux-mtd@lists.infradead.org; > linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; > Yao Yuan > Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode > support > > On Thu, Feb 25, 2016 at 08:07:22AM +0000, Yunhui Cui wrote: > > Hi Han, > > > > I have provided the options " m25p,fast-read ", because there are probable some flashes can't support quad mode. > > So we should support fast-read mode in our driver. Moreover, There is a option to select fast-read mode in spi_nor.c : > > /* If we were instantiated by DT, use it */ > > if (of_property_read_bool(np, "m25p,fast-read")) > > nor->flash_read = SPI_NOR_FAST; > > Did you have some REAL cases using SPI NOR that only supports upto fast-read with Quad SPI driver? Neither fast-read or normal-read, which is actually more general, supported in the driver, just because I didn't see any REAL cases till now. > > I didn't run against the patch, although IMO it's not that necessary. But I don't think QuadSPI driver need to check the m25p,fast-read property again since spi-nor layer has already done that. Adding the property in flash node should work in the same way. > > > > > Thanks > > Yunhui > > > > -----Original Message----- > > From: Han Xu [mailto:xhnjupt@gmail.com] > > Sent: Thursday, February 18, 2016 2:08 AM > > To: Yunhui Cui > > Cc: dwmw2@infradead.org; computersforpeace@gmail.com; > > han.xu@freescale.com; linux-mtd@lists.infradead.org; > > linux-kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; > > Yao Yuan > > Subject: Re: [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read > > mode support > > > > On Mon, Feb 01, 2016 at 07:30:07PM +0800, Yunhui Cui wrote: > > > The qspi driver add generic fast-read mode for different flash > > > venders. There are some different board flash work on different > > > mode, such fast-read, quad-mode. > > > So we have to modify the third entrace parameter of spi_nor_scan(). > > > > > > Signed-off-by: Yunhui Cui <B56489@freescale.com> > > > --- > > > drivers/mtd/spi-nor/fsl-quadspi.c | 27 > > > +++++++++++++++++++++------ > > > 1 file changed, 21 insertions(+), 6 deletions(-) > > > > > > diff --git a/drivers/mtd/spi-nor/fsl-quadspi.c > > > b/drivers/mtd/spi-nor/fsl-quadspi.c > > > index 9861290..0a31cb1 100644 > > > --- a/drivers/mtd/spi-nor/fsl-quadspi.c > > > +++ b/drivers/mtd/spi-nor/fsl-quadspi.c > > > @@ -389,11 +389,21 @@ static void fsl_qspi_init_lut(struct fsl_qspi *q) > > > /* Read */ > > > lut_base = SEQID_READ * 4; > > > > > > - qspi_writel(q, LUT0(CMD, PAD1, read_op) | LUT1(ADDR, PAD1, addrlen), > > > - base + QUADSPI_LUT(lut_base)); > > > - qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > > - LUT1(FSL_READ, PAD4, rxfifo), > > > - base + QUADSPI_LUT(lut_base + 1)); > > > + if (nor->flash_read == SPI_NOR_FAST) { > > > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > > > + LUT1(ADDR, PAD1, addrlen), > > > + base + QUADSPI_LUT(lut_base)); > > > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > > + LUT1(FSL_READ, PAD1, rxfifo), > > > + base + QUADSPI_LUT(lut_base + 1)); > > > + } else if (nor->flash_read == SPI_NOR_QUAD) { > > > + qspi_writel(q, LUT0(CMD, PAD1, read_op) | > > > + LUT1(ADDR, PAD1, addrlen), > > > + base + QUADSPI_LUT(lut_base)); > > > + qspi_writel(q, LUT0(DUMMY, PAD1, read_dm) | > > > + LUT1(FSL_READ, PAD4, rxfifo), > > > + base + QUADSPI_LUT(lut_base + 1)); > > > + } > > > > > > /* Write enable */ > > > lut_base = SEQID_WREN * 4; > > > @@ -468,6 +478,7 @@ static int fsl_qspi_get_seqid(struct fsl_qspi > > > *q, > > > u8 cmd) { > > > switch (cmd) { > > > case SPINOR_OP_READ_1_1_4: > > > + case SPINOR_OP_READ_FAST: > > > return SEQID_READ; > > > case SPINOR_OP_WREN: > > > return SEQID_WREN; > > > @@ -963,6 +974,7 @@ static int fsl_qspi_probe(struct platform_device *pdev) > > > struct spi_nor *nor; > > > struct mtd_info *mtd; > > > int ret, i = 0; > > > + enum read_mode mode = SPI_NOR_QUAD; > > > > > > q = devm_kzalloc(dev, sizeof(*q), GFP_KERNEL); > > > if (!q) > > > @@ -1064,7 +1076,10 @@ static int fsl_qspi_probe(struct platform_device *pdev) > > > /* set the chip address for READID */ > > > fsl_qspi_set_base_addr(q, nor); > > > > > > - ret = spi_nor_scan(nor, NULL, SPI_NOR_QUAD); > > > + ret = of_property_read_bool(np, "m25p,fast-read"); > > > + mode = (ret) ? SPI_NOR_FAST : SPI_NOR_QUAD; > > > + > > > + ret = spi_nor_scan(nor, NULL, mode); > > > if (ret) > > > goto mutex_failed; > > > > > I understand you want to provide a more generic read mode, but this is a quad spi driver, I prefer to provide the options, either quad read/quad IO read, or just normal read. > > > -- > > > 2.1.0.27.g96db324 > > > > > > > > > ______________________________________________________ > > > Linux MTD discussion mailing list > > > http://lists.infradead.org/mailman/listinfo/linux-mtd/ ^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v2 4/4] mtd:spi_nor: Disable Micron flash HW protection 2016-02-01 11:30 ` Yunhui Cui @ 2016-02-01 11:30 ` Yunhui Cui -1 siblings, 0 replies; 25+ messages in thread From: Yunhui Cui @ 2016-02-01 11:30 UTC (permalink / raw) To: dwmw2, computersforpeace, han.xu Cc: linux-kernel, linux-mtd, linux-arm-kernel, yao.yuan For Micron family ,The status register write enable/disable bit, provides hardware data protection for the device. When the enable/disable bit is set to 1, the status register nonvolatile bits become read-only and the WRITE STATUS REGISTER operation will not execute. Signed-off-by: Yunhui Cui <B56489@freescale.com> --- drivers/mtd/spi-nor/spi-nor.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index ed0c19c..917f814 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -39,6 +39,7 @@ #define SPI_NOR_MAX_ID_LEN 6 #define SPI_NOR_MAX_ADDR_WIDTH 4 +#define SPI_NOR_MICRON_WRITE_ENABLE 0x7f struct flash_info { char *name; @@ -1238,6 +1239,14 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode) write_sr(nor, 0); } + if (JEDEC_MFR(info) == SNOR_MFR_MICRON) { + ret = read_sr(nor); + ret &= SPI_NOR_MICRON_WRITE_ENABLE; + + write_enable(nor); + write_sr(nor, ret); + } + if (!mtd->name) mtd->name = dev_name(dev); mtd->priv = nor; -- 2.1.0.27.g96db324 ^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v2 4/4] mtd:spi_nor: Disable Micron flash HW protection @ 2016-02-01 11:30 ` Yunhui Cui 0 siblings, 0 replies; 25+ messages in thread From: Yunhui Cui @ 2016-02-01 11:30 UTC (permalink / raw) To: linux-arm-kernel For Micron family ,The status register write enable/disable bit, provides hardware data protection for the device. When the enable/disable bit is set to 1, the status register nonvolatile bits become read-only and the WRITE STATUS REGISTER operation will not execute. Signed-off-by: Yunhui Cui <B56489@freescale.com> --- drivers/mtd/spi-nor/spi-nor.c | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index ed0c19c..917f814 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -39,6 +39,7 @@ #define SPI_NOR_MAX_ID_LEN 6 #define SPI_NOR_MAX_ADDR_WIDTH 4 +#define SPI_NOR_MICRON_WRITE_ENABLE 0x7f struct flash_info { char *name; @@ -1238,6 +1239,14 @@ int spi_nor_scan(struct spi_nor *nor, const char *name, enum read_mode mode) write_sr(nor, 0); } + if (JEDEC_MFR(info) == SNOR_MFR_MICRON) { + ret = read_sr(nor); + ret &= SPI_NOR_MICRON_WRITE_ENABLE; + + write_enable(nor); + write_sr(nor, ret); + } + if (!mtd->name) mtd->name = dev_name(dev); mtd->priv = nor; -- 2.1.0.27.g96db324 ^ permalink raw reply related [flat|nested] 25+ messages in thread
end of thread, other threads:[~2016-03-02 1:50 UTC | newest] Thread overview: 25+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2016-02-01 11:30 [PATCH v2 1/4] mtd:fsl-quadspi:use the property fields of SPI-NOR Yunhui Cui 2016-02-01 11:30 ` Yunhui Cui 2016-02-01 11:30 ` [PATCH v2 2/4] mtd: fsl-quadspi: Rename SEQID_QUAD_READ to SEQID_READ Yunhui Cui 2016-02-01 11:30 ` Yunhui Cui 2016-02-01 11:30 ` [PATCH v2 3/4] mtd:spi-nor:fsl-quadspi:Add fast-read mode support Yunhui Cui 2016-02-01 11:30 ` Yunhui Cui 2016-02-17 18:07 ` Han Xu 2016-02-17 18:07 ` Han Xu 2016-02-25 8:07 ` Yunhui Cui 2016-02-25 8:07 ` Yunhui Cui 2016-02-25 8:07 ` Yunhui Cui 2016-02-26 16:31 ` Han Xu 2016-02-26 16:31 ` Han Xu 2016-02-26 16:31 ` Han Xu 2016-02-29 3:43 ` Yunhui Cui 2016-02-29 3:43 ` Yunhui Cui 2016-02-29 3:43 ` Yunhui Cui 2016-02-29 20:17 ` Han Xu 2016-02-29 20:17 ` Han Xu 2016-02-29 20:17 ` Han Xu 2016-03-02 1:50 ` Yunhui Cui 2016-03-02 1:50 ` Yunhui Cui 2016-03-02 1:50 ` Yunhui Cui 2016-02-01 11:30 ` [PATCH v2 4/4] mtd:spi_nor: Disable Micron flash HW protection Yunhui Cui 2016-02-01 11:30 ` Yunhui Cui
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