From: Andy Tang <andy.tang@nxp.com>
To: "mturquette@baylibre.com" <mturquette@baylibre.com>
Cc: "sboyd@codeaurora.org" <sboyd@codeaurora.org>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
Scott Wood <oss@buserror.net>
Subject: RE: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk
Date: Mon, 27 Mar 2017 03:39:42 +0000 [thread overview]
Message-ID: <DB6PR0402MB2837A1C0A3B832AB50774177F3330@DB6PR0402MB2837.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <1489977443-33582-1-git-send-email-andy.tang@nxp.com>
PING!
Regards,
Yuantian
> -----Original Message-----
> From: Yuantian Tang [mailto:andy.tang@nxp.com]
> Sent: Monday, March 20, 2017 10:37 AM
> To: mturquette@baylibre.com
> Cc: sboyd@codeaurora.org; robh+dt@kernel.org; mark.rutland@arm.com;
> linux-clk@vger.kernel.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Scott Wood;
> Andy Tang
> Subject: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk
>
> From: Scott Wood <oss@buserror.net>
>
> ls1012a has separate input root clocks for core PLLs versus the platform PLL,
> with the latter described as sysclk in the hw docs.
> Update the qoriq-clock binding to allow a second input clock, named
> "coreclk". If present, this clock will be used for the core PLLs.
>
> Signed-off-by: Scott Wood <oss@buserror.net>
> Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
> Acked-by: Rob Herring <robh@kernel.org>
> ---
> v2:
> -- change the author to Scott
> Documentation/devicetree/bindings/clock/qoriq-clock.txt | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> index aa3526f..119cafd 100644
> --- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> +++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> @@ -56,6 +56,11 @@ Optional properties:
> - clocks: If clock-frequency is not specified, sysclk may be provided
> as an input clock. Either clock-frequency or clocks must be
> provided.
> + A second input clock, called "coreclk", may be provided if
> + core PLLs are based on a different input clock from the
> + platform PLL.
> +- clock-names: Required if a coreclk is present. Valid names are
> + "sysclk" and "coreclk".
>
> 2. Clock Provider
>
> @@ -72,6 +77,7 @@ second cell is the clock index for the specified type.
> 2 hwaccel index (n in CLKCGnHWACSR)
> 3 fman 0 for fm1, 1 for fm2
> 4 platform pll 0=pll, 1=pll/2, 2=pll/3, 3=pll/4
> + 5 coreclk must be 0
>
> 3. Example
>
> --
> 2.1.0.27.g96db324
WARNING: multiple messages have this Message-ID (diff)
From: Andy Tang <andy.tang-3arQi8VN3Tc@public.gmane.org>
To: "mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org"
<mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org>
Cc: "sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org"
<sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org>,
"robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org"
<robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
"mark.rutland-5wv7dgnIgG8@public.gmane.org"
<mark.rutland-5wv7dgnIgG8@public.gmane.org>,
"linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
<linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
Scott Wood <oss-fOR+EgIDQEHk1uMJSBkQmQ@public.gmane.org>
Subject: RE: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk
Date: Mon, 27 Mar 2017 03:39:42 +0000 [thread overview]
Message-ID: <DB6PR0402MB2837A1C0A3B832AB50774177F3330@DB6PR0402MB2837.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <1489977443-33582-1-git-send-email-andy.tang-3arQi8VN3Tc@public.gmane.org>
PING!
Regards,
Yuantian
> -----Original Message-----
> From: Yuantian Tang [mailto:andy.tang-3arQi8VN3Tc@public.gmane.org]
> Sent: Monday, March 20, 2017 10:37 AM
> To: mturquette-rdvid1DuHRBWk0Htik3J/w@public.gmane.org
> Cc: sboyd-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org; robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org; mark.rutland-5wv7dgnIgG8@public.gmane.org;
> linux-clk-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-
> kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org; linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org; Scott Wood;
> Andy Tang
> Subject: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk
>
> From: Scott Wood <oss-fOR+EgIDQEHk1uMJSBkQmQ@public.gmane.org>
>
> ls1012a has separate input root clocks for core PLLs versus the platform PLL,
> with the latter described as sysclk in the hw docs.
> Update the qoriq-clock binding to allow a second input clock, named
> "coreclk". If present, this clock will be used for the core PLLs.
>
> Signed-off-by: Scott Wood <oss-fOR+EgIDQEHk1uMJSBkQmQ@public.gmane.org>
> Signed-off-by: Tang Yuantian <andy.tang-3arQi8VN3Tc@public.gmane.org>
> Acked-by: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
> ---
> v2:
> -- change the author to Scott
> Documentation/devicetree/bindings/clock/qoriq-clock.txt | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> index aa3526f..119cafd 100644
> --- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> +++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> @@ -56,6 +56,11 @@ Optional properties:
> - clocks: If clock-frequency is not specified, sysclk may be provided
> as an input clock. Either clock-frequency or clocks must be
> provided.
> + A second input clock, called "coreclk", may be provided if
> + core PLLs are based on a different input clock from the
> + platform PLL.
> +- clock-names: Required if a coreclk is present. Valid names are
> + "sysclk" and "coreclk".
>
> 2. Clock Provider
>
> @@ -72,6 +77,7 @@ second cell is the clock index for the specified type.
> 2 hwaccel index (n in CLKCGnHWACSR)
> 3 fman 0 for fm1, 1 for fm2
> 4 platform pll 0=pll, 1=pll/2, 2=pll/3, 3=pll/4
> + 5 coreclk must be 0
>
> 3. Example
>
> --
> 2.1.0.27.g96db324
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
WARNING: multiple messages have this Message-ID (diff)
From: Andy Tang <andy.tang@nxp.com>
To: "mturquette@baylibre.com" <mturquette@baylibre.com>
Cc: "sboyd@codeaurora.org" <sboyd@codeaurora.org>,
"robh+dt@kernel.org" <robh+dt@kernel.org>,
"mark.rutland@arm.com" <mark.rutland@arm.com>,
"linux-clk@vger.kernel.org" <linux-clk@vger.kernel.org>,
"devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
Scott Wood <oss@buserror.net>
Subject: RE: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk
Date: Mon, 27 Mar 2017 03:39:42 +0000 [thread overview]
Message-ID: <DB6PR0402MB2837A1C0A3B832AB50774177F3330@DB6PR0402MB2837.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <1489977443-33582-1-git-send-email-andy.tang@nxp.com>
PING!
Regards,
Yuantian
> -----Original Message-----
> From: Yuantian Tang [mailto:andy.tang@nxp.com]
> Sent: Monday, March 20, 2017 10:37 AM
> To: mturquette@baylibre.com
> Cc: sboyd@codeaurora.org; robh+dt@kernel.org; mark.rutland@arm.com;
> linux-clk@vger.kernel.org; devicetree@vger.kernel.org; linux-
> kernel@vger.kernel.org; linux-arm-kernel@lists.infradead.org; Scott Wood;
> Andy Tang
> Subject: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk
>=20
> From: Scott Wood <oss@buserror.net>
>=20
> ls1012a has separate input root clocks for core PLLs versus the platform =
PLL,
> with the latter described as sysclk in the hw docs.
> Update the qoriq-clock binding to allow a second input clock, named
> "coreclk". If present, this clock will be used for the core PLLs.
>=20
> Signed-off-by: Scott Wood <oss@buserror.net>
> Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
> Acked-by: Rob Herring <robh@kernel.org>
> ---
> v2:
> -- change the author to Scott
> Documentation/devicetree/bindings/clock/qoriq-clock.txt | 6 ++++++
> 1 file changed, 6 insertions(+)
>=20
> diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> index aa3526f..119cafd 100644
> --- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> +++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> @@ -56,6 +56,11 @@ Optional properties:
> - clocks: If clock-frequency is not specified, sysclk may be provided
> as an input clock. Either clock-frequency or clocks must be
> provided.
> + A second input clock, called "coreclk", may be provided if
> + core PLLs are based on a different input clock from the
> + platform PLL.
> +- clock-names: Required if a coreclk is present. Valid names are
> + "sysclk" and "coreclk".
>=20
> 2. Clock Provider
>=20
> @@ -72,6 +77,7 @@ second cell is the clock index for the specified type.
> 2 hwaccel index (n in CLKCGnHWACSR)
> 3 fman 0 for fm1, 1 for fm2
> 4 platform pll 0=3Dpll, 1=3Dpll/2, 2=3Dpll/3, 3=3Dpll/4
> + 5 coreclk must be 0
>=20
> 3. Example
>=20
> --
> 2.1.0.27.g96db324
WARNING: multiple messages have this Message-ID (diff)
From: andy.tang@nxp.com (Andy Tang)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk
Date: Mon, 27 Mar 2017 03:39:42 +0000 [thread overview]
Message-ID: <DB6PR0402MB2837A1C0A3B832AB50774177F3330@DB6PR0402MB2837.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <1489977443-33582-1-git-send-email-andy.tang@nxp.com>
PING!
Regards,
Yuantian
> -----Original Message-----
> From: Yuantian Tang [mailto:andy.tang at nxp.com]
> Sent: Monday, March 20, 2017 10:37 AM
> To: mturquette at baylibre.com
> Cc: sboyd at codeaurora.org; robh+dt at kernel.org; mark.rutland at arm.com;
> linux-clk at vger.kernel.org; devicetree at vger.kernel.org; linux-
> kernel at vger.kernel.org; linux-arm-kernel at lists.infradead.org; Scott Wood;
> Andy Tang
> Subject: [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk
>
> From: Scott Wood <oss@buserror.net>
>
> ls1012a has separate input root clocks for core PLLs versus the platform PLL,
> with the latter described as sysclk in the hw docs.
> Update the qoriq-clock binding to allow a second input clock, named
> "coreclk". If present, this clock will be used for the core PLLs.
>
> Signed-off-by: Scott Wood <oss@buserror.net>
> Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
> Acked-by: Rob Herring <robh@kernel.org>
> ---
> v2:
> -- change the author to Scott
> Documentation/devicetree/bindings/clock/qoriq-clock.txt | 6 ++++++
> 1 file changed, 6 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> index aa3526f..119cafd 100644
> --- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> +++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
> @@ -56,6 +56,11 @@ Optional properties:
> - clocks: If clock-frequency is not specified, sysclk may be provided
> as an input clock. Either clock-frequency or clocks must be
> provided.
> + A second input clock, called "coreclk", may be provided if
> + core PLLs are based on a different input clock from the
> + platform PLL.
> +- clock-names: Required if a coreclk is present. Valid names are
> + "sysclk" and "coreclk".
>
> 2. Clock Provider
>
> @@ -72,6 +77,7 @@ second cell is the clock index for the specified type.
> 2 hwaccel index (n in CLKCGnHWACSR)
> 3 fman 0 for fm1, 1 for fm2
> 4 platform pll 0=pll, 1=pll/2, 2=pll/3, 3=pll/4
> + 5 coreclk must be 0
>
> 3. Example
>
> --
> 2.1.0.27.g96db324
next prev parent reply other threads:[~2017-03-27 3:39 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-03-20 2:37 [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk Yuantian Tang
2017-03-20 2:37 ` Yuantian Tang
2017-03-20 2:37 ` Yuantian Tang
2017-03-20 2:37 ` [PATCH 2/2 v2] clk: qoriq: Separate root input clock for core PLLs on ls1012a Yuantian Tang
2017-03-20 2:37 ` Yuantian Tang
2017-03-20 2:37 ` Yuantian Tang
2017-06-01 8:28 ` Stephen Boyd
2017-06-01 8:28 ` Stephen Boyd
2017-06-01 8:34 ` Andy Tang
2017-06-01 8:34 ` Andy Tang
2017-06-01 8:34 ` Andy Tang
2017-06-01 8:34 ` Andy Tang
2017-06-01 18:17 ` Stephen Boyd
2017-06-01 18:17 ` Stephen Boyd
2017-06-01 18:17 ` Stephen Boyd
2017-06-01 18:17 ` Stephen Boyd
2017-03-27 3:39 ` Andy Tang [this message]
2017-03-27 3:39 ` [PATCH 1/2 v2] dt-bindings: qoriq-clock: Add coreclk Andy Tang
2017-03-27 3:39 ` Andy Tang
2017-03-27 3:39 ` Andy Tang
2017-04-05 6:16 ` Andy Tang
2017-04-05 6:16 ` Andy Tang
2017-04-05 6:16 ` Andy Tang
2017-04-05 6:16 ` Andy Tang
2017-04-17 1:37 ` Andy Tang
2017-04-17 1:37 ` Andy Tang
2017-04-17 1:37 ` Andy Tang
2017-04-17 1:37 ` Andy Tang
2017-06-01 8:27 ` sboyd
2017-06-01 8:27 ` sboyd at codeaurora.org
2017-06-01 8:27 ` sboyd
2017-04-24 3:14 ` Andy Tang
2017-04-24 3:14 ` Andy Tang
2017-04-24 3:14 ` Andy Tang
2017-04-24 3:14 ` Andy Tang
2017-05-08 5:59 ` Andy Tang
2017-05-08 5:59 ` Andy Tang
2017-05-08 5:59 ` Andy Tang
2017-05-08 5:59 ` Andy Tang
2017-05-31 9:22 ` Andy Tang
2017-05-31 9:22 ` Andy Tang
2017-05-31 9:22 ` Andy Tang
2017-05-31 9:22 ` Andy Tang
2017-06-01 8:27 ` Stephen Boyd
2017-06-01 8:27 ` Stephen Boyd
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=DB6PR0402MB2837A1C0A3B832AB50774177F3330@DB6PR0402MB2837.eurprd04.prod.outlook.com \
--to=andy.tang@nxp.com \
--cc=devicetree@vger.kernel.org \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-clk@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=mark.rutland@arm.com \
--cc=mturquette@baylibre.com \
--cc=oss@buserror.net \
--cc=robh+dt@kernel.org \
--cc=sboyd@codeaurora.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.