* [Intel-gfx] [PATCH 1/2] drm/i915/mtl: Add MeteorLake platform info
2022-07-07 0:31 [Intel-gfx] [PATCH 0/2] i915: Introduce Meteorlake Radhakrishna Sripada
@ 2022-07-07 0:31 ` Radhakrishna Sripada
2022-07-07 3:55 ` Murthy, Arun R
2022-07-07 0:31 ` [Intel-gfx] [PATCH 2/2] drm/i915/mtl: Add MeteorLake PCI IDs Radhakrishna Sripada
` (4 subsequent siblings)
5 siblings, 1 reply; 15+ messages in thread
From: Radhakrishna Sripada @ 2022-07-07 0:31 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, lucas.demarchi, rodrigo.vivi
MTL has Xe_LPD+ display IP (version = 14), MTL graphics IP
(version = 12.70), and Xe_LPM+ media IP (version = 13).
Bspec: 55413
Bspec: 55416
Bspec: 55417
Bspec: 55418
Bspec: 55726
Bspec: 45544
Bspec: 65380
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_pci.c | 25 ++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_device_info.c | 1 +
drivers/gpu/drm/i915/intel_device_info.h | 1 +
4 files changed, 28 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2f6910050aa2..413a126a6dea 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -999,6 +999,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_N)
#define IS_ADLP_RPLP(dev_priv) \
IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPL)
+#define IS_METEORLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_METEORLAKE)
#define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
(INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
#define IS_BDW_ULT(dev_priv) \
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 04346929d009..6559c770036f 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -1069,6 +1069,31 @@ static const struct intel_device_info ats_m_info = {
.require_force_probe = 1,
};
+#define XE_LPDP_FEATURES \
+ XE_LPD_FEATURES, \
+ .display.ver = 14, \
+ .display.has_cdclk_crawl = 1
+
+__maybe_unused
+static const struct intel_device_info mtl_info = {
+ XE_HP_FEATURES,
+ XE_LPDP_FEATURES,
+ /*
+ * Real graphics IP version will be obtained from hardware GMD_ID
+ * register. Value provided here is just for sanity checking.
+ */
+ .graphics.ver = 12,
+ .graphics.rel = 70,
+ .media.ver = 13,
+ .memory_regions = REGION_SMEM | REGION_STOLEN_LMEM,
+ PLATFORM(INTEL_METEORLAKE),
+ .platform_engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(CCS0),
+ .require_force_probe = 1,
+ .has_flat_ccs = 0,
+ .has_snoop = 1,
+ .display.has_modular_fia = 1,
+};
+
#undef PLATFORM
/*
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index cefa9ed784ff..d6934d4f965d 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -72,6 +72,7 @@ static const char * const platform_names[] = {
PLATFORM_NAME(ALDERLAKE_P),
PLATFORM_NAME(XEHPSDV),
PLATFORM_NAME(DG2),
+ PLATFORM_NAME(METEORLAKE),
};
#undef PLATFORM_NAME
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index b259a3dbbe0e..2a86e8445fcf 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -88,6 +88,7 @@ enum intel_platform {
INTEL_ALDERLAKE_P,
INTEL_XEHPSDV,
INTEL_DG2,
+ INTEL_METEORLAKE,
INTEL_MAX_PLATFORMS
};
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [Intel-gfx] [PATCH 1/2] drm/i915/mtl: Add MeteorLake platform info
2022-07-07 0:31 ` [Intel-gfx] [PATCH 1/2] drm/i915/mtl: Add MeteorLake platform info Radhakrishna Sripada
@ 2022-07-07 3:55 ` Murthy, Arun R
0 siblings, 0 replies; 15+ messages in thread
From: Murthy, Arun R @ 2022-07-07 3:55 UTC (permalink / raw)
To: Sripada, Radhakrishna, intel-gfx
Cc: Nikula, Jani, De Marchi, Lucas, Vivi, Rodrigo
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of
> Radhakrishna Sripada
> Sent: Thursday, July 7, 2022 6:01 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>; De Marchi, Lucas
> <lucas.demarchi@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>
> Subject: [Intel-gfx] [PATCH 1/2] drm/i915/mtl: Add MeteorLake platform info
>
> MTL has Xe_LPD+ display IP (version = 14), MTL graphics IP (version = 12.70),
> and Xe_LPM+ media IP (version = 13).
>
> Bspec: 55413
> Bspec: 55416
> Bspec: 55417
> Bspec: 55418
> Bspec: 55726
> Bspec: 45544
> Bspec: 65380
>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> ---
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Thanks and Regards,
Arun R Murthy
-------------------
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH 2/2] drm/i915/mtl: Add MeteorLake PCI IDs
2022-07-07 0:31 [Intel-gfx] [PATCH 0/2] i915: Introduce Meteorlake Radhakrishna Sripada
2022-07-07 0:31 ` [Intel-gfx] [PATCH 1/2] drm/i915/mtl: Add MeteorLake platform info Radhakrishna Sripada
@ 2022-07-07 0:31 ` Radhakrishna Sripada
2022-07-07 3:58 ` Murthy, Arun R
2022-07-07 0:47 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for i915: Introduce Meteorlake Patchwork
` (3 subsequent siblings)
5 siblings, 1 reply; 15+ messages in thread
From: Radhakrishna Sripada @ 2022-07-07 0:31 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, lucas.demarchi, rodrigo.vivi
Add Meteorlake PCI IDs. Split into M, and P subplatforms.
Bspec: 55420
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 4 ++++
drivers/gpu/drm/i915/i915_pci.c | 1 +
drivers/gpu/drm/i915/intel_device_info.c | 14 ++++++++++++++
drivers/gpu/drm/i915/intel_device_info.h | 4 ++++
include/drm/i915_pciids.h | 19 +++++++++++++++++++
5 files changed, 42 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 413a126a6dea..8bf3ea54f59c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1000,6 +1000,10 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define IS_ADLP_RPLP(dev_priv) \
IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPL)
#define IS_METEORLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_METEORLAKE)
+#define IS_METEORLAKE_M(dev_priv) \
+ IS_SUBPLATFORM(dev_priv, INTEL_METEORLAKE, INTEL_SUBPLATFORM_M)
+#define IS_METEORLAKE_P(dev_priv) \
+ IS_SUBPLATFORM(dev_priv, INTEL_METEORLAKE, INTEL_SUBPLATFORM_P)
#define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
(INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
#define IS_BDW_ULT(dev_priv) \
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 6559c770036f..a5a9fc11338f 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -1175,6 +1175,7 @@ static const struct pci_device_id pciidlist[] = {
INTEL_RPLS_IDS(&adl_s_info),
INTEL_RPLP_IDS(&adl_p_info),
INTEL_DG2_IDS(&dg2_info),
+ INTEL_MTL_IDS(&mtl_info),
{0, 0, 0}
};
MODULE_DEVICE_TABLE(pci, pciidlist);
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index d6934d4f965d..0f412c1ab449 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -199,6 +199,14 @@ static const u16 subplatform_g12_ids[] = {
INTEL_DG2_G12_IDS(0),
};
+static const u16 subplatform_m_ids[] = {
+ INTEL_MTL_M_IDS(0),
+};
+
+static const u16 subplatform_p_ids[] = {
+ INTEL_MTL_P_IDS(0),
+};
+
static bool find_devid(u16 id, const u16 *p, unsigned int num)
{
for (; num; num--, p++) {
@@ -253,6 +261,12 @@ void intel_device_info_subplatform_init(struct drm_i915_private *i915)
} else if (find_devid(devid, subplatform_g12_ids,
ARRAY_SIZE(subplatform_g12_ids))) {
mask = BIT(INTEL_SUBPLATFORM_G12);
+ } else if (find_devid(devid, subplatform_m_ids,
+ ARRAY_SIZE(subplatform_m_ids))) {
+ mask = BIT(INTEL_SUBPLATFORM_M);
+ } else if (find_devid(devid, subplatform_p_ids,
+ ARRAY_SIZE(subplatform_p_ids))) {
+ mask = BIT(INTEL_SUBPLATFORM_P);
}
GEM_BUG_ON(mask & ~INTEL_SUBPLATFORM_MASK);
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 2a86e8445fcf..8ab73923fc29 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -126,6 +126,10 @@ enum intel_platform {
*/
#define INTEL_SUBPLATFORM_N 1
+/* MTL */
+#define INTEL_SUBPLATFORM_M 0
+#define INTEL_SUBPLATFORM_P 1
+
enum intel_ppgtt_type {
INTEL_PPGTT_NONE = I915_GEM_PPGTT_NONE,
INTEL_PPGTT_ALIASING = I915_GEM_PPGTT_ALIASING,
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 283dadfbb4db..388c19c52c7d 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -714,4 +714,23 @@
INTEL_DG2_G11_IDS(info), \
INTEL_DG2_G12_IDS(info)
+/* MTL */
+#define INTEL_MTL_M_IDS(info) \
+ INTEL_VGA_DEVICE(0x7D40, info), \
+ INTEL_VGA_DEVICE(0x7D43, info), \
+ INTEL_VGA_DEVICE(0x7DC0, info)
+
+#define INTEL_MTL_P_IDS(info) \
+ INTEL_VGA_DEVICE(0x7D45, info), \
+ INTEL_VGA_DEVICE(0x7D47, info), \
+ INTEL_VGA_DEVICE(0x7D55, info), \
+ INTEL_VGA_DEVICE(0x7D60, info), \
+ INTEL_VGA_DEVICE(0x7DC5, info), \
+ INTEL_VGA_DEVICE(0x7DD5, info), \
+ INTEL_VGA_DEVICE(0x7DE0, info)
+
+#define INTEL_MTL_IDS(info) \
+ INTEL_MTL_M_IDS(info), \
+ INTEL_MTL_P_IDS(info)
+
#endif /* _I915_PCIIDS_H */
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [Intel-gfx] [PATCH 2/2] drm/i915/mtl: Add MeteorLake PCI IDs
2022-07-07 0:31 ` [Intel-gfx] [PATCH 2/2] drm/i915/mtl: Add MeteorLake PCI IDs Radhakrishna Sripada
@ 2022-07-07 3:58 ` Murthy, Arun R
0 siblings, 0 replies; 15+ messages in thread
From: Murthy, Arun R @ 2022-07-07 3:58 UTC (permalink / raw)
To: Sripada, Radhakrishna, intel-gfx
Cc: Nikula, Jani, De Marchi, Lucas, Vivi, Rodrigo
> -----Original Message-----
> From: Intel-gfx <intel-gfx-bounces@lists.freedesktop.org> On Behalf Of
> Radhakrishna Sripada
> Sent: Thursday, July 7, 2022 6:01 AM
> To: intel-gfx@lists.freedesktop.org
> Cc: Nikula, Jani <jani.nikula@intel.com>; De Marchi, Lucas
> <lucas.demarchi@intel.com>; Vivi, Rodrigo <rodrigo.vivi@intel.com>
> Subject: [Intel-gfx] [PATCH 2/2] drm/i915/mtl: Add MeteorLake PCI IDs
>
> Add Meteorlake PCI IDs. Split into M, and P subplatforms.
>
> Bspec: 55420
>
> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com>
Thanks and Regards,
Arun R Murthy
--------------------
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Intel-gfx] ✗ Fi.CI.BUILD: failure for i915: Introduce Meteorlake
2022-07-07 0:31 [Intel-gfx] [PATCH 0/2] i915: Introduce Meteorlake Radhakrishna Sripada
2022-07-07 0:31 ` [Intel-gfx] [PATCH 1/2] drm/i915/mtl: Add MeteorLake platform info Radhakrishna Sripada
2022-07-07 0:31 ` [Intel-gfx] [PATCH 2/2] drm/i915/mtl: Add MeteorLake PCI IDs Radhakrishna Sripada
@ 2022-07-07 0:47 ` Patchwork
2022-07-07 4:11 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for i915: Introduce Meteorlake (rev2) Patchwork
` (2 subsequent siblings)
5 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2022-07-07 0:47 UTC (permalink / raw)
To: Radhakrishna Sripada; +Cc: intel-gfx
== Series Details ==
Series: i915: Introduce Meteorlake
URL : https://patchwork.freedesktop.org/series/106000/
State : failure
== Summary ==
Error: patch https://patchwork.freedesktop.org/api/1.0/series/106000/revisions/1/mbox/ not applied
Applying: drm/i915/mtl: Add MeteorLake platform info
Using index info to reconstruct a base tree...
M drivers/gpu/drm/i915/i915_drv.h
M drivers/gpu/drm/i915/i915_pci.c
M drivers/gpu/drm/i915/intel_device_info.c
M drivers/gpu/drm/i915/intel_device_info.h
Falling back to patching base and 3-way merge...
Auto-merging drivers/gpu/drm/i915/intel_device_info.h
CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/intel_device_info.h
Auto-merging drivers/gpu/drm/i915/intel_device_info.c
CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/intel_device_info.c
Auto-merging drivers/gpu/drm/i915/i915_pci.c
CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/i915_pci.c
Auto-merging drivers/gpu/drm/i915/i915_drv.h
error: Failed to merge in the changes.
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0001 drm/i915/mtl: Add MeteorLake platform info
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
^ permalink raw reply [flat|nested] 15+ messages in thread* [Intel-gfx] ✗ Fi.CI.BUILD: failure for i915: Introduce Meteorlake (rev2)
2022-07-07 0:31 [Intel-gfx] [PATCH 0/2] i915: Introduce Meteorlake Radhakrishna Sripada
` (2 preceding siblings ...)
2022-07-07 0:47 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for i915: Introduce Meteorlake Patchwork
@ 2022-07-07 4:11 ` Patchwork
2022-07-07 18:19 ` [Intel-gfx] [PATCH 0/2] i915: Introduce Meteorlake Radhakrishna Sripada
2022-07-07 20:26 ` [Intel-gfx] [PATCH v2 0/2] i915: Introduce Meteorlake Radhakrishna Sripada
5 siblings, 0 replies; 15+ messages in thread
From: Patchwork @ 2022-07-07 4:11 UTC (permalink / raw)
To: Radhakrishna Sripada; +Cc: intel-gfx
== Series Details ==
Series: i915: Introduce Meteorlake (rev2)
URL : https://patchwork.freedesktop.org/series/106000/
State : failure
== Summary ==
Error: patch https://patchwork.freedesktop.org/api/1.0/series/106000/revisions/2/mbox/ not applied
Applying: drm/i915/mtl: Add MeteorLake platform info
Using index info to reconstruct a base tree...
M drivers/gpu/drm/i915/i915_drv.h
M drivers/gpu/drm/i915/i915_pci.c
M drivers/gpu/drm/i915/intel_device_info.c
M drivers/gpu/drm/i915/intel_device_info.h
Falling back to patching base and 3-way merge...
Auto-merging drivers/gpu/drm/i915/intel_device_info.h
CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/intel_device_info.h
Auto-merging drivers/gpu/drm/i915/intel_device_info.c
CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/intel_device_info.c
Auto-merging drivers/gpu/drm/i915/i915_pci.c
CONFLICT (content): Merge conflict in drivers/gpu/drm/i915/i915_pci.c
Auto-merging drivers/gpu/drm/i915/i915_drv.h
error: Failed to merge in the changes.
hint: Use 'git am --show-current-patch=diff' to see the failed patch
Patch failed at 0001 drm/i915/mtl: Add MeteorLake platform info
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
^ permalink raw reply [flat|nested] 15+ messages in thread* [Intel-gfx] [PATCH 0/2] i915: Introduce Meteorlake
2022-07-07 0:31 [Intel-gfx] [PATCH 0/2] i915: Introduce Meteorlake Radhakrishna Sripada
` (3 preceding siblings ...)
2022-07-07 4:11 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for i915: Introduce Meteorlake (rev2) Patchwork
@ 2022-07-07 18:19 ` Radhakrishna Sripada
2022-07-07 18:19 ` [Intel-gfx] [PATCH 1/2] drm/i915/mtl: Add MeteorLake platform info Radhakrishna Sripada
2022-07-07 18:20 ` [Intel-gfx] [PATCH 2/2] drm/i915/mtl: Add MeteorLake PCI IDs Radhakrishna Sripada
2022-07-07 20:26 ` [Intel-gfx] [PATCH v2 0/2] i915: Introduce Meteorlake Radhakrishna Sripada
5 siblings, 2 replies; 15+ messages in thread
From: Radhakrishna Sripada @ 2022-07-07 18:19 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, lucas.demarchi, rodrigo.vivi
Meteorlake is a new client platform following RPL S. Meteorlake
introduces version 14 for Display, version 13 Media and version
12.70 for Graphics.
This is the basic platform definition series to introduce Meteorlake.
Radhakrishna Sripada (2):
drm/i915/mtl: Add MeteorLake platform info
drm/i915/mtl: Add MeteorLake PCI IDs
drivers/gpu/drm/i915/i915_drv.h | 5 +++++
drivers/gpu/drm/i915/i915_pci.c | 26 ++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_device_info.c | 15 ++++++++++++++
drivers/gpu/drm/i915/intel_device_info.h | 5 +++++
include/drm/i915_pciids.h | 19 +++++++++++++++++
5 files changed, 70 insertions(+)
--
2.25.1
^ permalink raw reply [flat|nested] 15+ messages in thread* [Intel-gfx] [PATCH 1/2] drm/i915/mtl: Add MeteorLake platform info
2022-07-07 18:19 ` [Intel-gfx] [PATCH 0/2] i915: Introduce Meteorlake Radhakrishna Sripada
@ 2022-07-07 18:19 ` Radhakrishna Sripada
2022-07-07 18:20 ` [Intel-gfx] [PATCH 2/2] drm/i915/mtl: Add MeteorLake PCI IDs Radhakrishna Sripada
1 sibling, 0 replies; 15+ messages in thread
From: Radhakrishna Sripada @ 2022-07-07 18:19 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, lucas.demarchi, rodrigo.vivi
MTL has Xe_LPD+ display IP (version = 14), MTL graphics IP
(version = 12.70), and Xe_LPM+ media IP (version = 13).
Bspec: 55413
Bspec: 55416
Bspec: 55417
Bspec: 55418
Bspec: 55726
Bspec: 45544
Bspec: 65380
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_pci.c | 25 ++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_device_info.c | 1 +
drivers/gpu/drm/i915/intel_device_info.h | 1 +
4 files changed, 28 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 2f6910050aa2..413a126a6dea 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -999,6 +999,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_N)
#define IS_ADLP_RPLP(dev_priv) \
IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPL)
+#define IS_METEORLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_METEORLAKE)
#define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
(INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
#define IS_BDW_ULT(dev_priv) \
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 04346929d009..6559c770036f 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -1069,6 +1069,31 @@ static const struct intel_device_info ats_m_info = {
.require_force_probe = 1,
};
+#define XE_LPDP_FEATURES \
+ XE_LPD_FEATURES, \
+ .display.ver = 14, \
+ .display.has_cdclk_crawl = 1
+
+__maybe_unused
+static const struct intel_device_info mtl_info = {
+ XE_HP_FEATURES,
+ XE_LPDP_FEATURES,
+ /*
+ * Real graphics IP version will be obtained from hardware GMD_ID
+ * register. Value provided here is just for sanity checking.
+ */
+ .graphics.ver = 12,
+ .graphics.rel = 70,
+ .media.ver = 13,
+ .memory_regions = REGION_SMEM | REGION_STOLEN_LMEM,
+ PLATFORM(INTEL_METEORLAKE),
+ .platform_engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(CCS0),
+ .require_force_probe = 1,
+ .has_flat_ccs = 0,
+ .has_snoop = 1,
+ .display.has_modular_fia = 1,
+};
+
#undef PLATFORM
/*
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index cefa9ed784ff..d6934d4f965d 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -72,6 +72,7 @@ static const char * const platform_names[] = {
PLATFORM_NAME(ALDERLAKE_P),
PLATFORM_NAME(XEHPSDV),
PLATFORM_NAME(DG2),
+ PLATFORM_NAME(METEORLAKE),
};
#undef PLATFORM_NAME
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index b259a3dbbe0e..2a86e8445fcf 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -88,6 +88,7 @@ enum intel_platform {
INTEL_ALDERLAKE_P,
INTEL_XEHPSDV,
INTEL_DG2,
+ INTEL_METEORLAKE,
INTEL_MAX_PLATFORMS
};
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* [Intel-gfx] [PATCH 2/2] drm/i915/mtl: Add MeteorLake PCI IDs
2022-07-07 18:19 ` [Intel-gfx] [PATCH 0/2] i915: Introduce Meteorlake Radhakrishna Sripada
2022-07-07 18:19 ` [Intel-gfx] [PATCH 1/2] drm/i915/mtl: Add MeteorLake platform info Radhakrishna Sripada
@ 2022-07-07 18:20 ` Radhakrishna Sripada
1 sibling, 0 replies; 15+ messages in thread
From: Radhakrishna Sripada @ 2022-07-07 18:20 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, lucas.demarchi, rodrigo.vivi
Add Meteorlake PCI IDs. Split into M, and P subplatforms.
Bspec: 55420
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 4 ++++
drivers/gpu/drm/i915/i915_pci.c | 1 +
drivers/gpu/drm/i915/intel_device_info.c | 14 ++++++++++++++
drivers/gpu/drm/i915/intel_device_info.h | 4 ++++
include/drm/i915_pciids.h | 19 +++++++++++++++++++
5 files changed, 42 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 413a126a6dea..8bf3ea54f59c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1000,6 +1000,10 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define IS_ADLP_RPLP(dev_priv) \
IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPL)
#define IS_METEORLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_METEORLAKE)
+#define IS_METEORLAKE_M(dev_priv) \
+ IS_SUBPLATFORM(dev_priv, INTEL_METEORLAKE, INTEL_SUBPLATFORM_M)
+#define IS_METEORLAKE_P(dev_priv) \
+ IS_SUBPLATFORM(dev_priv, INTEL_METEORLAKE, INTEL_SUBPLATFORM_P)
#define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
(INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
#define IS_BDW_ULT(dev_priv) \
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 6559c770036f..a5a9fc11338f 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -1175,6 +1175,7 @@ static const struct pci_device_id pciidlist[] = {
INTEL_RPLS_IDS(&adl_s_info),
INTEL_RPLP_IDS(&adl_p_info),
INTEL_DG2_IDS(&dg2_info),
+ INTEL_MTL_IDS(&mtl_info),
{0, 0, 0}
};
MODULE_DEVICE_TABLE(pci, pciidlist);
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index d6934d4f965d..0f412c1ab449 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -199,6 +199,14 @@ static const u16 subplatform_g12_ids[] = {
INTEL_DG2_G12_IDS(0),
};
+static const u16 subplatform_m_ids[] = {
+ INTEL_MTL_M_IDS(0),
+};
+
+static const u16 subplatform_p_ids[] = {
+ INTEL_MTL_P_IDS(0),
+};
+
static bool find_devid(u16 id, const u16 *p, unsigned int num)
{
for (; num; num--, p++) {
@@ -253,6 +261,12 @@ void intel_device_info_subplatform_init(struct drm_i915_private *i915)
} else if (find_devid(devid, subplatform_g12_ids,
ARRAY_SIZE(subplatform_g12_ids))) {
mask = BIT(INTEL_SUBPLATFORM_G12);
+ } else if (find_devid(devid, subplatform_m_ids,
+ ARRAY_SIZE(subplatform_m_ids))) {
+ mask = BIT(INTEL_SUBPLATFORM_M);
+ } else if (find_devid(devid, subplatform_p_ids,
+ ARRAY_SIZE(subplatform_p_ids))) {
+ mask = BIT(INTEL_SUBPLATFORM_P);
}
GEM_BUG_ON(mask & ~INTEL_SUBPLATFORM_MASK);
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 2a86e8445fcf..8ab73923fc29 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -126,6 +126,10 @@ enum intel_platform {
*/
#define INTEL_SUBPLATFORM_N 1
+/* MTL */
+#define INTEL_SUBPLATFORM_M 0
+#define INTEL_SUBPLATFORM_P 1
+
enum intel_ppgtt_type {
INTEL_PPGTT_NONE = I915_GEM_PPGTT_NONE,
INTEL_PPGTT_ALIASING = I915_GEM_PPGTT_ALIASING,
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 283dadfbb4db..388c19c52c7d 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -714,4 +714,23 @@
INTEL_DG2_G11_IDS(info), \
INTEL_DG2_G12_IDS(info)
+/* MTL */
+#define INTEL_MTL_M_IDS(info) \
+ INTEL_VGA_DEVICE(0x7D40, info), \
+ INTEL_VGA_DEVICE(0x7D43, info), \
+ INTEL_VGA_DEVICE(0x7DC0, info)
+
+#define INTEL_MTL_P_IDS(info) \
+ INTEL_VGA_DEVICE(0x7D45, info), \
+ INTEL_VGA_DEVICE(0x7D47, info), \
+ INTEL_VGA_DEVICE(0x7D55, info), \
+ INTEL_VGA_DEVICE(0x7D60, info), \
+ INTEL_VGA_DEVICE(0x7DC5, info), \
+ INTEL_VGA_DEVICE(0x7DD5, info), \
+ INTEL_VGA_DEVICE(0x7DE0, info)
+
+#define INTEL_MTL_IDS(info) \
+ INTEL_MTL_M_IDS(info), \
+ INTEL_MTL_P_IDS(info)
+
#endif /* _I915_PCIIDS_H */
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH v2 0/2] i915: Introduce Meteorlake
2022-07-07 0:31 [Intel-gfx] [PATCH 0/2] i915: Introduce Meteorlake Radhakrishna Sripada
` (4 preceding siblings ...)
2022-07-07 18:19 ` [Intel-gfx] [PATCH 0/2] i915: Introduce Meteorlake Radhakrishna Sripada
@ 2022-07-07 20:26 ` Radhakrishna Sripada
2022-07-07 20:26 ` [Intel-gfx] [PATCH v2 1/2] drm/i915/mtl: Add MeteorLake platform info Radhakrishna Sripada
2022-07-07 20:26 ` [Intel-gfx] [PATCH v2 2/2] drm/i915/mtl: Add MeteorLake PCI IDs Radhakrishna Sripada
5 siblings, 2 replies; 15+ messages in thread
From: Radhakrishna Sripada @ 2022-07-07 20:26 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, lucas.demarchi, rodrigo.vivi
Meteorlake is a new client platform following RPL S. Meteorlake
introduces version 14 for Display, version 13 Media and version
12.70 for Graphics.
This is the basic platform definition series to introduce Meteorlake.
v2: Remove unused PCI'ids and rebase on drm-tip
Radhakrishna Sripada (2):
drm/i915/mtl: Add MeteorLake platform info
drm/i915/mtl: Add MeteorLake PCI IDs
drivers/gpu/drm/i915/i915_drv.h | 5 +++++
drivers/gpu/drm/i915/i915_pci.c | 26 ++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_device_info.c | 15 ++++++++++++++
drivers/gpu/drm/i915/intel_device_info.h | 5 +++++
include/drm/i915_pciids.h | 13 ++++++++++++
5 files changed, 64 insertions(+)
--
2.25.1
^ permalink raw reply [flat|nested] 15+ messages in thread* [Intel-gfx] [PATCH v2 1/2] drm/i915/mtl: Add MeteorLake platform info
2022-07-07 20:26 ` [Intel-gfx] [PATCH v2 0/2] i915: Introduce Meteorlake Radhakrishna Sripada
@ 2022-07-07 20:26 ` Radhakrishna Sripada
2022-07-07 20:59 ` Matt Roper
2022-07-07 20:26 ` [Intel-gfx] [PATCH v2 2/2] drm/i915/mtl: Add MeteorLake PCI IDs Radhakrishna Sripada
1 sibling, 1 reply; 15+ messages in thread
From: Radhakrishna Sripada @ 2022-07-07 20:26 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, lucas.demarchi, rodrigo.vivi
MTL has Xe_LPD+ display IP (version = 14), MTL graphics IP
(version = 12.70), and Xe_LPM+ media IP (version = 13).
Bspec: 55413
Bspec: 55416
Bspec: 55417
Bspec: 55418
Bspec: 55726
Bspec: 45544
Bspec: 65380
Cc: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 1 +
drivers/gpu/drm/i915/i915_pci.c | 25 ++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_device_info.c | 1 +
drivers/gpu/drm/i915/intel_device_info.h | 1 +
4 files changed, 28 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index c22f29c3faa0..00998a78a2ba 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1018,6 +1018,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_N)
#define IS_ADLP_RPLP(dev_priv) \
IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPL)
+#define IS_METEORLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_METEORLAKE)
#define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
(INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
#define IS_BDW_ULT(dev_priv) \
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 0cdd6513fbb7..82895ecb25ba 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -1107,6 +1107,31 @@ static const struct intel_device_info pvc_info = {
.require_force_probe = 1,
};
+#define XE_LPDP_FEATURES \
+ XE_LPD_FEATURES, \
+ .display.ver = 14, \
+ .display.has_cdclk_crawl = 1
+
+__maybe_unused
+static const struct intel_device_info mtl_info = {
+ XE_HP_FEATURES,
+ XE_LPDP_FEATURES,
+ /*
+ * Real graphics IP version will be obtained from hardware GMD_ID
+ * register. Value provided here is just for sanity checking.
+ */
+ .graphics.ver = 12,
+ .graphics.rel = 70,
+ .media.ver = 13,
+ .memory_regions = REGION_SMEM | REGION_STOLEN_LMEM,
+ PLATFORM(INTEL_METEORLAKE),
+ .platform_engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(CCS0),
+ .require_force_probe = 1,
+ .has_flat_ccs = 0,
+ .has_snoop = 1,
+ .display.has_modular_fia = 1,
+};
+
#undef PLATFORM
/*
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index f0bf23726ed8..27c343316afa 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -73,6 +73,7 @@ static const char * const platform_names[] = {
PLATFORM_NAME(XEHPSDV),
PLATFORM_NAME(DG2),
PLATFORM_NAME(PONTEVECCHIO),
+ PLATFORM_NAME(METEORLAKE),
};
#undef PLATFORM_NAME
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 1c150cd7dceb..7ba9663213f4 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -89,6 +89,7 @@ enum intel_platform {
INTEL_XEHPSDV,
INTEL_DG2,
INTEL_PONTEVECCHIO,
+ INTEL_METEORLAKE,
INTEL_MAX_PLATFORMS
};
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/mtl: Add MeteorLake platform info
2022-07-07 20:26 ` [Intel-gfx] [PATCH v2 1/2] drm/i915/mtl: Add MeteorLake platform info Radhakrishna Sripada
@ 2022-07-07 20:59 ` Matt Roper
0 siblings, 0 replies; 15+ messages in thread
From: Matt Roper @ 2022-07-07 20:59 UTC (permalink / raw)
To: Radhakrishna Sripada; +Cc: jani.nikula, intel-gfx, lucas.demarchi, rodrigo.vivi
On Thu, Jul 07, 2022 at 01:26:09PM -0700, Radhakrishna Sripada wrote:
> MTL has Xe_LPD+ display IP (version = 14), MTL graphics IP
> (version = 12.70), and Xe_LPM+ media IP (version = 13).
>
> Bspec: 55413
> Bspec: 55416
> Bspec: 55417
> Bspec: 55418
> Bspec: 55726
> Bspec: 45544
> Bspec: 65380
>
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 1 +
> drivers/gpu/drm/i915/i915_pci.c | 25 ++++++++++++++++++++++++
> drivers/gpu/drm/i915/intel_device_info.c | 1 +
> drivers/gpu/drm/i915/intel_device_info.h | 1 +
> 4 files changed, 28 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index c22f29c3faa0..00998a78a2ba 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1018,6 +1018,7 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_N)
> #define IS_ADLP_RPLP(dev_priv) \
> IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPL)
> +#define IS_METEORLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_METEORLAKE)
> #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
> (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
> #define IS_BDW_ULT(dev_priv) \
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 0cdd6513fbb7..82895ecb25ba 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -1107,6 +1107,31 @@ static const struct intel_device_info pvc_info = {
> .require_force_probe = 1,
> };
>
> +#define XE_LPDP_FEATURES \
> + XE_LPD_FEATURES, \
> + .display.ver = 14, \
> + .display.has_cdclk_crawl = 1
> +
> +__maybe_unused
> +static const struct intel_device_info mtl_info = {
> + XE_HP_FEATURES,
> + XE_LPDP_FEATURES,
> + /*
> + * Real graphics IP version will be obtained from hardware GMD_ID
> + * register. Value provided here is just for sanity checking.
> + */
> + .graphics.ver = 12,
> + .graphics.rel = 70,
> + .media.ver = 13,
> + .memory_regions = REGION_SMEM | REGION_STOLEN_LMEM,
> + PLATFORM(INTEL_METEORLAKE),
> + .platform_engine_mask = BIT(RCS0) | BIT(BCS0) | BIT(CCS0),
> + .require_force_probe = 1,
> + .has_flat_ccs = 0,
> + .has_snoop = 1,
> + .display.has_modular_fia = 1,
Not a huge deal, but the ordering here is a bit non-standard. On other
platforms we tend to order things as:
*_FEATURES
IP version values
PLATFORM(FOO)
everything else, sorted alphabetically
Matt
> +};
> +
> #undef PLATFORM
>
> /*
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index f0bf23726ed8..27c343316afa 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -73,6 +73,7 @@ static const char * const platform_names[] = {
> PLATFORM_NAME(XEHPSDV),
> PLATFORM_NAME(DG2),
> PLATFORM_NAME(PONTEVECCHIO),
> + PLATFORM_NAME(METEORLAKE),
> };
> #undef PLATFORM_NAME
>
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index 1c150cd7dceb..7ba9663213f4 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -89,6 +89,7 @@ enum intel_platform {
> INTEL_XEHPSDV,
> INTEL_DG2,
> INTEL_PONTEVECCHIO,
> + INTEL_METEORLAKE,
> INTEL_MAX_PLATFORMS
> };
>
> --
> 2.25.1
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 15+ messages in thread
* [Intel-gfx] [PATCH v2 2/2] drm/i915/mtl: Add MeteorLake PCI IDs
2022-07-07 20:26 ` [Intel-gfx] [PATCH v2 0/2] i915: Introduce Meteorlake Radhakrishna Sripada
2022-07-07 20:26 ` [Intel-gfx] [PATCH v2 1/2] drm/i915/mtl: Add MeteorLake platform info Radhakrishna Sripada
@ 2022-07-07 20:26 ` Radhakrishna Sripada
2022-07-07 20:48 ` Matt Roper
1 sibling, 1 reply; 15+ messages in thread
From: Radhakrishna Sripada @ 2022-07-07 20:26 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula, lucas.demarchi, rodrigo.vivi
Add Meteorlake PCI IDs. Split into M, and P subplatforms.
v2: Update PCI id's
Bspec: 55420
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
drivers/gpu/drm/i915/i915_drv.h | 4 ++++
drivers/gpu/drm/i915/i915_pci.c | 1 +
drivers/gpu/drm/i915/intel_device_info.c | 14 ++++++++++++++
drivers/gpu/drm/i915/intel_device_info.h | 4 ++++
include/drm/i915_pciids.h | 13 +++++++++++++
5 files changed, 36 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 00998a78a2ba..1744036bab10 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1019,6 +1019,10 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
#define IS_ADLP_RPLP(dev_priv) \
IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPL)
#define IS_METEORLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_METEORLAKE)
+#define IS_METEORLAKE_M(dev_priv) \
+ IS_SUBPLATFORM(dev_priv, INTEL_METEORLAKE, INTEL_SUBPLATFORM_M)
+#define IS_METEORLAKE_P(dev_priv) \
+ IS_SUBPLATFORM(dev_priv, INTEL_METEORLAKE, INTEL_SUBPLATFORM_P)
#define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
(INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
#define IS_BDW_ULT(dev_priv) \
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index 82895ecb25ba..afe88d979cdc 100644
--- a/drivers/gpu/drm/i915/i915_pci.c
+++ b/drivers/gpu/drm/i915/i915_pci.c
@@ -1214,6 +1214,7 @@ static const struct pci_device_id pciidlist[] = {
INTEL_RPLP_IDS(&adl_p_info),
INTEL_DG2_IDS(&dg2_info),
INTEL_ATS_M_IDS(&ats_m_info),
+ INTEL_MTL_IDS(&mtl_info),
{0, 0, 0}
};
MODULE_DEVICE_TABLE(pci, pciidlist);
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 27c343316afa..d98fbbd589aa 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -202,6 +202,14 @@ static const u16 subplatform_g12_ids[] = {
INTEL_DG2_G12_IDS(0),
};
+static const u16 subplatform_m_ids[] = {
+ INTEL_MTL_M_IDS(0),
+};
+
+static const u16 subplatform_p_ids[] = {
+ INTEL_MTL_P_IDS(0),
+};
+
static bool find_devid(u16 id, const u16 *p, unsigned int num)
{
for (; num; num--, p++) {
@@ -256,6 +264,12 @@ void intel_device_info_subplatform_init(struct drm_i915_private *i915)
} else if (find_devid(devid, subplatform_g12_ids,
ARRAY_SIZE(subplatform_g12_ids))) {
mask = BIT(INTEL_SUBPLATFORM_G12);
+ } else if (find_devid(devid, subplatform_m_ids,
+ ARRAY_SIZE(subplatform_m_ids))) {
+ mask = BIT(INTEL_SUBPLATFORM_M);
+ } else if (find_devid(devid, subplatform_p_ids,
+ ARRAY_SIZE(subplatform_p_ids))) {
+ mask = BIT(INTEL_SUBPLATFORM_P);
}
GEM_BUG_ON(mask & ~INTEL_SUBPLATFORM_MASK);
diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
index 7ba9663213f4..23bf230aa104 100644
--- a/drivers/gpu/drm/i915/intel_device_info.h
+++ b/drivers/gpu/drm/i915/intel_device_info.h
@@ -127,6 +127,10 @@ enum intel_platform {
*/
#define INTEL_SUBPLATFORM_N 1
+/* MTL */
+#define INTEL_SUBPLATFORM_M 0
+#define INTEL_SUBPLATFORM_P 1
+
enum intel_ppgtt_type {
INTEL_PPGTT_NONE = I915_GEM_PPGTT_NONE,
INTEL_PPGTT_ALIASING = I915_GEM_PPGTT_ALIASING,
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 1bd0420a213d..6dfeb52f7c6f 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -733,5 +733,18 @@
#define INTEL_ATS_M_IDS(info) \
INTEL_ATS_M150_IDS(info), \
INTEL_ATS_M75_IDS(info)
+/* MTL */
+#define INTEL_MTL_M_IDS(info) \
+ INTEL_VGA_DEVICE(0x7D40, info)
+
+#define INTEL_MTL_P_IDS(info) \
+ INTEL_VGA_DEVICE(0x7D45, info), \
+ INTEL_VGA_DEVICE(0x7D55, info), \
+ INTEL_VGA_DEVICE(0x7D60, info), \
+ INTEL_VGA_DEVICE(0x7DD5, info)
+
+#define INTEL_MTL_IDS(info) \
+ INTEL_MTL_M_IDS(info), \
+ INTEL_MTL_P_IDS(info)
#endif /* _I915_PCIIDS_H */
--
2.25.1
^ permalink raw reply related [flat|nested] 15+ messages in thread* Re: [Intel-gfx] [PATCH v2 2/2] drm/i915/mtl: Add MeteorLake PCI IDs
2022-07-07 20:26 ` [Intel-gfx] [PATCH v2 2/2] drm/i915/mtl: Add MeteorLake PCI IDs Radhakrishna Sripada
@ 2022-07-07 20:48 ` Matt Roper
0 siblings, 0 replies; 15+ messages in thread
From: Matt Roper @ 2022-07-07 20:48 UTC (permalink / raw)
To: Radhakrishna Sripada; +Cc: jani.nikula, intel-gfx, lucas.demarchi, rodrigo.vivi
On Thu, Jul 07, 2022 at 01:26:10PM -0700, Radhakrishna Sripada wrote:
> Add Meteorlake PCI IDs. Split into M, and P subplatforms.
>
> v2: Update PCI id's
>
> Bspec: 55420
>
> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
> drivers/gpu/drm/i915/i915_drv.h | 4 ++++
> drivers/gpu/drm/i915/i915_pci.c | 1 +
> drivers/gpu/drm/i915/intel_device_info.c | 14 ++++++++++++++
> drivers/gpu/drm/i915/intel_device_info.h | 4 ++++
> include/drm/i915_pciids.h | 13 +++++++++++++
> 5 files changed, 36 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 00998a78a2ba..1744036bab10 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -1019,6 +1019,10 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915,
> #define IS_ADLP_RPLP(dev_priv) \
> IS_SUBPLATFORM(dev_priv, INTEL_ALDERLAKE_P, INTEL_SUBPLATFORM_RPL)
> #define IS_METEORLAKE(dev_priv) IS_PLATFORM(dev_priv, INTEL_METEORLAKE)
> +#define IS_METEORLAKE_M(dev_priv) \
> + IS_SUBPLATFORM(dev_priv, INTEL_METEORLAKE, INTEL_SUBPLATFORM_M)
> +#define IS_METEORLAKE_P(dev_priv) \
> + IS_SUBPLATFORM(dev_priv, INTEL_METEORLAKE, INTEL_SUBPLATFORM_P)
> #define IS_HSW_EARLY_SDV(dev_priv) (IS_HASWELL(dev_priv) && \
> (INTEL_DEVID(dev_priv) & 0xFF00) == 0x0C00)
> #define IS_BDW_ULT(dev_priv) \
> diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
> index 82895ecb25ba..afe88d979cdc 100644
> --- a/drivers/gpu/drm/i915/i915_pci.c
> +++ b/drivers/gpu/drm/i915/i915_pci.c
> @@ -1214,6 +1214,7 @@ static const struct pci_device_id pciidlist[] = {
> INTEL_RPLP_IDS(&adl_p_info),
> INTEL_DG2_IDS(&dg2_info),
> INTEL_ATS_M_IDS(&ats_m_info),
> + INTEL_MTL_IDS(&mtl_info),
> {0, 0, 0}
> };
> MODULE_DEVICE_TABLE(pci, pciidlist);
> diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
> index 27c343316afa..d98fbbd589aa 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.c
> +++ b/drivers/gpu/drm/i915/intel_device_info.c
> @@ -202,6 +202,14 @@ static const u16 subplatform_g12_ids[] = {
> INTEL_DG2_G12_IDS(0),
> };
>
> +static const u16 subplatform_m_ids[] = {
> + INTEL_MTL_M_IDS(0),
> +};
> +
> +static const u16 subplatform_p_ids[] = {
> + INTEL_MTL_P_IDS(0),
> +};
> +
> static bool find_devid(u16 id, const u16 *p, unsigned int num)
> {
> for (; num; num--, p++) {
> @@ -256,6 +264,12 @@ void intel_device_info_subplatform_init(struct drm_i915_private *i915)
> } else if (find_devid(devid, subplatform_g12_ids,
> ARRAY_SIZE(subplatform_g12_ids))) {
> mask = BIT(INTEL_SUBPLATFORM_G12);
> + } else if (find_devid(devid, subplatform_m_ids,
> + ARRAY_SIZE(subplatform_m_ids))) {
> + mask = BIT(INTEL_SUBPLATFORM_M);
> + } else if (find_devid(devid, subplatform_p_ids,
> + ARRAY_SIZE(subplatform_p_ids))) {
> + mask = BIT(INTEL_SUBPLATFORM_P);
> }
>
> GEM_BUG_ON(mask & ~INTEL_SUBPLATFORM_MASK);
> diff --git a/drivers/gpu/drm/i915/intel_device_info.h b/drivers/gpu/drm/i915/intel_device_info.h
> index 7ba9663213f4..23bf230aa104 100644
> --- a/drivers/gpu/drm/i915/intel_device_info.h
> +++ b/drivers/gpu/drm/i915/intel_device_info.h
> @@ -127,6 +127,10 @@ enum intel_platform {
> */
> #define INTEL_SUBPLATFORM_N 1
>
> +/* MTL */
> +#define INTEL_SUBPLATFORM_M 0
> +#define INTEL_SUBPLATFORM_P 1
> +
> enum intel_ppgtt_type {
> INTEL_PPGTT_NONE = I915_GEM_PPGTT_NONE,
> INTEL_PPGTT_ALIASING = I915_GEM_PPGTT_ALIASING,
> diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> index 1bd0420a213d..6dfeb52f7c6f 100644
> --- a/include/drm/i915_pciids.h
> +++ b/include/drm/i915_pciids.h
> @@ -733,5 +733,18 @@
> #define INTEL_ATS_M_IDS(info) \
> INTEL_ATS_M150_IDS(info), \
> INTEL_ATS_M75_IDS(info)
> +/* MTL */
> +#define INTEL_MTL_M_IDS(info) \
> + INTEL_VGA_DEVICE(0x7D40, info)
> +
> +#define INTEL_MTL_P_IDS(info) \
> + INTEL_VGA_DEVICE(0x7D45, info), \
> + INTEL_VGA_DEVICE(0x7D55, info), \
> + INTEL_VGA_DEVICE(0x7D60, info), \
It looks like this one is supposed to be in the MTL_M list rather than
the MTL_P list.
Matt
> + INTEL_VGA_DEVICE(0x7DD5, info)
> +
> +#define INTEL_MTL_IDS(info) \
> + INTEL_MTL_M_IDS(info), \
> + INTEL_MTL_P_IDS(info)
>
> #endif /* _I915_PCIIDS_H */
> --
> 2.25.1
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
^ permalink raw reply [flat|nested] 15+ messages in thread