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From: "Wu, Hao" <hao.wu@intel.com>
To: "Martin Hundebøll" <mhu@silicom.dk>,
	"Moritz Fischer" <mdf@kernel.org>,
	"Martin Hundebøll" <martin@geanix.com>
Cc: Tom Rix <trix@redhat.com>, "Xu, Yilun" <yilun.xu@intel.com>,
	Jean Delvare <jdelvare@suse.com>,
	Guenter Roeck <linux@roeck-us.net>,
	Lee Jones <lee.jones@linaro.org>, Mark Brown <broonie@kernel.org>,
	"linux-fpga@vger.kernel.org" <linux-fpga@vger.kernel.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	"linux-hwmon@vger.kernel.org" <linux-hwmon@vger.kernel.org>,
	"linux-spi@vger.kernel.org" <linux-spi@vger.kernel.org>
Subject: RE: [PATCH v2 3/5] spi: spi-altera-dfl: support n5010 feature revision
Date: Tue, 29 Jun 2021 14:37:36 +0000	[thread overview]
Message-ID: <DM6PR11MB38198441F212D6959B676C6D85029@DM6PR11MB3819.namprd11.prod.outlook.com> (raw)
In-Reply-To: <e4f0b534-903c-c95d-876e-389c8fc4852c@silicom.dk>

> On 28/06/2021 19.39, Moritz Fischer wrote:
> > On Fri, Jun 25, 2021 at 09:42:11AM +0200, Martin Hundebøll wrote:
> >> From: Martin Hundebøll<mhu@silicom.dk>
> >>
> >> The Max10 BMC on the Silicom n5010 PAC is slightly different than the
> >> existing BMC's, so use a dedicated feature revision detect it.
> >>
> >> Signed-off-by: Martin Hundebøll<mhu@silicom.dk>
> >> ---
> >>
> >> Changes since v1:
> >>   * use feature revision from struct dfl_device instead of reading it
> >>     from io-mem
> >>
> >>   drivers/spi/spi-altera-dfl.c | 15 +++++++++++++--
> >>   1 file changed, 13 insertions(+), 2 deletions(-)
> >>
> >> diff --git a/drivers/spi/spi-altera-dfl.c b/drivers/spi/spi-altera-dfl.c
> >> index 3e32e4fe5895..f6cf7c8d9dac 100644
> >> --- a/drivers/spi/spi-altera-dfl.c
> >> +++ b/drivers/spi/spi-altera-dfl.c
> >> @@ -111,6 +111,13 @@ static struct spi_board_info m10_bmc_info = {
> >>   	.chip_select = 0,
> >>   };
> >>
> >> +static struct spi_board_info m10_n5010_bmc_info = {
> >> +	.modalias = "m10-n5010",
> >> +	.max_speed_hz = 12500000,
> >> +	.bus_num = 0,
> >> +	.chip_select = 0,
> >> +};
> > Is there no way to query the mc for version info?
> 
> Do you mean reading the BMC variant (i.e. n5010 / d5005 / n3000) from a
> register?
> 
> Not in a uniform way across the different boards that I'm aware of. But
> isn't this what the DFL feature revision is meant for?

If this is used to distinguish different boards, then revision (4bits?) may not
be enough. New version DFH may be able to resolve this limitation, but it
is always encouraged to have its own method to tell if possible, not depending
on DFH, it makes this IP easy to be reused in non DFL case. 

Thanks
Hao

> 
> // Martin

  reply	other threads:[~2021-06-29 14:37 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-06-25  7:42 [PATCH v2 0/5] fpga/mfd/hwmon: Initial support for Silicom N5010 PAC Martin Hundebøll
2021-06-25  7:42 ` [PATCH v2 1/5] fpga: dfl: pci: add device IDs for Silicom N501x PAC cards Martin Hundebøll
2021-06-25 18:43   ` Moritz Fischer
2021-06-25  7:42 ` [PATCH v2 2/5] fpga: dfl: expose feature revision from struct dfl_device Martin Hundebøll
2021-06-25 19:26   ` Moritz Fischer
2021-06-28  3:38     ` Wu, Hao
2021-06-25  7:42 ` [PATCH v2 3/5] spi: spi-altera-dfl: support n5010 feature revision Martin Hundebøll
2021-06-28  5:58   ` Xu Yilun
2021-06-28 17:39   ` Moritz Fischer
2021-06-29 11:35     ` Mark Brown
2021-06-29 11:49     ` Martin Hundebøll
2021-06-29 14:37       ` Wu, Hao [this message]
2021-06-29 22:30         ` matthew.gerlach
2021-06-25  7:42 ` [PATCH v2 4/5] mfd: intel-m10-bmc: add n5010 variant Martin Hundebøll
2021-06-25 18:45   ` Moritz Fischer
2021-06-29  1:39     ` Xu Yilun
2021-06-28  5:59   ` Xu Yilun
2021-06-28 10:33     ` Lee Jones
2021-06-30 10:57   ` Lee Jones
2021-06-25  7:42 ` [PATCH v2 5/5] hwmon: intel-m10-bmc-hwmon: add n5010 sensors Martin Hundebøll
2021-06-28  6:00   ` Xu Yilun
2021-06-28 14:11     ` Guenter Roeck
2021-06-28 16:35   ` Guenter Roeck
2021-06-28 17:28     ` Moritz Fischer
2021-06-29  1:40       ` Xu Yilun

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