Problems booting 2.6.7 Dom0 with 3ware Controllers

Problems booting 2.6.7 Dom0 with 3ware Controllers

[Sven Kretzschmar]

I tried to install and boot a 2.6.7 Dom0 xenLinux Kernel on an
SMP (Dual-Xeon) Machine with 2 3-ware Controllers installed
(1 4-channel Controler and 1 8-channel Controler, both Parallel ATA)
and no other HDs present (except the ones connected to the
3ware controlers, of course).

First of all I got a compilation error after activating the SMP option
in the kernel config.
After deactivating the SMP option, compile + install worked.

Does the 2.6.7 xenLinux Dom0 Kernel support SMP at all ?

During boot, the boot process of the newly installed kernel
showed that it recognizes the two 3ware Controlers, but then reports the
following errors:
3w-xxxx: scsi0: Unit #0: Command(c7f92b00) timed out, resetting card.
3w-xxxx: scsi0: Unit #0: Command(c7f92b00) timed out, resetting card.
3w-xxxx: scsi0: Reset succeeded.

Then it freezes and nothing more happens.
I would have liked to try it with the 3ware driver compiled in as a module,
but it seems that the Dom0-Kernel does not support booting with an intrd ??
(root device is on sda1, which is on one of the 3ware controlers).

When I boot with a vanilla 2.6.7 kernel on the same machine (also with
SMP disabled and 3ware device drivers not configured as module) everthing
works fine, and the machine boots ??
Btw: It also works with a 2.6.7 vanilla kernel configured with SMP and/or
3ware driver configured as module.

Is the SMP issue with Dom0 2.6.7 and the 3ware Problem known ?
Has anybody tried to boot a 2.6.7 Dom0 Kernel from a 3ware Controler ?
Is there no way to boot a Dom0 Kernel with an intrd ?
Btw: The boot device is a striped + mirrored RAID 10, so I wonder how it
could boot the kernel at all that far, if the drivers dont work ?!

Sven




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Re: Problems booting 2.6.7 Dom0 with 3ware Controllers

[Ian Pratt]

> 
> I tried to install and boot a 2.6.7 Dom0 xenLinux Kernel on an
> SMP (Dual-Xeon) Machine with 2 3-ware Controllers installed
> (1 4-channel Controler and 1 8-channel Controler, both Parallel ATA)
> and no other HDs present (except the ones connected to the
> 3ware controlers, of course).
> 
> First of all I got a compilation error after activating the SMP option
> in the kernel config.
> After deactivating the SMP option, compile + install worked.
> 
> Does the 2.6.7 xenLinux Dom0 Kernel support SMP at all ?

Although Xen supports SMP machines, each guest OS kernel must be
uniprocessor. Post-2.0 that's something we plan to address, but
for now you'll have to make do with running uni-processor
guestOSes on each CPU.

Ensuring strict protection is maintained while running SMP guests
is actually quite a challenge, but one we've thought pretty hard
about and have some neat solutions ready to implement. 

Ian


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Re: Problems booting 2.6.7 Dom0 with 3ware Controllers

[Keir Fraser]

> First of all I got a compilation error after activating the SMP option
> in the kernel config.
> After deactivating the SMP option, compile + install worked.
> 
> Does the 2.6.7 xenLinux Dom0 Kernel support SMP at all ?

No, I'll remove it from the config options. It will get added later
when Xen supports SMP guest OSes.

> Is there no way to boot a Dom0 Kernel with an intrd ?

I'll add the support to 2.6 -- 2.4 already has it and it's very
simple.

I'm also going to look at your segfault issues.

 -- Keir


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Re: Problems booting 2.6.7 Dom0 with 3ware Controllers

[Keir Fraser]

So, I think most of your problems are in hand or solved:

 1. Segfaults without 'nosegfixup':
    I'm working on it, and will hopefully have a fix tomorow.
 2. Segfaults in hwclock/kudzu: FIXED
 3. Bogus config options (e.g., SMP): FIXED (just removed for now)

The only one we don't have a handle on is your non-operational 3ware
controller. If you build a Linux-2.4 for Xen, does it work then?

A useful thing would be full boot logs from Xen and Linux-2.6-xen,
versus a full boot log from Linux-2.6-native. If you do this, please
build Xen with 'debug=y make' as it prints a load more useful info as
it boots.

 -- Keir

> 
> > First of all I got a compilation error after activating the SMP option
> > in the kernel config.
> > After deactivating the SMP option, compile + install worked.
> > 
> > Does the 2.6.7 xenLinux Dom0 Kernel support SMP at all ?
> 
> No, I'll remove it from the config options. It will get added later
> when Xen supports SMP guest OSes.
> 
> > Is there no way to boot a Dom0 Kernel with an intrd ?
> 
> I'll add the support to 2.6 -- 2.4 already has it and it's very
> simple.
> 
> I'm also going to look at your segfault issues.
> 
>  -- Keir
> 
> 
> -------------------------------------------------------
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> Linux.com, ITManagersJournal and NewsForge in the past few weeks? Now,
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> _______________________________________________
> Xen-devel mailing list
> Xen-devel@lists.sourceforge.net
> https://lists.sourceforge.net/lists/listinfo/xen-devel



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Problems booting on a Dual-Xeon with 2.4 and 2.6 kernels

[Sven Kretzschmar]

I tried to make xen work on a dual-Xeon (1 Gig RAM, 2 3ware ATA-Raid Controlers)
with both 2.4.26 and 2.6.7 kernels, but had no success :-(

I cloned the newest repository (CSet 1.1183) in an empty dir and only did:

1.) make world
2.) make linux26
3.) make install

Then during boot of the 2.6 kernel I got the following message during boot:

fixmap and kmap areas overlap - this will crash
pkstart: ff800000h pkend: ffc00000h fixstart fbeec000h
...
kernel BUG at arch/xen/i386/mm/init.c:583!
invalid operand: 0000 [#1]
...
<0>Kernel panic: Attempted to kill the idel task!
In idle task - not syncing


When booting with the 2.4 kernel I get the same errors as I got earlier with
trying to boot a 2.6. xen kernel on the same machine (with older CSets)
- however I had to add the 3ware drivers to the 2.4 kernel config first, it
was not included by default - :

During boot, the boot process of the newly installed kernel
showed that it recognizes the two 3ware Controlers, but then reports the
following errors:
3w-xxxx: scsi0: Unit #0: Command(c7f92b00) timed out, resetting card.
3w-xxxx: scsi0: Unit #0: Command(c7f92b00) timed out, resetting card.
3w-xxxx: scsi0: Reset succeeded.

Then it freezes and nothing more happens.
I don't know if the boot process would have continued without the 3ware
drivers, because I have no non-raid disks in this machine...


On other _uniprocessor_ machines with standard ATA-drives both kernels boot
(but I still have the segfault problems with 2.6 kernels, which I reported earlier, with
the 2.4 kernel I had no segfaults on these machines).

It seems that the Dual-Xeon machine with 3ware Raid-Controler is a very challenging
configuration for XenLinux, which discoveres some potential bugs/problems ;-)

Anybody else had problems booting the newer CSets on SMP machines ?

Sven

P.S.: As I was using the newest CSets (1.1183) SMP was disabled in the kernel configs, while
        I was booting on the Dual-Xeon machine.




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Re: Problems booting on a Dual-Xeon with 2.4 and 2.6 kernels

[Christian Limpach]

On Mon, Aug 09, 2004 at 10:45:17PM +0200, Sven Kretzschmar wrote:
> 
> I tried to make xen work on a dual-Xeon (1 Gig RAM, 2 3ware ATA-Raid Controlers)
> with both 2.4.26 and 2.6.7 kernels, but had no success :-(
> 
> I cloned the newest repository (CSet 1.1183) in an empty dir and only did:
> 
> 1.) make world
> 2.) make linux26
> 3.) make install
> 
> Then during boot of the 2.6 kernel I got the following message during boot:
> 
> fixmap and kmap areas overlap - this will crash
> pkstart: ff800000h pkend: ffc00000h fixstart fbeec000h
> ...
> kernel BUG at arch/xen/i386/mm/init.c:583!
> invalid operand: 0000 [#1]
> ...
> <0>Kernel panic: Attempted to kill the idel task!
> In idle task - not syncing

That's very odd, because this code is only enable with CONFIG_HIGHMEM
and that's not enabled in 2.6 (and also broken for at least one reason).
I guess the build picked up an old .config or install/boot/config* file,
which is odd since you write that you cloned to an empty dir.  Could
you please compare your .config file with the default config file we
provide at linux-2.6.7-xen-sparse/arch/xen/configs/xen0_defconfig
(i.e run diff -u linux-2.6.7-xen0/.config linux-2.6.7-xen-sparse/arch/xen/configs/xen0_defconfig)

> When booting with the 2.4 kernel I get the same errors as I got earlier with
> trying to boot a 2.6. xen kernel on the same machine (with older CSets)
> - however I had to add the 3ware drivers to the 2.4 kernel config first, it
> was not included by default - :

Could you boot without Xen (native 2.4 or 2.6 kernel, with smp support)
and then send the output of lspci -v?
 
> It seems that the Dual-Xeon machine with 3ware Raid-Controler is a very challenging
> configuration for XenLinux, which discoveres some potential bugs/problems ;-)
> Anybody else had problems booting the newer CSets on SMP machines ?

Not really, most of our machines are SMP.  None of them have 3ware
Raid-Controllers and I don't really think it matters wether it's an
SMP machine or not.

> P.S.: As I was using the newest CSets (1.1183) SMP was disabled in the kernel configs, while
>         I was booting on the Dual-Xeon machine.

yes, and that's how it's supposed to be:  Domain kernels cannot use
multiple CPUs but Xen has support for SMP, and if you run multiple
domains, you can have each run on a different CPUs.

    christian



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Re: Problems booting on a Dual-Xeon with 2.4 and 2.6 kernels

[Sven Kretzschmar]

[-- Attachment #1: Type: text/plain, Size: 31215 bytes --]

Ok, here are the outputs:

1.) the config diffs (I can not garantee any more that this is an orginal .config,
     because I now already tried some things to make it perhaps work..., however it's still
     CONFIG_NOHIGHMEM=y ?!):
2.) Output of lspci -v
3.) Output of lspci -vv

I also included these files as an attachment

>> P.S.: As I was using the newest CSets (1.1183) SMP was disabled in the
>kernel configs, while
>>         I was booting on the Dual-Xeon machine.
>yes, and that's how it's supposed to be:  Domain kernels cannot use
>multiple CPUs but Xen has support for SMP, and if you run multiple
>domains, you can have each run on a different CPUs.
Yes, Ian has explained that to me ;-) I just wanted to say that I did not
try any tricks with the config files of the new CSets to make SMP "work"
again... ;-)

1.):

--- linux-2.6.7-xen0/.config	2004-08-09 22:41:11.000000000 +0200
+++ linux-2.6.7-xen-sparse/arch/xen/configs/xen0_defconfig	2004-08-09 21:43:46.000000000 +0200
@@ -62,6 +62,11 @@
 CONFIG_MMU=y
 CONFIG_UID16=y
 CONFIG_GENERIC_ISA_DMA=y
+# CONFIG_M386 is not set
+# CONFIG_M486 is not set
+# CONFIG_M586 is not set
+# CONFIG_M586TSC is not set
+# CONFIG_M586MMX is not set
 # CONFIG_M686 is not set
 # CONFIG_MPENTIUMII is not set
 # CONFIG_MPENTIUMIII is not set
@@ -71,6 +76,9 @@
 # CONFIG_MK7 is not set
 # CONFIG_MK8 is not set
 # CONFIG_MCRUSOE is not set
+# CONFIG_MWINCHIPC6 is not set
+# CONFIG_MWINCHIP2 is not set
+# CONFIG_MWINCHIP3D is not set
 # CONFIG_MCYRIXIII is not set
 # CONFIG_MVIAC3_2 is not set
 # CONFIG_X86_GENERIC is not set
@@ -97,6 +105,7 @@
 # CONFIG_EDD is not set
 CONFIG_NOHIGHMEM=y
 # CONFIG_HIGHMEM4G is not set
+# CONFIG_HIGHMEM64G is not set
 CONFIG_HAVE_DEC_LOCK=y
 # CONFIG_REGPARM is not set

@@ -238,7 +247,7 @@
 # CONFIG_CHR_DEV_ST is not set
 # CONFIG_CHR_DEV_OSST is not set
 # CONFIG_BLK_DEV_SR is not set
-CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SG is not set

 #
 # Some SCSI devices (e.g. CD jukebox) support multiple LUNs
@@ -261,16 +270,38 @@
 # CONFIG_SCSI_ACARD is not set
 # CONFIG_SCSI_AHA152X is not set
 # CONFIG_SCSI_AHA1542 is not set
-# CONFIG_SCSI_AACRAID is not set
-# CONFIG_SCSI_AIC7XXX is not set
+CONFIG_SCSI_AACRAID=y
+CONFIG_SCSI_AIC7XXX=y
+CONFIG_AIC7XXX_CMDS_PER_DEVICE=32
+CONFIG_AIC7XXX_RESET_DELAY_MS=15000
+# CONFIG_AIC7XXX_BUILD_FIRMWARE is not set
+CONFIG_AIC7XXX_DEBUG_ENABLE=y
+CONFIG_AIC7XXX_DEBUG_MASK=0
+CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
 # CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_AIC79XX is not set
+CONFIG_SCSI_AIC79XX=y
+CONFIG_AIC79XX_CMDS_PER_DEVICE=32
+CONFIG_AIC79XX_RESET_DELAY_MS=15000
+# CONFIG_AIC79XX_BUILD_FIRMWARE is not set
+# CONFIG_AIC79XX_ENABLE_RD_STRM is not set
+CONFIG_AIC79XX_DEBUG_ENABLE=y
+CONFIG_AIC79XX_DEBUG_MASK=0
+CONFIG_AIC79XX_REG_PRETTY_PRINT=y
 # CONFIG_SCSI_DPT_I2O is not set
 # CONFIG_SCSI_ADVANSYS is not set
 # CONFIG_SCSI_IN2000 is not set
-# CONFIG_SCSI_MEGARAID is not set
-# CONFIG_SCSI_SATA is not set
-# CONFIG_SCSI_BUSLOGIC is not set
+CONFIG_SCSI_MEGARAID=y
+CONFIG_SCSI_SATA=y
+# CONFIG_SCSI_SATA_SVW is not set
+CONFIG_SCSI_ATA_PIIX=y
+CONFIG_SCSI_SATA_PROMISE=y
+CONFIG_SCSI_SATA_SX4=y
+CONFIG_SCSI_SATA_SIL=y
+# CONFIG_SCSI_SATA_SIS is not set
+# CONFIG_SCSI_SATA_VIA is not set
+# CONFIG_SCSI_SATA_VITESSE is not set
+CONFIG_SCSI_BUSLOGIC=y
+# CONFIG_SCSI_OMIT_FLASHPOINT is not set
 # CONFIG_SCSI_CPQFCTS is not set
 # CONFIG_SCSI_DMX3191D is not set
 # CONFIG_SCSI_DTC3280 is not set

2.):

00:00.0 Host bridge: Intel Corp. E7501 Memory Controller Hub (rev 01)
	Flags: bus master, fast devsel, latency 0
	Capabilities: [40] #09 [1105]

00:02.0 PCI bridge: Intel Corp. E7000 Series Hub Interface B PCI-to-PCI Bridge (rev 01) (prog-if 00 [Normal decode])
	Flags: bus master, 66Mhz, fast devsel, latency 64
	Bus: primary=00, secondary=05, subordinate=07, sec-latency=0
	I/O behind bridge: 0000d000-0000dfff
	Memory behind bridge: fe800000-feafffff
	Prefetchable memory behind bridge: ff700000-ff9fffff
	Expansion ROM at 0000d000 [disabled] [size=4K]

00:03.0 PCI bridge: Intel Corp. E7000 Series Hub Interface C PCI-to-PCI Bridge (rev 01) (prog-if 00 [Normal decode])
	Flags: bus master, 66Mhz, fast devsel, latency 64
	Bus: primary=00, secondary=02, subordinate=04, sec-latency=0
	I/O behind bridge: 0000b000-0000cfff
	Memory behind bridge: fc500000-fe7fffff
	Prefetchable memory behind bridge: ff400000-ff6fffff
	Expansion ROM at 0000b000 [disabled] [size=8K]

00:1d.0 USB Controller: Intel Corp. 82801CA/CAM USB (Hub #1) (rev 02) (prog-if 00 [UHCI])
	Subsystem: Intel Corp.: Unknown device 2480
	Flags: bus master, medium devsel, latency 0, IRQ 16
	I/O ports at e800 [size=32]

00:1e.0 PCI bridge: Intel Corp. 82801BA/CA/DB/EB/ER Hub interface to PCI Bridge (rev 42) (prog-if 00 [Normal decode])
	Flags: bus master, fast devsel, latency 0
	Bus: primary=00, secondary=01, subordinate=01, sec-latency=32
	I/O behind bridge: 00009000-0000afff
	Memory behind bridge: fa400000-fc4fffff
	Prefetchable memory behind bridge: ff300000-ff3fffff

00:1f.0 ISA bridge: Intel Corp. 82801CA LPC Interface Controller (rev 02)
	Flags: bus master, medium devsel, latency 0

00:1f.1 IDE interface: Intel Corp. 82801CA Ultra ATA Storage Controller (rev 02) (prog-if 8a [Master SecP PriP])
	Subsystem: Intel Corp.: Unknown device 2480
	Flags: bus master, medium devsel, latency 0, IRQ 18
	I/O ports at <unassigned>
	I/O ports at <unassigned>
	I/O ports at <unassigned>
	I/O ports at <unassigned>
	I/O ports at ffa0 [size=16]
	Memory at 40000000 (32-bit, non-prefetchable) [size=1K]

00:1f.3 SMBus: Intel Corp. 82801CA/CAM SMBus Controller (rev 02)
	Subsystem: Intel Corp.: Unknown device 2480
	Flags: medium devsel, IRQ 17
	I/O ports at 0540 [size=32]

01:01.0 Ethernet controller: Intel Corp. 82557/8/9 [Ethernet Pro 100] (rev 10)
	Subsystem: Intel Corp. EtherExpress PRO/100 S Server Adapter
	Flags: bus master, medium devsel, latency 64, IRQ 19
	Memory at fc4fd000 (32-bit, non-prefetchable)
	I/O ports at a000 [size=64]
	Memory at fc4a0000 (32-bit, non-prefetchable) [size=128K]
	Capabilities: [dc] Power Management version 2

01:02.0 VGA compatible controller: ATI Technologies Inc Rage XL (rev 27) (prog-if 00 [VGA])
	Subsystem: ATI Technologies Inc Rage XL
	Flags: bus master, stepping, medium devsel, latency 64, IRQ 18
	Memory at fb000000 (32-bit, non-prefetchable) [size=fc4c0000]
	I/O ports at a800 [size=256]
	Memory at fc4ff000 (32-bit, non-prefetchable) [size=4K]
	Expansion ROM at 00020000 [disabled]
	Capabilities: [5c] Power Management version 2

01:03.0 Ethernet controller: Peppercon AG ROL/F-100 Fast Ethernet Adapter with ROL (rev 10)
	Subsystem: Realtek Semiconductor Co., Ltd.: Unknown device 8139
	Flags: bus master, medium devsel, latency 64, IRQ 18
	I/O ports at a400 [size=fc4e0000]
	Memory at fc4fec00 (32-bit, non-prefetchable) [size=256]
	Expansion ROM at 00010000 [disabled]
	Capabilities: [50] Power Management version 2

02:1c.0 PIC: Intel Corp. 82870P2 P64H2 I/OxAPIC (rev 04) (prog-if 20 [IO(X)-APIC])
	Subsystem: Intel Corp. 82870P2 P64H2 I/OxAPIC
	Flags: bus master, 66Mhz, fast devsel, latency 0
	Memory at fe7fe000 (32-bit, non-prefetchable)
	Capabilities: [50] PCI-X non-bridge device.

02:1d.0 PCI bridge: Intel Corp. 82870P2 P64H2 Hub PCI Bridge (rev 04) (prog-if 00 [Normal decode])
	Flags: bus master, 66Mhz, fast devsel, latency 64
	Bus: primary=02, secondary=04, subordinate=04, sec-latency=64
	I/O behind bridge: 0000c000-0000cfff
	Memory behind bridge: fd600000-fe6fffff
	Prefetchable memory behind bridge: 00000000ff500000-00000000ff500000
	Expansion ROM at 0000c000 [disabled] [size=4K]
	Capabilities: [50] PCI-X bridge device.

02:1e.0 PIC: Intel Corp. 82870P2 P64H2 I/OxAPIC (rev 04) (prog-if 20 [IO(X)-APIC])
	Subsystem: Intel Corp. 82870P2 P64H2 I/OxAPIC
	Flags: bus master, 66Mhz, fast devsel, latency 0
	Memory at fe7ff000 (32-bit, non-prefetchable)
	Capabilities: [50] PCI-X non-bridge device.

02:1f.0 PCI bridge: Intel Corp. 82870P2 P64H2 Hub PCI Bridge (rev 04) (prog-if 00 [Normal decode])
	Flags: bus master, 66Mhz, fast devsel, latency 64
	Bus: primary=02, secondary=03, subordinate=03, sec-latency=64
	I/O behind bridge: 0000b000-0000bfff
	Memory behind bridge: fc500000-fd5fffff
	Prefetchable memory behind bridge: 00000000ff400000-00000000ff400000
	Expansion ROM at 0000b000 [disabled] [size=4K]
	Capabilities: [50] PCI-X bridge device.

03:03.0 RAID bus controller: 3ware Inc 3ware 7000-series ATA-RAID (rev 01)
	Subsystem: 3ware Inc 3ware 7000-series ATA-RAID
	Flags: bus master, 66Mhz, medium devsel, latency 64, IRQ 72
	I/O ports at b800 [size=fd5e0000]
	Memory at fd5ffc00 (32-bit, non-prefetchable) [size=16]
	Memory at fc800000 (32-bit, non-prefetchable) [size=8M]
	Expansion ROM at 00010000 [disabled]
	Capabilities: [40] Power Management version 1

04:03.0 RAID bus controller: 3ware Inc 3ware 7000-series ATA-RAID (rev 01)
	Subsystem: 3ware Inc 3ware 7000-series ATA-RAID
	Flags: bus master, medium devsel, latency 64, IRQ 96
	I/O ports at c800 [size=fe6e0000]
	Memory at fe6ffc00 (32-bit, non-prefetchable) [size=16]
	Memory at fd800000 (32-bit, non-prefetchable) [size=8M]
	Expansion ROM at 00010000 [disabled]
	Capabilities: [40] Power Management version 1

05:1c.0 PIC: Intel Corp. 82870P2 P64H2 I/OxAPIC (rev 04) (prog-if 20 [IO(X)-APIC])
	Subsystem: Intel Corp. 82870P2 P64H2 I/OxAPIC
	Flags: bus master, 66Mhz, fast devsel, latency 0
	Memory at feafe000 (32-bit, non-prefetchable)
	Capabilities: [50] PCI-X non-bridge device.

05:1d.0 PCI bridge: Intel Corp. 82870P2 P64H2 Hub PCI Bridge (rev 04) (prog-if 00 [Normal decode])
	Flags: bus master, 66Mhz, fast devsel, latency 64
	Bus: primary=05, secondary=07, subordinate=07, sec-latency=64
	I/O behind bridge: 0000d000-0000dfff
	Memory behind bridge: fe900000-fe9fffff
	Prefetchable memory behind bridge: 00000000ff800000-00000000ff800000
	Expansion ROM at 0000d000 [disabled] [size=4K]
	Capabilities: [50] PCI-X bridge device.

05:1e.0 PIC: Intel Corp. 82870P2 P64H2 I/OxAPIC (rev 04) (prog-if 20 [IO(X)-APIC])
	Subsystem: Intel Corp. 82870P2 P64H2 I/OxAPIC
	Flags: bus master, 66Mhz, fast devsel, latency 0
	Memory at feaff000 (32-bit, non-prefetchable)
	Capabilities: [50] PCI-X non-bridge device.

05:1f.0 PCI bridge: Intel Corp. 82870P2 P64H2 Hub PCI Bridge (rev 04) (prog-if 00 [Normal decode])
	Flags: bus master, 66Mhz, fast devsel, latency 64
	Bus: primary=05, secondary=06, subordinate=06, sec-latency=64
	Memory behind bridge: fe800000-fe8fffff
	Prefetchable memory behind bridge: 00000000ff700000-00000000ff700000
	Capabilities: [50] PCI-X bridge device.

06:03.0 FireWire (IEEE 1394): NEC Corporation IEEE 1394 Host Controller (rev 01) (prog-if 10 [OHCI])
	Subsystem: NEC Corporation: Unknown device 00ce
	Flags: bus master, medium devsel, latency 64, IRQ 24
	Memory at fe8ff000 (32-bit, non-prefetchable)
	Capabilities: [60] Power Management version 2

07:01.0 Ethernet controller: Intel Corp. 82546EB Gigabit Ethernet Controller (Copper) (rev 01)
	Subsystem: Intel Corp. PRO/1000 MT Dual Port Server Adapter
	Flags: bus master, 66Mhz, medium devsel, latency 64, IRQ 48
	Memory at fe9a0000 (64-bit, non-prefetchable)
	I/O ports at d400 [size=64]
	Capabilities: [dc] Power Management version 2
	Capabilities: [e4] PCI-X non-bridge device.
	Capabilities: [f0] Message Signalled Interrupts: 64bit+ Queue=0/0 Enable-

07:01.1 Ethernet controller: Intel Corp. 82546EB Gigabit Ethernet Controller (Copper) (rev 01)
	Subsystem: Intel Corp. PRO/1000 MT Dual Port Server Adapter
	Flags: bus master, 66Mhz, medium devsel, latency 64, IRQ 49
	Memory at fe9e0000 (64-bit, non-prefetchable)
	I/O ports at d800 [size=64]
	Capabilities: [dc] Power Management version 2
	Capabilities: [e4] PCI-X non-bridge device.
	Capabilities: [f0] Message Signalled Interrupts: 64bit+ Queue=0/0 Enable-

3.):

00:00.0 Host bridge: Intel Corp. E7501 Memory Controller Hub (rev 01)
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 0
	Capabilities: [40] #09 [1105]

00:02.0 PCI bridge: Intel Corp. E7000 Series Hub Interface B PCI-to-PCI Bridge (rev 01) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap- 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64
	Bus: primary=00, secondary=05, subordinate=07, sec-latency=0
	I/O behind bridge: 0000d000-0000dfff
	Memory behind bridge: fe800000-feafffff
	Prefetchable memory behind bridge: ff700000-ff9fffff
	Expansion ROM at 0000d000 [disabled] [size=4K]
	BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B-

00:03.0 PCI bridge: Intel Corp. E7000 Series Hub Interface C PCI-to-PCI Bridge (rev 01) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap- 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64
	Bus: primary=00, secondary=02, subordinate=04, sec-latency=0
	I/O behind bridge: 0000b000-0000cfff
	Memory behind bridge: fc500000-fe7fffff
	Prefetchable memory behind bridge: ff400000-ff6fffff
	Expansion ROM at 0000b000 [disabled] [size=8K]
	BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B-

00:1d.0 USB Controller: Intel Corp. 82801CA/CAM USB (Hub #1) (rev 02) (prog-if 00 [UHCI])
	Subsystem: Intel Corp.: Unknown device 2480
	Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
	Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 0
	Interrupt: pin A routed to IRQ 16
	Region 4: I/O ports at e800 [size=32]

00:1e.0 PCI bridge: Intel Corp. 82801BA/CA/DB/EB/ER Hub interface to PCI Bridge (rev 42) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 0
	Bus: primary=00, secondary=01, subordinate=01, sec-latency=32
	I/O behind bridge: 00009000-0000afff
	Memory behind bridge: fa400000-fc4fffff
	Prefetchable memory behind bridge: ff300000-ff3fffff
	BridgeCtl: Parity- SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B-

00:1f.0 ISA bridge: Intel Corp. 82801CA LPC Interface Controller (rev 02)
	Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
	Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 0

00:1f.1 IDE interface: Intel Corp. 82801CA Ultra ATA Storage Controller (rev 02) (prog-if 8a [Master SecP PriP])
	Subsystem: Intel Corp.: Unknown device 2480
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
	Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 0
	Interrupt: pin A routed to IRQ 18
	Region 0: I/O ports at <unassigned>
	Region 1: I/O ports at <unassigned>
	Region 2: I/O ports at <unassigned>
	Region 3: I/O ports at <unassigned>
	Region 4: I/O ports at ffa0 [size=16]
	Region 5: Memory at 40000000 (32-bit, non-prefetchable) [size=1K]

00:1f.3 SMBus: Intel Corp. 82801CA/CAM SMBus Controller (rev 02)
	Subsystem: Intel Corp.: Unknown device 2480
	Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
	Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Interrupt: pin B routed to IRQ 17
	Region 4: I/O ports at 0540 [size=32]

01:01.0 Ethernet controller: Intel Corp. 82557/8/9 [Ethernet Pro 100] (rev 10)
	Subsystem: Intel Corp. EtherExpress PRO/100 S Server Adapter
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64 (2000ns min, 14000ns max), Cache Line Size 10
	Interrupt: pin A routed to IRQ 19
	Region 0: Memory at fc4fd000 (32-bit, non-prefetchable)
	Region 1: I/O ports at a000 [size=64]
	Region 2: Memory at fc4a0000 (32-bit, non-prefetchable) [size=128K]
	Capabilities: [dc] Power Management version 2
		Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
		Status: D0 PME-Enable+ DSel=0 DScale=2 PME-

01:02.0 VGA compatible controller: ATI Technologies Inc Rage XL (rev 27) (prog-if 00 [VGA])
	Subsystem: ATI Technologies Inc Rage XL
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B-
	Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64 (2000ns min), Cache Line Size 10
	Interrupt: pin A routed to IRQ 18
	Region 0: Memory at fb000000 (32-bit, non-prefetchable) [size=fc4c0000]
	Region 1: I/O ports at a800 [size=256]
	Region 2: Memory at fc4ff000 (32-bit, non-prefetchable) [size=4K]
	Expansion ROM at 00020000 [disabled]
	Capabilities: [5c] Power Management version 2
		Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
		Status: D0 PME-Enable- DSel=0 DScale=0 PME-

01:03.0 Ethernet controller: Peppercon AG ROL/F-100 Fast Ethernet Adapter with ROL (rev 10)
	Subsystem: Realtek Semiconductor Co., Ltd.: Unknown device 8139
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64 (8000ns min, 16000ns max)
	Interrupt: pin A routed to IRQ 18
	Region 0: I/O ports at a400 [size=fc4e0000]
	Region 1: Memory at fc4fec00 (32-bit, non-prefetchable) [size=256]
	Expansion ROM at 00010000 [disabled]
	Capabilities: [50] Power Management version 2
		Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
		Status: D0 PME-Enable- DSel=0 DScale=0 PME-

02:1c.0 PIC: Intel Corp. 82870P2 P64H2 I/OxAPIC (rev 04) (prog-if 20 [IO(X)-APIC])
	Subsystem: Intel Corp. 82870P2 P64H2 I/OxAPIC
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 0
	Region 0: Memory at fe7fe000 (32-bit, non-prefetchable)
	Capabilities: [50] PCI-X non-bridge device.
		Command: DPERE- ERO- RBC=0 OST=0
		Status: Bus=2 Dev=28 Func=0 64bit+ 133MHz+ SCD- USC-, DC=simple, DMMRBC=0, DMOST=0, DMCRS=0, RSCEM-

02:1d.0 PCI bridge: Intel Corp. 82870P2 P64H2 Hub PCI Bridge (rev 04) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64, Cache Line Size 10
	Bus: primary=02, secondary=04, subordinate=04, sec-latency=64
	I/O behind bridge: 0000c000-0000cfff
	Memory behind bridge: fd600000-fe6fffff
	Prefetchable memory behind bridge: 00000000ff500000-00000000ff500000
	Expansion ROM at 0000c000 [disabled] [size=4K]
	BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B-
	Capabilities: [50] PCI-X bridge device.
		Secondary Status: 64bit+, 133MHz+, SCD-, USC-, SCO-, SRD- Freq=0
		Status: Bus=2 Dev=29 Func=0 64bit+ 133MHz+ SCD- USC-, SCO-, SRD-
		: Upstream: Capacity=65535, Commitment Limit=65535
		: Downstream: Capacity=65535, Commitment Limit=65535

02:1e.0 PIC: Intel Corp. 82870P2 P64H2 I/OxAPIC (rev 04) (prog-if 20 [IO(X)-APIC])
	Subsystem: Intel Corp. 82870P2 P64H2 I/OxAPIC
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 0
	Region 0: Memory at fe7ff000 (32-bit, non-prefetchable)
	Capabilities: [50] PCI-X non-bridge device.
		Command: DPERE- ERO- RBC=0 OST=0
		Status: Bus=2 Dev=30 Func=0 64bit+ 133MHz+ SCD- USC-, DC=simple, DMMRBC=0, DMOST=0, DMCRS=0, RSCEM-

02:1f.0 PCI bridge: Intel Corp. 82870P2 P64H2 Hub PCI Bridge (rev 04) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64, Cache Line Size 10
	Bus: primary=02, secondary=03, subordinate=03, sec-latency=64
	I/O behind bridge: 0000b000-0000bfff
	Memory behind bridge: fc500000-fd5fffff
	Prefetchable memory behind bridge: 00000000ff400000-00000000ff400000
	Expansion ROM at 0000b000 [disabled] [size=4K]
	BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B-
	Capabilities: [50] PCI-X bridge device.
		Secondary Status: 64bit+, 133MHz+, SCD-, USC-, SCO-, SRD- Freq=0
		Status: Bus=2 Dev=31 Func=0 64bit+ 133MHz+ SCD- USC-, SCO-, SRD-
		: Upstream: Capacity=65535, Commitment Limit=65535
		: Downstream: Capacity=65535, Commitment Limit=65535

03:03.0 RAID bus controller: 3ware Inc 3ware 7000-series ATA-RAID (rev 01)
	Subsystem: 3ware Inc 3ware 7000-series ATA-RAID
	Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64 (2250ns min), Cache Line Size 10
	Interrupt: pin A routed to IRQ 72
	Region 0: I/O ports at b800 [size=fd5e0000]
	Region 1: Memory at fd5ffc00 (32-bit, non-prefetchable) [size=16]
	Region 2: Memory at fc800000 (32-bit, non-prefetchable) [size=8M]
	Expansion ROM at 00010000 [disabled]
	Capabilities: [40] Power Management version 1
		Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
		Status: D0 PME-Enable- DSel=0 DScale=0 PME-

04:03.0 RAID bus controller: 3ware Inc 3ware 7000-series ATA-RAID (rev 01)
	Subsystem: 3ware Inc 3ware 7000-series ATA-RAID
	Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64 (2250ns min), Cache Line Size 10
	Interrupt: pin A routed to IRQ 96
	Region 0: I/O ports at c800 [size=fe6e0000]
	Region 1: Memory at fe6ffc00 (32-bit, non-prefetchable) [size=16]
	Region 2: Memory at fd800000 (32-bit, non-prefetchable) [size=8M]
	Expansion ROM at 00010000 [disabled]
	Capabilities: [40] Power Management version 1
		Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
		Status: D0 PME-Enable- DSel=0 DScale=0 PME-

05:1c.0 PIC: Intel Corp. 82870P2 P64H2 I/OxAPIC (rev 04) (prog-if 20 [IO(X)-APIC])
	Subsystem: Intel Corp. 82870P2 P64H2 I/OxAPIC
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 0
	Region 0: Memory at feafe000 (32-bit, non-prefetchable)
	Capabilities: [50] PCI-X non-bridge device.
		Command: DPERE- ERO- RBC=0 OST=0
		Status: Bus=5 Dev=28 Func=0 64bit+ 133MHz+ SCD- USC-, DC=simple, DMMRBC=0, DMOST=0, DMCRS=0, RSCEM-

05:1d.0 PCI bridge: Intel Corp. 82870P2 P64H2 Hub PCI Bridge (rev 04) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64, Cache Line Size 10
	Bus: primary=05, secondary=07, subordinate=07, sec-latency=64
	I/O behind bridge: 0000d000-0000dfff
	Memory behind bridge: fe900000-fe9fffff
	Prefetchable memory behind bridge: 00000000ff800000-00000000ff800000
	Expansion ROM at 0000d000 [disabled] [size=4K]
	BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B-
	Capabilities: [50] PCI-X bridge device.
		Secondary Status: 64bit+, 133MHz+, SCD-, USC-, SCO-, SRD- Freq=3
		Status: Bus=5 Dev=29 Func=0 64bit+ 133MHz+ SCD- USC-, SCO-, SRD-
		: Upstream: Capacity=65535, Commitment Limit=65535
		: Downstream: Capacity=65535, Commitment Limit=65535

05:1e.0 PIC: Intel Corp. 82870P2 P64H2 I/OxAPIC (rev 04) (prog-if 20 [IO(X)-APIC])
	Subsystem: Intel Corp. 82870P2 P64H2 I/OxAPIC
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 0
	Region 0: Memory at feaff000 (32-bit, non-prefetchable)
	Capabilities: [50] PCI-X non-bridge device.
		Command: DPERE- ERO- RBC=0 OST=0
		Status: Bus=5 Dev=30 Func=0 64bit+ 133MHz+ SCD- USC-, DC=simple, DMMRBC=0, DMOST=0, DMCRS=0, RSCEM-

05:1f.0 PCI bridge: Intel Corp. 82870P2 P64H2 Hub PCI Bridge (rev 04) (prog-if 00 [Normal decode])
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64, Cache Line Size 10
	Bus: primary=05, secondary=06, subordinate=06, sec-latency=64
	Memory behind bridge: fe800000-fe8fffff
	Prefetchable memory behind bridge: 00000000ff700000-00000000ff700000
	BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B-
	Capabilities: [50] PCI-X bridge device.
		Secondary Status: 64bit+, 133MHz+, SCD-, USC-, SCO-, SRD- Freq=0
		Status: Bus=5 Dev=31 Func=0 64bit+ 133MHz+ SCD- USC-, SCO-, SRD-
		: Upstream: Capacity=65535, Commitment Limit=65535
		: Downstream: Capacity=65535, Commitment Limit=65535

06:03.0 FireWire (IEEE 1394): NEC Corporation IEEE 1394 Host Controller (rev 01) (prog-if 10 [OHCI])
	Subsystem: NEC Corporation: Unknown device 00ce
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64, Cache Line Size 10
	Interrupt: pin A routed to IRQ 24
	Region 0: Memory at fe8ff000 (32-bit, non-prefetchable)
	Capabilities: [60] Power Management version 2
		Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-)
		Status: D0 PME-Enable- DSel=0 DScale=0 PME-

07:01.0 Ethernet controller: Intel Corp. 82546EB Gigabit Ethernet Controller (Copper) (rev 01)
	Subsystem: Intel Corp. PRO/1000 MT Dual Port Server Adapter
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64 (63750ns min), Cache Line Size 10
	Interrupt: pin A routed to IRQ 48
	Region 0: Memory at fe9a0000 (64-bit, non-prefetchable)
	Region 4: I/O ports at d400 [size=64]
	Capabilities: [dc] Power Management version 2
		Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold-)
		Status: D0 PME-Enable- DSel=0 DScale=1 PME-
	Capabilities: [e4] PCI-X non-bridge device.
		Command: DPERE- ERO+ RBC=0 OST=0
		Status: Bus=7 Dev=1 Func=0 64bit+ 133MHz+ SCD- USC-, DC=simple, DMMRBC=2, DMOST=0, DMCRS=1, RSCEM-
	Capabilities: [f0] Message Signalled Interrupts: 64bit+ Queue=0/0 Enable-
		Address: 0000000000000000  Data: 0000

07:01.1 Ethernet controller: Intel Corp. 82546EB Gigabit Ethernet Controller (Copper) (rev 01)
	Subsystem: Intel Corp. PRO/1000 MT Dual Port Server Adapter
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64 (63750ns min), Cache Line Size 10
	Interrupt: pin B routed to IRQ 49
	Region 0: Memory at fe9e0000 (64-bit, non-prefetchable)
	Region 4: I/O ports at d800 [size=64]
	Capabilities: [dc] Power Management version 2
		Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold-)
		Status: D0 PME-Enable- DSel=0 DScale=1 PME-
	Capabilities: [e4] PCI-X non-bridge device.
		Command: DPERE- ERO+ RBC=0 OST=0
		Status: Bus=7 Dev=1 Func=1 64bit+ 133MHz+ SCD- USC-, DC=simple, DMMRBC=2, DMOST=0, DMCRS=1, RSCEM-
	Capabilities: [f0] Message Signalled Interrupts: 64bit+ Queue=0/0 Enable-
		Address: 0000000000000000  Data: 0000


HTH,
  Sven



*********** REPLY SEPARATOR  ***********

On 09.08.2004 at 22:33 Christian Limpach wrote:

>On Mon, Aug 09, 2004 at 10:45:17PM +0200, Sven Kretzschmar wrote:
>>
>> I tried to make xen work on a dual-Xeon (1 Gig RAM, 2 3ware ATA-Raid
>Controlers)
>> with both 2.4.26 and 2.6.7 kernels, but had no success :-(
>>
>> I cloned the newest repository (CSet 1.1183) in an empty dir and only
>did:
>>
>> 1.) make world
>> 2.) make linux26
>> 3.) make install
>>
>> Then during boot of the 2.6 kernel I got the following message during
>boot:
>>
>> fixmap and kmap areas overlap - this will crash
>> pkstart: ff800000h pkend: ffc00000h fixstart fbeec000h
>> ...
>> kernel BUG at arch/xen/i386/mm/init.c:583!
>> invalid operand: 0000 [#1]
>> ...
>> <0>Kernel panic: Attempted to kill the idel task!
>> In idle task - not syncing
>
>That's very odd, because this code is only enable with CONFIG_HIGHMEM
>and that's not enabled in 2.6 (and also broken for at least one reason).
>I guess the build picked up an old .config or install/boot/config* file,
>which is odd since you write that you cloned to an empty dir.  Could
>you please compare your .config file with the default config file we
>provide at linux-2.6.7-xen-sparse/arch/xen/configs/xen0_defconfig
>(i.e run diff -u linux-2.6.7-xen0/.config
>linux-2.6.7-xen-sparse/arch/xen/configs/xen0_defconfig)
>
>> When booting with the 2.4 kernel I get the same errors as I got earlier
>with
>> trying to boot a 2.6. xen kernel on the same machine (with older CSets)
>> - however I had to add the 3ware drivers to the 2.4 kernel config first,
>it
>> was not included by default - :
>
>Could you boot without Xen (native 2.4 or 2.6 kernel, with smp support)
>and then send the output of lspci -v?
>
>> It seems that the Dual-Xeon machine with 3ware Raid-Controler is a very
>challenging
>> configuration for XenLinux, which discoveres some potential
>bugs/problems ;-)
>> Anybody else had problems booting the newer CSets on SMP machines ?
>
>Not really, most of our machines are SMP.  None of them have 3ware
>Raid-Controllers and I don't really think it matters wether it's an
>SMP machine or not.
>
>> P.S.: As I was using the newest CSets (1.1183) SMP was disabled in the
>kernel configs, while
>>         I was booting on the Dual-Xeon machine.
>
>yes, and that's how it's supposed to be:  Domain kernels cannot use
>multiple CPUs but Xen has support for SMP, and if you run multiple
>domains, you can have each run on a different CPUs.
>
>    christian



[-- Attachment #2: config.diff --]
[-- Type: application/octet-stream, Size: 2624 bytes --]

--- linux-2.6.7-xen0/.config	2004-08-09 22:41:11.000000000 +0200
+++ linux-2.6.7-xen-sparse/arch/xen/configs/xen0_defconfig	2004-08-09 21:43:46.000000000 +0200
@@ -62,6 +62,11 @@
 CONFIG_MMU=y
 CONFIG_UID16=y
 CONFIG_GENERIC_ISA_DMA=y
+# CONFIG_M386 is not set
+# CONFIG_M486 is not set
+# CONFIG_M586 is not set
+# CONFIG_M586TSC is not set
+# CONFIG_M586MMX is not set
 # CONFIG_M686 is not set
 # CONFIG_MPENTIUMII is not set
 # CONFIG_MPENTIUMIII is not set
@@ -71,6 +76,9 @@
 # CONFIG_MK7 is not set
 # CONFIG_MK8 is not set
 # CONFIG_MCRUSOE is not set
+# CONFIG_MWINCHIPC6 is not set
+# CONFIG_MWINCHIP2 is not set
+# CONFIG_MWINCHIP3D is not set
 # CONFIG_MCYRIXIII is not set
 # CONFIG_MVIAC3_2 is not set
 # CONFIG_X86_GENERIC is not set
@@ -97,6 +105,7 @@
 # CONFIG_EDD is not set
 CONFIG_NOHIGHMEM=y
 # CONFIG_HIGHMEM4G is not set
+# CONFIG_HIGHMEM64G is not set
 CONFIG_HAVE_DEC_LOCK=y
 # CONFIG_REGPARM is not set
 
@@ -238,7 +247,7 @@
 # CONFIG_CHR_DEV_ST is not set
 # CONFIG_CHR_DEV_OSST is not set
 # CONFIG_BLK_DEV_SR is not set
-CONFIG_CHR_DEV_SG=y
+# CONFIG_CHR_DEV_SG is not set
 
 #
 # Some SCSI devices (e.g. CD jukebox) support multiple LUNs
@@ -261,16 +270,38 @@
 # CONFIG_SCSI_ACARD is not set
 # CONFIG_SCSI_AHA152X is not set
 # CONFIG_SCSI_AHA1542 is not set
-# CONFIG_SCSI_AACRAID is not set
-# CONFIG_SCSI_AIC7XXX is not set
+CONFIG_SCSI_AACRAID=y
+CONFIG_SCSI_AIC7XXX=y
+CONFIG_AIC7XXX_CMDS_PER_DEVICE=32
+CONFIG_AIC7XXX_RESET_DELAY_MS=15000
+# CONFIG_AIC7XXX_BUILD_FIRMWARE is not set
+CONFIG_AIC7XXX_DEBUG_ENABLE=y
+CONFIG_AIC7XXX_DEBUG_MASK=0
+CONFIG_AIC7XXX_REG_PRETTY_PRINT=y
 # CONFIG_SCSI_AIC7XXX_OLD is not set
-# CONFIG_SCSI_AIC79XX is not set
+CONFIG_SCSI_AIC79XX=y
+CONFIG_AIC79XX_CMDS_PER_DEVICE=32
+CONFIG_AIC79XX_RESET_DELAY_MS=15000
+# CONFIG_AIC79XX_BUILD_FIRMWARE is not set
+# CONFIG_AIC79XX_ENABLE_RD_STRM is not set
+CONFIG_AIC79XX_DEBUG_ENABLE=y
+CONFIG_AIC79XX_DEBUG_MASK=0
+CONFIG_AIC79XX_REG_PRETTY_PRINT=y
 # CONFIG_SCSI_DPT_I2O is not set
 # CONFIG_SCSI_ADVANSYS is not set
 # CONFIG_SCSI_IN2000 is not set
-# CONFIG_SCSI_MEGARAID is not set
-# CONFIG_SCSI_SATA is not set
-# CONFIG_SCSI_BUSLOGIC is not set
+CONFIG_SCSI_MEGARAID=y
+CONFIG_SCSI_SATA=y
+# CONFIG_SCSI_SATA_SVW is not set
+CONFIG_SCSI_ATA_PIIX=y
+CONFIG_SCSI_SATA_PROMISE=y
+CONFIG_SCSI_SATA_SX4=y
+CONFIG_SCSI_SATA_SIL=y
+# CONFIG_SCSI_SATA_SIS is not set
+# CONFIG_SCSI_SATA_VIA is not set
+# CONFIG_SCSI_SATA_VITESSE is not set
+CONFIG_SCSI_BUSLOGIC=y
+# CONFIG_SCSI_OMIT_FLASHPOINT is not set
 # CONFIG_SCSI_CPQFCTS is not set
 # CONFIG_SCSI_DMX3191D is not set
 # CONFIG_SCSI_DTC3280 is not set

[-- Attachment #3: lspcivv.out --]
[-- Type: application/octet-stream, Size: 16277 bytes --]

00:00.0 Host bridge: Intel Corp. E7501 Memory Controller Hub (rev 01)
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 0
	Capabilities: [40] #09 [1105]

00:02.0 PCI bridge: Intel Corp. E7000 Series Hub Interface B PCI-to-PCI Bridge (rev 01) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap- 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64
	Bus: primary=00, secondary=05, subordinate=07, sec-latency=0
	I/O behind bridge: 0000d000-0000dfff
	Memory behind bridge: fe800000-feafffff
	Prefetchable memory behind bridge: ff700000-ff9fffff
	Expansion ROM at 0000d000 [disabled] [size=4K]
	BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B-

00:03.0 PCI bridge: Intel Corp. E7000 Series Hub Interface C PCI-to-PCI Bridge (rev 01) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap- 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64
	Bus: primary=00, secondary=02, subordinate=04, sec-latency=0
	I/O behind bridge: 0000b000-0000cfff
	Memory behind bridge: fc500000-fe7fffff
	Prefetchable memory behind bridge: ff400000-ff6fffff
	Expansion ROM at 0000b000 [disabled] [size=8K]
	BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B-

00:1d.0 USB Controller: Intel Corp. 82801CA/CAM USB (Hub #1) (rev 02) (prog-if 00 [UHCI])
	Subsystem: Intel Corp.: Unknown device 2480
	Control: I/O+ Mem- BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
	Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 0
	Interrupt: pin A routed to IRQ 16
	Region 4: I/O ports at e800 [size=32]

00:1e.0 PCI bridge: Intel Corp. 82801BA/CA/DB/EB/ER Hub interface to PCI Bridge (rev 42) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 0
	Bus: primary=00, secondary=01, subordinate=01, sec-latency=32
	I/O behind bridge: 00009000-0000afff
	Memory behind bridge: fa400000-fc4fffff
	Prefetchable memory behind bridge: ff300000-ff3fffff
	BridgeCtl: Parity- SERR+ NoISA- VGA+ MAbort- >Reset- FastB2B-

00:1f.0 ISA bridge: Intel Corp. 82801CA LPC Interface Controller (rev 02)
	Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
	Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 0

00:1f.1 IDE interface: Intel Corp. 82801CA Ultra ATA Storage Controller (rev 02) (prog-if 8a [Master SecP PriP])
	Subsystem: Intel Corp.: Unknown device 2480
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
	Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 0
	Interrupt: pin A routed to IRQ 18
	Region 0: I/O ports at <unassigned>
	Region 1: I/O ports at <unassigned>
	Region 2: I/O ports at <unassigned>
	Region 3: I/O ports at <unassigned>
	Region 4: I/O ports at ffa0 [size=16]
	Region 5: Memory at 40000000 (32-bit, non-prefetchable) [size=1K]

00:1f.3 SMBus: Intel Corp. 82801CA/CAM SMBus Controller (rev 02)
	Subsystem: Intel Corp.: Unknown device 2480
	Control: I/O+ Mem- BusMaster- SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B-
	Status: Cap- 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Interrupt: pin B routed to IRQ 17
	Region 4: I/O ports at 0540 [size=32]

01:01.0 Ethernet controller: Intel Corp. 82557/8/9 [Ethernet Pro 100] (rev 10)
	Subsystem: Intel Corp. EtherExpress PRO/100 S Server Adapter
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64 (2000ns min, 14000ns max), Cache Line Size 10
	Interrupt: pin A routed to IRQ 19
	Region 0: Memory at fc4fd000 (32-bit, non-prefetchable)
	Region 1: I/O ports at a000 [size=64]
	Region 2: Memory at fc4a0000 (32-bit, non-prefetchable) [size=128K]
	Capabilities: [dc] Power Management version 2
		Flags: PMEClk- DSI+ D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
		Status: D0 PME-Enable+ DSel=0 DScale=2 PME-

01:02.0 VGA compatible controller: ATI Technologies Inc Rage XL (rev 27) (prog-if 00 [VGA])
	Subsystem: ATI Technologies Inc Rage XL
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping+ SERR- FastB2B-
	Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64 (2000ns min), Cache Line Size 10
	Interrupt: pin A routed to IRQ 18
	Region 0: Memory at fb000000 (32-bit, non-prefetchable) [size=fc4c0000]
	Region 1: I/O ports at a800 [size=256]
	Region 2: Memory at fc4ff000 (32-bit, non-prefetchable) [size=4K]
	Expansion ROM at 00020000 [disabled]
	Capabilities: [5c] Power Management version 2
		Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
		Status: D0 PME-Enable- DSel=0 DScale=0 PME-

01:03.0 Ethernet controller: Peppercon AG ROL/F-100 Fast Ethernet Adapter with ROL (rev 10)
	Subsystem: Realtek Semiconductor Co., Ltd.: Unknown device 8139
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64 (8000ns min, 16000ns max)
	Interrupt: pin A routed to IRQ 18
	Region 0: I/O ports at a400 [size=fc4e0000]
	Region 1: Memory at fc4fec00 (32-bit, non-prefetchable) [size=256]
	Expansion ROM at 00010000 [disabled]
	Capabilities: [50] Power Management version 2
		Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=375mA PME(D0+,D1+,D2+,D3hot+,D3cold+)
		Status: D0 PME-Enable- DSel=0 DScale=0 PME-

02:1c.0 PIC: Intel Corp. 82870P2 P64H2 I/OxAPIC (rev 04) (prog-if 20 [IO(X)-APIC])
	Subsystem: Intel Corp. 82870P2 P64H2 I/OxAPIC
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 0
	Region 0: Memory at fe7fe000 (32-bit, non-prefetchable)
	Capabilities: [50] PCI-X non-bridge device.
		Command: DPERE- ERO- RBC=0 OST=0
		Status: Bus=2 Dev=28 Func=0 64bit+ 133MHz+ SCD- USC-, DC=simple, DMMRBC=0, DMOST=0, DMCRS=0, RSCEM-

02:1d.0 PCI bridge: Intel Corp. 82870P2 P64H2 Hub PCI Bridge (rev 04) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64, Cache Line Size 10
	Bus: primary=02, secondary=04, subordinate=04, sec-latency=64
	I/O behind bridge: 0000c000-0000cfff
	Memory behind bridge: fd600000-fe6fffff
	Prefetchable memory behind bridge: 00000000ff500000-00000000ff500000
	Expansion ROM at 0000c000 [disabled] [size=4K]
	BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B-
	Capabilities: [50] PCI-X bridge device.
		Secondary Status: 64bit+, 133MHz+, SCD-, USC-, SCO-, SRD- Freq=0
		Status: Bus=2 Dev=29 Func=0 64bit+ 133MHz+ SCD- USC-, SCO-, SRD-
		: Upstream: Capacity=65535, Commitment Limit=65535
		: Downstream: Capacity=65535, Commitment Limit=65535

02:1e.0 PIC: Intel Corp. 82870P2 P64H2 I/OxAPIC (rev 04) (prog-if 20 [IO(X)-APIC])
	Subsystem: Intel Corp. 82870P2 P64H2 I/OxAPIC
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 0
	Region 0: Memory at fe7ff000 (32-bit, non-prefetchable)
	Capabilities: [50] PCI-X non-bridge device.
		Command: DPERE- ERO- RBC=0 OST=0
		Status: Bus=2 Dev=30 Func=0 64bit+ 133MHz+ SCD- USC-, DC=simple, DMMRBC=0, DMOST=0, DMCRS=0, RSCEM-

02:1f.0 PCI bridge: Intel Corp. 82870P2 P64H2 Hub PCI Bridge (rev 04) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64, Cache Line Size 10
	Bus: primary=02, secondary=03, subordinate=03, sec-latency=64
	I/O behind bridge: 0000b000-0000bfff
	Memory behind bridge: fc500000-fd5fffff
	Prefetchable memory behind bridge: 00000000ff400000-00000000ff400000
	Expansion ROM at 0000b000 [disabled] [size=4K]
	BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B-
	Capabilities: [50] PCI-X bridge device.
		Secondary Status: 64bit+, 133MHz+, SCD-, USC-, SCO-, SRD- Freq=0
		Status: Bus=2 Dev=31 Func=0 64bit+ 133MHz+ SCD- USC-, SCO-, SRD-
		: Upstream: Capacity=65535, Commitment Limit=65535
		: Downstream: Capacity=65535, Commitment Limit=65535

03:03.0 RAID bus controller: 3ware Inc 3ware 7000-series ATA-RAID (rev 01)
	Subsystem: 3ware Inc 3ware 7000-series ATA-RAID
	Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz+ UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64 (2250ns min), Cache Line Size 10
	Interrupt: pin A routed to IRQ 72
	Region 0: I/O ports at b800 [size=fd5e0000]
	Region 1: Memory at fd5ffc00 (32-bit, non-prefetchable) [size=16]
	Region 2: Memory at fc800000 (32-bit, non-prefetchable) [size=8M]
	Expansion ROM at 00010000 [disabled]
	Capabilities: [40] Power Management version 1
		Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
		Status: D0 PME-Enable- DSel=0 DScale=0 PME-

04:03.0 RAID bus controller: 3ware Inc 3ware 7000-series ATA-RAID (rev 01)
	Subsystem: 3ware Inc 3ware 7000-series ATA-RAID
	Control: I/O+ Mem+ BusMaster+ SpecCycle+ MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64 (2250ns min), Cache Line Size 10
	Interrupt: pin A routed to IRQ 96
	Region 0: I/O ports at c800 [size=fe6e0000]
	Region 1: Memory at fe6ffc00 (32-bit, non-prefetchable) [size=16]
	Region 2: Memory at fd800000 (32-bit, non-prefetchable) [size=8M]
	Expansion ROM at 00010000 [disabled]
	Capabilities: [40] Power Management version 1
		Flags: PMEClk- DSI- D1+ D2- AuxCurrent=0mA PME(D0-,D1-,D2-,D3hot-,D3cold-)
		Status: D0 PME-Enable- DSel=0 DScale=0 PME-

05:1c.0 PIC: Intel Corp. 82870P2 P64H2 I/OxAPIC (rev 04) (prog-if 20 [IO(X)-APIC])
	Subsystem: Intel Corp. 82870P2 P64H2 I/OxAPIC
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 0
	Region 0: Memory at feafe000 (32-bit, non-prefetchable)
	Capabilities: [50] PCI-X non-bridge device.
		Command: DPERE- ERO- RBC=0 OST=0
		Status: Bus=5 Dev=28 Func=0 64bit+ 133MHz+ SCD- USC-, DC=simple, DMMRBC=0, DMOST=0, DMCRS=0, RSCEM-

05:1d.0 PCI bridge: Intel Corp. 82870P2 P64H2 Hub PCI Bridge (rev 04) (prog-if 00 [Normal decode])
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64, Cache Line Size 10
	Bus: primary=05, secondary=07, subordinate=07, sec-latency=64
	I/O behind bridge: 0000d000-0000dfff
	Memory behind bridge: fe900000-fe9fffff
	Prefetchable memory behind bridge: 00000000ff800000-00000000ff800000
	Expansion ROM at 0000d000 [disabled] [size=4K]
	BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B-
	Capabilities: [50] PCI-X bridge device.
		Secondary Status: 64bit+, 133MHz+, SCD-, USC-, SCO-, SRD- Freq=3
		Status: Bus=5 Dev=29 Func=0 64bit+ 133MHz+ SCD- USC-, SCO-, SRD-
		: Upstream: Capacity=65535, Commitment Limit=65535
		: Downstream: Capacity=65535, Commitment Limit=65535

05:1e.0 PIC: Intel Corp. 82870P2 P64H2 I/OxAPIC (rev 04) (prog-if 20 [IO(X)-APIC])
	Subsystem: Intel Corp. 82870P2 P64H2 I/OxAPIC
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 0
	Region 0: Memory at feaff000 (32-bit, non-prefetchable)
	Capabilities: [50] PCI-X non-bridge device.
		Command: DPERE- ERO- RBC=0 OST=0
		Status: Bus=5 Dev=30 Func=0 64bit+ 133MHz+ SCD- USC-, DC=simple, DMMRBC=0, DMOST=0, DMCRS=0, RSCEM-

05:1f.0 PCI bridge: Intel Corp. 82870P2 P64H2 Hub PCI Bridge (rev 04) (prog-if 00 [Normal decode])
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64, Cache Line Size 10
	Bus: primary=05, secondary=06, subordinate=06, sec-latency=64
	Memory behind bridge: fe800000-fe8fffff
	Prefetchable memory behind bridge: 00000000ff700000-00000000ff700000
	BridgeCtl: Parity- SERR+ NoISA+ VGA- MAbort- >Reset- FastB2B-
	Capabilities: [50] PCI-X bridge device.
		Secondary Status: 64bit+, 133MHz+, SCD-, USC-, SCO-, SRD- Freq=0
		Status: Bus=5 Dev=31 Func=0 64bit+ 133MHz+ SCD- USC-, SCO-, SRD-
		: Upstream: Capacity=65535, Commitment Limit=65535
		: Downstream: Capacity=65535, Commitment Limit=65535

06:03.0 FireWire (IEEE 1394): NEC Corporation IEEE 1394 Host Controller (rev 01) (prog-if 10 [OHCI])
	Subsystem: NEC Corporation: Unknown device 00ce
	Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz- UDF- FastB2B+ ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64, Cache Line Size 10
	Interrupt: pin A routed to IRQ 24
	Region 0: Memory at fe8ff000 (32-bit, non-prefetchable)
	Capabilities: [60] Power Management version 2
		Flags: PMEClk- DSI- D1+ D2+ AuxCurrent=0mA PME(D0+,D1+,D2+,D3hot+,D3cold-)
		Status: D0 PME-Enable- DSel=0 DScale=0 PME-

07:01.0 Ethernet controller: Intel Corp. 82546EB Gigabit Ethernet Controller (Copper) (rev 01)
	Subsystem: Intel Corp. PRO/1000 MT Dual Port Server Adapter
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64 (63750ns min), Cache Line Size 10
	Interrupt: pin A routed to IRQ 48
	Region 0: Memory at fe9a0000 (64-bit, non-prefetchable)
	Region 4: I/O ports at d400 [size=64]
	Capabilities: [dc] Power Management version 2
		Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold-)
		Status: D0 PME-Enable- DSel=0 DScale=1 PME-
	Capabilities: [e4] PCI-X non-bridge device.
		Command: DPERE- ERO+ RBC=0 OST=0
		Status: Bus=7 Dev=1 Func=0 64bit+ 133MHz+ SCD- USC-, DC=simple, DMMRBC=2, DMOST=0, DMCRS=1, RSCEM-
	Capabilities: [f0] Message Signalled Interrupts: 64bit+ Queue=0/0 Enable-
		Address: 0000000000000000  Data: 0000

07:01.1 Ethernet controller: Intel Corp. 82546EB Gigabit Ethernet Controller (Copper) (rev 01)
	Subsystem: Intel Corp. PRO/1000 MT Dual Port Server Adapter
	Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV+ VGASnoop- ParErr- Stepping- SERR+ FastB2B-
	Status: Cap+ 66Mhz+ UDF- FastB2B- ParErr- DEVSEL=medium >TAbort- <TAbort- <MAbort- >SERR- <PERR-
	Latency: 64 (63750ns min), Cache Line Size 10
	Interrupt: pin B routed to IRQ 49
	Region 0: Memory at fe9e0000 (64-bit, non-prefetchable)
	Region 4: I/O ports at d800 [size=64]
	Capabilities: [dc] Power Management version 2
		Flags: PMEClk- DSI+ D1- D2- AuxCurrent=0mA PME(D0+,D1-,D2-,D3hot+,D3cold-)
		Status: D0 PME-Enable- DSel=0 DScale=1 PME-
	Capabilities: [e4] PCI-X non-bridge device.
		Command: DPERE- ERO+ RBC=0 OST=0
		Status: Bus=7 Dev=1 Func=1 64bit+ 133MHz+ SCD- USC-, DC=simple, DMMRBC=2, DMOST=0, DMCRS=1, RSCEM-
	Capabilities: [f0] Message Signalled Interrupts: 64bit+ Queue=0/0 Enable-
		Address: 0000000000000000  Data: 0000


[-- Attachment #4: lspciv.out --]
[-- Type: application/octet-stream, Size: 8310 bytes --]

00:00.0 Host bridge: Intel Corp. E7501 Memory Controller Hub (rev 01)
	Flags: bus master, fast devsel, latency 0
	Capabilities: [40] #09 [1105]

00:02.0 PCI bridge: Intel Corp. E7000 Series Hub Interface B PCI-to-PCI Bridge (rev 01) (prog-if 00 [Normal decode])
	Flags: bus master, 66Mhz, fast devsel, latency 64
	Bus: primary=00, secondary=05, subordinate=07, sec-latency=0
	I/O behind bridge: 0000d000-0000dfff
	Memory behind bridge: fe800000-feafffff
	Prefetchable memory behind bridge: ff700000-ff9fffff
	Expansion ROM at 0000d000 [disabled] [size=4K]

00:03.0 PCI bridge: Intel Corp. E7000 Series Hub Interface C PCI-to-PCI Bridge (rev 01) (prog-if 00 [Normal decode])
	Flags: bus master, 66Mhz, fast devsel, latency 64
	Bus: primary=00, secondary=02, subordinate=04, sec-latency=0
	I/O behind bridge: 0000b000-0000cfff
	Memory behind bridge: fc500000-fe7fffff
	Prefetchable memory behind bridge: ff400000-ff6fffff
	Expansion ROM at 0000b000 [disabled] [size=8K]

00:1d.0 USB Controller: Intel Corp. 82801CA/CAM USB (Hub #1) (rev 02) (prog-if 00 [UHCI])
	Subsystem: Intel Corp.: Unknown device 2480
	Flags: bus master, medium devsel, latency 0, IRQ 16
	I/O ports at e800 [size=32]

00:1e.0 PCI bridge: Intel Corp. 82801BA/CA/DB/EB/ER Hub interface to PCI Bridge (rev 42) (prog-if 00 [Normal decode])
	Flags: bus master, fast devsel, latency 0
	Bus: primary=00, secondary=01, subordinate=01, sec-latency=32
	I/O behind bridge: 00009000-0000afff
	Memory behind bridge: fa400000-fc4fffff
	Prefetchable memory behind bridge: ff300000-ff3fffff

00:1f.0 ISA bridge: Intel Corp. 82801CA LPC Interface Controller (rev 02)
	Flags: bus master, medium devsel, latency 0

00:1f.1 IDE interface: Intel Corp. 82801CA Ultra ATA Storage Controller (rev 02) (prog-if 8a [Master SecP PriP])
	Subsystem: Intel Corp.: Unknown device 2480
	Flags: bus master, medium devsel, latency 0, IRQ 18
	I/O ports at <unassigned>
	I/O ports at <unassigned>
	I/O ports at <unassigned>
	I/O ports at <unassigned>
	I/O ports at ffa0 [size=16]
	Memory at 40000000 (32-bit, non-prefetchable) [size=1K]

00:1f.3 SMBus: Intel Corp. 82801CA/CAM SMBus Controller (rev 02)
	Subsystem: Intel Corp.: Unknown device 2480
	Flags: medium devsel, IRQ 17
	I/O ports at 0540 [size=32]

01:01.0 Ethernet controller: Intel Corp. 82557/8/9 [Ethernet Pro 100] (rev 10)
	Subsystem: Intel Corp. EtherExpress PRO/100 S Server Adapter
	Flags: bus master, medium devsel, latency 64, IRQ 19
	Memory at fc4fd000 (32-bit, non-prefetchable)
	I/O ports at a000 [size=64]
	Memory at fc4a0000 (32-bit, non-prefetchable) [size=128K]
	Capabilities: [dc] Power Management version 2

01:02.0 VGA compatible controller: ATI Technologies Inc Rage XL (rev 27) (prog-if 00 [VGA])
	Subsystem: ATI Technologies Inc Rage XL
	Flags: bus master, stepping, medium devsel, latency 64, IRQ 18
	Memory at fb000000 (32-bit, non-prefetchable) [size=fc4c0000]
	I/O ports at a800 [size=256]
	Memory at fc4ff000 (32-bit, non-prefetchable) [size=4K]
	Expansion ROM at 00020000 [disabled]
	Capabilities: [5c] Power Management version 2

01:03.0 Ethernet controller: Peppercon AG ROL/F-100 Fast Ethernet Adapter with ROL (rev 10)
	Subsystem: Realtek Semiconductor Co., Ltd.: Unknown device 8139
	Flags: bus master, medium devsel, latency 64, IRQ 18
	I/O ports at a400 [size=fc4e0000]
	Memory at fc4fec00 (32-bit, non-prefetchable) [size=256]
	Expansion ROM at 00010000 [disabled]
	Capabilities: [50] Power Management version 2

02:1c.0 PIC: Intel Corp. 82870P2 P64H2 I/OxAPIC (rev 04) (prog-if 20 [IO(X)-APIC])
	Subsystem: Intel Corp. 82870P2 P64H2 I/OxAPIC
	Flags: bus master, 66Mhz, fast devsel, latency 0
	Memory at fe7fe000 (32-bit, non-prefetchable)
	Capabilities: [50] PCI-X non-bridge device.

02:1d.0 PCI bridge: Intel Corp. 82870P2 P64H2 Hub PCI Bridge (rev 04) (prog-if 00 [Normal decode])
	Flags: bus master, 66Mhz, fast devsel, latency 64
	Bus: primary=02, secondary=04, subordinate=04, sec-latency=64
	I/O behind bridge: 0000c000-0000cfff
	Memory behind bridge: fd600000-fe6fffff
	Prefetchable memory behind bridge: 00000000ff500000-00000000ff500000
	Expansion ROM at 0000c000 [disabled] [size=4K]
	Capabilities: [50] PCI-X bridge device.

02:1e.0 PIC: Intel Corp. 82870P2 P64H2 I/OxAPIC (rev 04) (prog-if 20 [IO(X)-APIC])
	Subsystem: Intel Corp. 82870P2 P64H2 I/OxAPIC
	Flags: bus master, 66Mhz, fast devsel, latency 0
	Memory at fe7ff000 (32-bit, non-prefetchable)
	Capabilities: [50] PCI-X non-bridge device.

02:1f.0 PCI bridge: Intel Corp. 82870P2 P64H2 Hub PCI Bridge (rev 04) (prog-if 00 [Normal decode])
	Flags: bus master, 66Mhz, fast devsel, latency 64
	Bus: primary=02, secondary=03, subordinate=03, sec-latency=64
	I/O behind bridge: 0000b000-0000bfff
	Memory behind bridge: fc500000-fd5fffff
	Prefetchable memory behind bridge: 00000000ff400000-00000000ff400000
	Expansion ROM at 0000b000 [disabled] [size=4K]
	Capabilities: [50] PCI-X bridge device.

03:03.0 RAID bus controller: 3ware Inc 3ware 7000-series ATA-RAID (rev 01)
	Subsystem: 3ware Inc 3ware 7000-series ATA-RAID
	Flags: bus master, 66Mhz, medium devsel, latency 64, IRQ 72
	I/O ports at b800 [size=fd5e0000]
	Memory at fd5ffc00 (32-bit, non-prefetchable) [size=16]
	Memory at fc800000 (32-bit, non-prefetchable) [size=8M]
	Expansion ROM at 00010000 [disabled]
	Capabilities: [40] Power Management version 1

04:03.0 RAID bus controller: 3ware Inc 3ware 7000-series ATA-RAID (rev 01)
	Subsystem: 3ware Inc 3ware 7000-series ATA-RAID
	Flags: bus master, medium devsel, latency 64, IRQ 96
	I/O ports at c800 [size=fe6e0000]
	Memory at fe6ffc00 (32-bit, non-prefetchable) [size=16]
	Memory at fd800000 (32-bit, non-prefetchable) [size=8M]
	Expansion ROM at 00010000 [disabled]
	Capabilities: [40] Power Management version 1

05:1c.0 PIC: Intel Corp. 82870P2 P64H2 I/OxAPIC (rev 04) (prog-if 20 [IO(X)-APIC])
	Subsystem: Intel Corp. 82870P2 P64H2 I/OxAPIC
	Flags: bus master, 66Mhz, fast devsel, latency 0
	Memory at feafe000 (32-bit, non-prefetchable)
	Capabilities: [50] PCI-X non-bridge device.

05:1d.0 PCI bridge: Intel Corp. 82870P2 P64H2 Hub PCI Bridge (rev 04) (prog-if 00 [Normal decode])
	Flags: bus master, 66Mhz, fast devsel, latency 64
	Bus: primary=05, secondary=07, subordinate=07, sec-latency=64
	I/O behind bridge: 0000d000-0000dfff
	Memory behind bridge: fe900000-fe9fffff
	Prefetchable memory behind bridge: 00000000ff800000-00000000ff800000
	Expansion ROM at 0000d000 [disabled] [size=4K]
	Capabilities: [50] PCI-X bridge device.

05:1e.0 PIC: Intel Corp. 82870P2 P64H2 I/OxAPIC (rev 04) (prog-if 20 [IO(X)-APIC])
	Subsystem: Intel Corp. 82870P2 P64H2 I/OxAPIC
	Flags: bus master, 66Mhz, fast devsel, latency 0
	Memory at feaff000 (32-bit, non-prefetchable)
	Capabilities: [50] PCI-X non-bridge device.

05:1f.0 PCI bridge: Intel Corp. 82870P2 P64H2 Hub PCI Bridge (rev 04) (prog-if 00 [Normal decode])
	Flags: bus master, 66Mhz, fast devsel, latency 64
	Bus: primary=05, secondary=06, subordinate=06, sec-latency=64
	Memory behind bridge: fe800000-fe8fffff
	Prefetchable memory behind bridge: 00000000ff700000-00000000ff700000
	Capabilities: [50] PCI-X bridge device.

06:03.0 FireWire (IEEE 1394): NEC Corporation IEEE 1394 Host Controller (rev 01) (prog-if 10 [OHCI])
	Subsystem: NEC Corporation: Unknown device 00ce
	Flags: bus master, medium devsel, latency 64, IRQ 24
	Memory at fe8ff000 (32-bit, non-prefetchable)
	Capabilities: [60] Power Management version 2

07:01.0 Ethernet controller: Intel Corp. 82546EB Gigabit Ethernet Controller (Copper) (rev 01)
	Subsystem: Intel Corp. PRO/1000 MT Dual Port Server Adapter
	Flags: bus master, 66Mhz, medium devsel, latency 64, IRQ 48
	Memory at fe9a0000 (64-bit, non-prefetchable)
	I/O ports at d400 [size=64]
	Capabilities: [dc] Power Management version 2
	Capabilities: [e4] PCI-X non-bridge device.
	Capabilities: [f0] Message Signalled Interrupts: 64bit+ Queue=0/0 Enable-

07:01.1 Ethernet controller: Intel Corp. 82546EB Gigabit Ethernet Controller (Copper) (rev 01)
	Subsystem: Intel Corp. PRO/1000 MT Dual Port Server Adapter
	Flags: bus master, 66Mhz, medium devsel, latency 64, IRQ 49
	Memory at fe9e0000 (64-bit, non-prefetchable)
	I/O ports at d800 [size=64]
	Capabilities: [dc] Power Management version 2
	Capabilities: [e4] PCI-X non-bridge device.
	Capabilities: [f0] Message Signalled Interrupts: 64bit+ Queue=0/0 Enable-

Re: Problems booting on a Dual-Xeon with 2.4 and 2.6 kernels

[Christian Limpach]

On Tue, Aug 10, 2004 at 12:16:21AM +0200, Sven Kretzschmar wrote:
> Ok, here are the outputs:
> 
> 1.) the config diffs (I can not garantee any more that this is an orginal .config,
>      because I now already tried some things to make it perhaps work..., however it's still
>      CONFIG_NOHIGHMEM=y ?!):

The failure you showed can only occur with a kernel with CONFIG_HIGHMEM
enabled.  In any case, highmem should now work on 2.6.

Re the 3ware problems:
Could you build a 2.6 dom0 kernel with #define TW_DEBUG added before
the dprintk macro gets defined around line 248 (the file is
linux-2.6.7-xen0/drivers/scsi/3w-xxxx.h), like this:
#define TW_DEBUG 1
#ifdef TW_DEBUG
#define dprintk(msg...) printk(msg)
#else
#define dprintk(msg...) do { } while(0)
#endif

Also, does the boot get to the point where it prints a line like:
Found a 3ware Storage Controller...
I couldn't find a mail from you which included dmesg output of a failed
2.6 boot, please include all the output from Xen and from dom0 when
you boot with TW_DEBUG enabled.

    christian



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Re: Problems booting with 3ware Controllers

[Sven Kretzschmar]

Yes, the highmen probs have been gone now.
I have also compiled xen with debug=y option, but have
not seen any additonal messages from Xen during
boot process (I used another machine with miniterm via
serial crossover to monitor Xen's messages during boot).

However, when I try to compile the 3ware driver as a module,
I get the following error when compiling both the 2.4 and 2.6
kernels (when doing make modules or modules_install, I don't
remember exactly):
Unresolved symbols in ...../3w-xxxx.o
depmod:   force_evtchn_callback

looks like a missing EXPORT_SYMBOL statement, but I am
not sure if this has anything to do with my problems when
booting with the 3ware drivers compiled into the kernel; I think
it hasn't ...

Sorry for the missing dmesg, I try to send it tomorrow.
It gets until the point where it says "...found 3ware controler"
or something alike.
Also, from an earlier email of mine:
"During boot, the boot process of the newly installed kernel
showed that it recognizes the two 3ware Controllers, but then reports the
following errors:
3w-xxxx: scsi0: Unit #0: Command(c7f92b00) timed out, resetting card.
3w-xxxx: scsi0: Unit #0: Command(c7f92b00) timed out, resetting card.
3w-xxxx: scsi0: Reset succeeded.

Then it freezes and nothing more happens.
"

OK, I attached now the output while booting with TW_DEBUG=1.
Caveat: It's from the 2.4. Xenolinux, because that compiled quicker :-/
Don't pay too much attention at that part:
"3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits."
...because it also shows up when booting a vanilla 2.4.26 kernel
(successfully !), but without the endless loop.
BTW: How can I catch the output of a normal 2.4.26 kernel via
serial line ? What kernel options do I have to set exactly ?
I tried "com1=115200,8n1 console=ttyS0" like with xenolinux,
but it did not work ?

Tomorrow I will also try to boot only with one 3ware controller;
currently, there are 2 controllers connected to the machine.
And I will send you the output of a 2.6. kernel, if still necessary
(Sorry for the long post)

 HTH,
    Sven

Output catched via miniterm:

__  __            _   _____        _                _
 \ \/ /___ _ __   / | |___ /     __| | _____   _____| |
  \  // _ \ '_ \  | |   |_ \ __ / _` |/ _ \ \ / / _ \ |
  /  \  __/ | | | | |_ ___) |__| (_| |  __/\ V /  __/ |
 /_/\_\___|_| |_| |_(_)____/    \__,_|\___| \_/ \___|_|

 http://www.cl.cam.ac.uk/netos/xen
 University of Cambridge Computer Laboratory

 Xen version 1.3-devel (root@local) (gcc version 3.3.3 20040412 (Red Hat Linux 3.3.3-7)) Wed Aug 11 00:46:15 CEST 2004

(XEN) Initialised 1023MB memory (262128 pages) on a 1023MB machine
(XEN) Xen heap size is 10604KB
(XEN) CPU0: Before vendor init, caps: bfebfbff 00000000 00000000, vendor = 0
(XEN) CPU#0: Hyper-Threading is disabled
(XEN) CPU caps: bfebfbff 00000000 00000000 00000000
(XEN) found SMP MP-table at 000ff780
(XEN) Memory Reservation 0xff780, 4096 bytes
(XEN) Memory Reservation 0xf9500, 4096 bytes
(XEN) ACPI: RSDP (v000 ACPIAM                                    ) @ 0x000f4fa0
(XEN) ACPI: RSDT (v001 A M I  OEMRSDT  0x02000304 MSFT 0x00000097) @ 0x3fff0000
(XEN) ACPI: FADT (v002 A M I  OEMFACP  0x02000304 MSFT 0x00000097) @ 0x3fff0200
(XEN) ACPI: MADT (v001 A M I  OEMAPIC  0x02000304 MSFT 0x00000097) @ 0x3fff0300
(XEN) ACPI: OEMB (v001 A M I  OEMBIOS  0x02000304 MSFT 0x00000097) @ 0x3ffff040
(XEN) ACPI: DSDT (v001  0ABBP 0ABBP000 0x00000000 INTL 0x02002026) @ 0x00000000
(XEN) ACPI: Local APIC address 0xfee00000
(XEN) ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled)
(XEN) Processor #0 Pentium 4(tm) XEON(tm) APIC version 20
(XEN) ACPI: LAPIC (acpi_id[0x02] lapic_id[0x06] enabled)
(XEN) Processor #6 Pentium 4(tm) XEON(tm) APIC version 20
(XEN) ACPI: LAPIC (acpi_id[0x03] lapic_id[0x82] disabled)
(XEN) Processor #130 invalid (max 16)
(XEN) ACPI: LAPIC (acpi_id[0x04] lapic_id[0x83] disabled)
(XEN) Processor #131 invalid (max 16)
(XEN) Using ACPI for processor (LAPIC) configuration information
(XEN) Intel MultiProcessor Specification v1.4
(XEN)     Virtual Wire compatibility mode.
(XEN) OEM ID: INTEL    Product ID: KingsCanyonC APIC at: 0xFEE00000
(XEN) I/O APIC #7 Version 32 at 0xFEC00000.
(XEN) I/O APIC #8 Version 32 at 0xFEC80000.
(XEN) I/O APIC #9 Version 32 at 0xFEC80400.
(XEN) I/O APIC #10 Version 32 at 0xFEC81000.
(XEN) I/O APIC #11 Version 32 at 0xFEC81400.
(XEN) Enabling APIC mode: Flat.	Using 5 I/O APICs
(XEN) Processors: 2
(XEN) Using scheduler: Borrowed Virtual Time (bvt)
(XEN) Initializing CPU#0
(XEN) Detected 2665.991 MHz processor.
(XEN) CPU0: Before vendor init, caps: bfebfbff 00000000 00000000, vendor = 0
(XEN) CPU#0: Hyper-Threading is disabled
(XEN) CPU caps: bfebfbff 00000000 00000000 00000000
(XEN) CPU0 booted
(XEN) enabled ExtINT on CPU#0
(XEN) ESR value before enabling vector: 00000000
(XEN) ESR value after enabling vector: 00000000
(XEN) Booting processor 1/6 eip 90000
(XEN) Initializing CPU#1
(XEN) masked ExtINT on CPU#1
(XEN) ESR value before enabling vector: 00000000
(XEN) ESR value after enabling vector: 00000000
(XEN) CPU1: Before vendor init, caps: bfebfbff 00000000 00000000, vendor = 0
(XEN) CPU#1: Hyper-Threading is disabled
(XEN) CPU caps: bfebfbff 00000000 00000000 00000000
(XEN) CPU1 has booted.
(XEN) Total of 2 processors activated.
(XEN) ENABLING IO-APIC IRQs
(XEN) Setting 7 in the phys_id_present_map
(XEN) ...changing IO-APIC physical APIC ID to 7 ... ok.
(XEN) Setting 8 in the phys_id_present_map
(XEN) ...changing IO-APIC physical APIC ID to 8 ... ok.
(XEN) Setting 9 in the phys_id_present_map
(XEN) ...changing IO-APIC physical APIC ID to 9 ... ok.
(XEN) Setting 10 in the phys_id_present_map
(XEN) ...changing IO-APIC physical APIC ID to 10 ... ok.
(XEN) Setting 11 in the phys_id_present_map
(XEN) ...changing IO-APIC physical APIC ID to 11 ... ok.
(XEN) init IO_APIC IRQs
(XEN) ..TIMER: vector=0x41 pin1=2 pin2=0
(XEN) number of MP IRQ sources: 23.
(XEN) number of IO-APIC #7 registers: 24.
(XEN) number of IO-APIC #8 registers: 24.
(XEN) number of IO-APIC #9 registers: 24.
(XEN) number of IO-APIC #10 registers: 24.
(XEN) number of IO-APIC #11 registers: 24.
(XEN) testing the IO APIC.......................
(XEN)
(XEN) IO APIC #7......
(XEN) .... register #00: 07000000
(XEN) .......    : physical APIC id: 07
(XEN) .......    : Delivery Type: 0
(XEN) .......    : LTS          : 0
(XEN) .... register #01: 00178020
(XEN) .......     : max redirection entries: 0017
(XEN) .......     : PRQ implemented: 1
(XEN) .......     : IO APIC version: 0020
(XEN) .... register #02: 00000000
(XEN) .......     : arbitration: 00
(XEN) .... register #03: 00000001
(XEN) .......     : Boot DT    : 1
(XEN) .... IRQ redirection table:
(XEN)  NR Log Phy Mask Trig IRR Pol Stat Dest Deli Vect:
(XEN)  00 000 00  1    0    0   0   0    0    0    00
(XEN)  01 003 03  0    0    0   0   0    1    1    49
(XEN)  02 003 03  0    0    0   0   0    1    1    41
(XEN)  03 003 03  0    0    0   0   0    1    1    51
(XEN)  04 003 03  0    0    0   0   0    1    1    59
(XEN)  05 000 00  1    0    0   0   0    0    0    00
(XEN)  06 003 03  0    0    0   0   0    1    1    61
(XEN)  07 003 03  0    0    0   0   0    1    1    69
(XEN)  08 003 03  0    0    0   0   0    1    1    71
(XEN)  09 000 00  1    0    0   0   0    0    0    00
(XEN)  0a 000 00  1    0    0   0   0    0    0    00
(XEN)  0b 000 00  1    0    0   0   0    0    0    00
(XEN)  0c 003 03  0    0    0   0   0    1    1    79
(XEN)  0d 003 03  0    0    0   0   0    1    1    81
(XEN)  0e 003 03  0    0    0   0   0    1    1    89
(XEN)  0f 003 03  0    0    0   0   0    1    1    91
(XEN)  10 003 03  1    1    0   1   0    1    1    99
(XEN)  11 003 03  1    1    0   1   0    1    1    A1
(XEN)  12 003 03  1    1    0   1   0    1    1    A9
(XEN)  13 003 03  1    1    0   1   0    1    1    B1
(XEN)  14 000 00  1    0    0   0   0    0    0    00
(XEN)  15 000 00  1    0    0   0   0    0    0    00
(XEN)  16 000 00  1    0    0   0   0    0    0    00
(XEN)  17 000 00  1    0    0   0   0    0    0    00
(XEN)
(XEN) IO APIC #8......
(XEN) .... register #00: 08000000
(XEN) .......    : physical APIC id: 08
(XEN) .......    : Delivery Type: 0
(XEN) .......    : LTS          : 0
(XEN) .... register #01: 00178020
(XEN) .......     : max redirection entries: 0017
(XEN) .......     : PRQ implemented: 1
(XEN) .......     : IO APIC version: 0020
(XEN) .... register #02: 08000000
(XEN) .......     : arbitration: 08
(XEN) .... register #03: 00000001
(XEN) .......     : Boot DT    : 1
(XEN) .... IRQ redirection table:
(XEN)  NR Log Phy Mask Trig IRR Pol Stat Dest Deli Vect:
(XEN)  00 003 03  1    1    0   1   0    1    1    B9
(XEN)  01 000 00  1    0    0   0   0    0    0    00
(XEN)  02 000 00  1    0    0   0   0    0    0    00
(XEN)  03 000 00  1    0    0   0   0    0    0    00
(XEN)  04 000 00  1    0    0   0   0    0    0    00
(XEN)  05 000 00  1    0    0   0   0    0    0    00
(XEN)  06 000 00  1    0    0   0   0    0    0    00
(XEN)  07 000 00  1    0    0   0   0    0    0    00
(XEN)  08 000 00  1    0    0   0   0    0    0    00
(XEN)  09 000 00  1    0    0   0   0    0    0    00
(XEN)  0a 000 00  1    0    0   0   0    0    0    00
(XEN)  0b 000 00  1    0    0   0   0    0    0    00
(XEN)  0c 000 00  1    0    0   0   0    0    0    00
(XEN)  0d 000 00  1    0    0   0   0    0    0    00
(XEN)  0e 000 00  1    0    0   0   0    0    0    00
(XEN)  0f 000 00  1    0    0   0   0    0    0    00
(XEN)  10 000 00  1    0    0   0   0    0    0    00
(XEN)  11 000 00  1    0    0   0   0    0    0    00
(XEN)  12 000 00  1    0    0   0   0    0    0    00
(XEN)  13 000 00  1    0    0   0   0    0    0    00
(XEN)  14 000 00  1    0    0   0   0    0    0    00
(XEN)  15 000 00  1    0    0   0   0    0    0    00
(XEN)  16 000 00  1    0    0   0   0    0    0    00
(XEN)  17 000 00  1    0    0   0   0    0    0    00
(XEN)
(XEN) IO APIC #9......
(XEN) .... register #00: 09000000
(XEN) .......    : physical APIC id: 09
(XEN) .......    : Delivery Type: 0
(XEN) .......    : LTS          : 0
(XEN) .... register #01: 00178020
(XEN) .......     : max redirection entries: 0017
(XEN) .......     : PRQ implemented: 1
(XEN) .......     : IO APIC version: 0020
(XEN) .... register #02: 09000000
(XEN) .......     : arbitration: 09
(XEN) .... register #03: 00000001
(XEN) .......     : Boot DT    : 1
(XEN) .... IRQ redirection table:
(XEN)  NR Log Phy Mask Trig IRR Pol Stat Dest Deli Vect:
(XEN)  00 003 03  1    1    0   1   0    1    1    C1
(XEN)  01 003 03  1    1    0   1   0    1    1    C9
(XEN)  02 000 00  1    0    0   0   0    0    0    00
(XEN)  03 000 00  1    0    0   0   0    0    0    00
(XEN)  04 000 00  1    0    0   0   0    0    0    00
(XEN)  05 000 00  1    0    0   0   0    0    0    00
(XEN)  06 000 00  1    0    0   0   0    0    0    00
(XEN)  07 000 00  1    0    0   0   0    0    0    00
(XEN)  08 000 00  1    0    0   0   0    0    0    00
(XEN)  09 000 00  1    0    0   0   0    0    0    00
(XEN)  0a 000 00  1    0    0   0   0    0    0    00
(XEN)  0b 000 00  1    0    0   0   0    0    0    00
(XEN)  0c 000 00  1    0    0   0   0    0    0    00
(XEN)  0d 000 00  1    0    0   0   0    0    0    00
(XEN)  0e 000 00  1    0    0   0   0    0    0    00
(XEN)  0f 000 00  1    0    0   0   0    0    0    00
(XEN)  10 000 00  1    0    0   0   0    0    0    00
(XEN)  11 000 00  1    0    0   0   0    0    0    00
(XEN)  12 000 00  1    0    0   0   0    0    0    00
(XEN)  13 000 00  1    0    0   0   0    0    0    00
(XEN)  14 000 00  1    0    0   0   0    0    0    00
(XEN)  15 000 00  1    0    0   0   0    0    0    00
(XEN)  16 000 00  1    0    0   0   0    0    0    00
(XEN)  17 000 00  1    0    0   0   0    0    0    00
(XEN)
(XEN) IO APIC #10......
(XEN) .... register #00: 0A000000
(XEN) .......    : physical APIC id: 0A
(XEN) .......    : Delivery Type: 0
(XEN) .......    : LTS          : 0
(XEN) .... register #01: 00178020
(XEN) .......     : max redirection entries: 0017
(XEN) .......     : PRQ implemented: 1
(XEN) .......     : IO APIC version: 0020
(XEN) .... register #02: 0A000000
(XEN) .......     : arbitration: 0A
(XEN) .... register #03: 00000001
(XEN) .......     : Boot DT    : 1
(XEN) .... IRQ redirection table:
(XEN)  NR Log Phy Mask Trig IRR Pol Stat Dest Deli Vect:
(XEN)  00 003 03  1    1    0   1   0    1    1    D1
(XEN)  01 000 00  1    0    0   0   0    0    0    00
(XEN)  02 000 00  1    0    0   0   0    0    0    00
(XEN)  03 000 00  1    0    0   0   0    0    0    00
(XEN)  04 000 00  1    0    0   0   0    0    0    00
(XEN)  05 000 00  1    0    0   0   0    0    0    00
(XEN)  06 000 00  1    0    0   0   0    0    0    00
(XEN)  07 000 00  1    0    0   0   0    0    0    00
(XEN)  08 000 00  1    0    0   0   0    0    0    00
(XEN)  09 000 00  1    0    0   0   0    0    0    00
(XEN)  0a 000 00  1    0    0   0   0    0    0    00
(XEN)  0b 000 00  1    0    0   0   0    0    0    00
(XEN)  0c 000 00  1    0    0   0   0    0    0    00
(XEN)  0d 000 00  1    0    0   0   0    0    0    00
(XEN)  0e 000 00  1    0    0   0   0    0    0    00
(XEN)  0f 000 00  1    0    0   0   0    0    0    00
(XEN)  10 000 00  1    0    0   0   0    0    0    00
(XEN)  11 000 00  1    0    0   0   0    0    0    00
(XEN)  12 000 00  1    0    0   0   0    0    0    00
(XEN)  13 000 00  1    0    0   0   0    0    0    00
(XEN)  14 000 00  1    0    0   0   0    0    0    00
(XEN)  15 000 00  1    0    0   0   0    0    0    00
(XEN)  16 000 00  1    0    0   0   0    0    0    00
(XEN)  17 000 00  1    0    0   0   0    0    0    00
(XEN)
(XEN) IO APIC #11......
(XEN) .... register #00: 0B000000
(XEN) .......    : physical APIC id: 0B
(XEN) .......    : Delivery Type: 0
(XEN) .......    : LTS          : 0
(XEN) .... register #01: 00178020
(XEN) .......     : max redirection entries: 0017
(XEN) .......     : PRQ implemented: 1
(XEN) .......     : IO APIC version: 0020
(XEN) .... register #02: 0B000000
(XEN) .......     : arbitration: 0B
(XEN) .... register #03: 00000001
(XEN) .......     : Boot DT    : 1
(XEN) .... IRQ redirection table:
(XEN)  NR Log Phy Mask Trig IRR Pol Stat Dest Deli Vect:
(XEN)  00 003 03  1    1    0   1   0    1    1    D9
(XEN)  01 000 00  1    0    0   0   0    0    0    00
(XEN)  02 000 00  1    0    0   0   0    0    0    00
(XEN)  03 000 00  1    0    0   0   0    0    0    00
(XEN)  04 000 00  1    0    0   0   0    0    0    00
(XEN)  05 000 00  1    0    0   0   0    0    0    00
(XEN)  06 000 00  1    0    0   0   0    0    0    00
(XEN)  07 000 00  1    0    0   0   0    0    0    00
(XEN)  08 000 00  1    0    0   0   0    0    0    00
(XEN)  09 000 00  1    0    0   0   0    0    0    00
(XEN)  0a 000 00  1    0    0   0   0    0    0    00
(XEN)  0b 000 00  1    0    0   0   0    0    0    00
(XEN)  0c 000 00  1    0    0   0   0    0    0    00
(XEN)  0d 000 00  1    0    0   0   0    0    0    00
(XEN)  0e 000 00  1    0    0   0   0    0    0    00
(XEN)  0f 000 00  1    0    0   0   0    0    0    00
(XEN)  10 000 00  1    0    0   0   0    0    0    00
(XEN)  11 000 00  1    0    0   0   0    0    0    00
(XEN)  12 000 00  1    0    0   0   0    0    0    00
(XEN)  13 000 00  1    0    0   0   0    0    0    00
(XEN)  14 000 00  1    0    0   0   0    0    0    00
(XEN)  15 000 00  1    0    0   0   0    0    0    00
(XEN)  16 000 00  1    0    0   0   0    0    0    00
(XEN)  17 000 00  1    0    0   0   0    0    0    00
(XEN) IRQ to pin mappings:
(XEN) IRQ0 -> 0:2
(XEN) IRQ1 -> 0:1
(XEN) IRQ3 -> 0:3
(XEN) IRQ4 -> 0:4
(XEN) IRQ6 -> 0:6
(XEN) IRQ7 -> 0:7
(XEN) IRQ8 -> 0:8
(XEN) IRQ12 -> 0:12
(XEN) IRQ13 -> 0:13
(XEN) IRQ14 -> 0:14
(XEN) IRQ15 -> 0:15
(XEN) IRQ16 -> 0:16
(XEN) IRQ17 -> 0:17
(XEN) IRQ18 -> 0:18
(XEN) IRQ19 -> 0:19
(XEN) IRQ24 -> 1:0
(XEN) IRQ48 -> 2:0
(XEN) IRQ49 -> 2:1
(XEN) IRQ72 -> 3:0
(XEN) IRQ96 -> 4:0
(XEN) .................................... done.
(XEN) Using local APIC timer interrupts.
(XEN) Calibrating APIC timer for CPU0...
(XEN) ..... CPU speed is 2665.8724 MHz.
(XEN) ..... Bus speed is 133.2935 MHz.
(XEN) ..... bus_scale = 0x0000887F
(XEN) checking TSC synchronization across CPUs: passed.
(XEN) Time init:
(XEN) .... System Time: 11475493ns
(XEN) .... cpu_freq:    00000000:9EE7CBD0
(XEN) .... scale:       00000001:8018E8DF
(XEN) .... Wall Clock:  1092181194s 30000us
(XEN) PCI: PCI BIOS revision 2.10 entry at 0xf0031, last bus=7
(XEN) PCI: Using configuration type 1
(XEN) PCI: Probing PCI hardware
(XEN) PCI: Probing PCI hardware (bus 00)
(XEN) PCI: Ignoring BAR0-3 of IDE controller 00:1f.1
(XEN) Transparent bridge - PCI device 8086:244e
(XEN) PCI: Using IRQ router PIIX/ICH [8086/2480] at 00:1f.0
(XEN) PCI->APIC IRQ transform: (B0,I29,P0) -> 16
(XEN) PCI->APIC IRQ transform: (B0,I31,P0) -> 18
(XEN) PCI->APIC IRQ transform: (B0,I31,P1) -> 17
(XEN) PCI->APIC IRQ transform: (B7,I1,P0) -> 48
(XEN) PCI->APIC IRQ transform: (B7,I1,P1) -> 49
(XEN) PCI->APIC IRQ transform: (B6,I3,P0) -> 24
(XEN) PCI->APIC IRQ transform: (B4,I3,P0) -> 96
(XEN) PCI->APIC IRQ transform: (B3,I3,P0) -> 72
(XEN) PCI->APIC IRQ transform: (B1,I1,P0) -> 19
(XEN) PCI->APIC IRQ transform: (B1,I2,P0) -> 18
(XEN) PCI->APIC IRQ transform: (B1,I3,P0) -> 18
(XEN) *** LOADING DOMAIN 0 ***
(XEN) Xen-ELF header found: 'GUEST_OS=linux,GUEST_VER=2.4,XEN_VER=1.3,VIRT_BASE=0xC0000000'
(XEN) PHYSICAL MEMORY ARRANGEMENT:
(XEN)  Kernel image:  02800000->02a878fc
(XEN)  Initrd image:  00000000->00000000
(XEN)  Dom0 alloc.:   02c00000->0ac00000
(XEN) VIRTUAL MEMORY ARRANGEMENT:
(XEN)  Loaded kernel: c0100000->c03cdc0c
(XEN)  Init. ramdisk: c03ce000->c03ce000
(XEN)  Phys-Mach map: c03ce000->c03ee000
(XEN)  Page tables:   c03ee000->c03f1000
(XEN)  Start info:    c03f1000->c03f2000
(XEN)  Boot stack:    c03f2000->c03f3000
(XEN)  TOTAL:         c0000000->c0800000
(XEN)  ENTRY ADDRESS: c0100000
(XEN) *** Serial input -> DOM0 (type 'CTRL-a' three times to switch input to Xen).
(XEN) Give DOM0 read access to all PCI devices
Linux version 2.4.26-xen0 (root@filer11.local) (gcc version 3.3.3 20040412 (Red Hat Linux 3.3.3-7)) #4 Wed Aug 11 01:19:07 CEST 2004
On node 0 totalpages: 32768
zone(0): 4096 pages.
zone(1): 28672 pages.
zone(2): 0 pages.
Kernel command line: /boot/vmlinuz-2.4.26-xen0 ro root=/dev/sda1 console=ttyS0
Initializing CPU#0
Xen reported: 2665.991 MHz processor.
Console: colour VGA+ 80x25
Calibrating delay loop... 5321.52 BogoMIPS
Memory: 126504k/131072k available (1892k kernel code, 4568k reserved, 578k data, 96k init, 0k highmem)
Dentry cache hash table entries: 16384 (order: 5, 131072 bytes)
Inode cache hash table entries: 8192 (order: 4, 65536 bytes)
Mount cache hash table entries: 512 (order: 0, 4096 bytes)
Buffer cache hash table entries: 8192 (order: 3, 32768 bytes)
Page-cache hash table entries: 32768 (order: 5, 131072 bytes)
CPU: L1 I cache: 12K, L1 D cache: 8K
CPU: L2 cache: 512K
CPU: Intel(R) Xeon(TM) CPU 2.66GHz stepping 05
POSIX conformance testing by UNIFIX
PCI: Probing PCI hardware
PCI: Probing PCI hardware (bus 00)
PCI: Probing PCI hardware (bus 01)
PCI: Probing PCI hardware (bus 02)
PCI: Probing PCI hardware (bus 03)
PCI: Probing PCI hardware (bus 04)
PCI: Probing PCI hardware (bus 05)
PCI: Probing PCI hardware (bus 06)
PCI: Probing PCI hardware (bus 07)
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Initializing RT netlink socket
Starting kswapd
Journalled Block Device driver loaded
Installing knfsd (copyright (C) 1996 okir@monad.swb.de).
Event-channel device installed.
Xen virtual console successfully installed as ttyS
Starting Xen Balloon driver
Detected PS/2 Mouse Port.
pty: 256 Unix98 ptys configured
RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
loop: loaded (max 8 devices)
Intel(R) PRO/1000 Network Driver - version 5.2.30.1-k1
Copyright (c) 1999-2004 Intel Corporation.
PCI: Obtained IRQ 48 for device 07:01.0
eth0: Intel(R) PRO/1000 Network Connection
PCI: Obtained IRQ 49 for device 07:01.1
eth1: Intel(R) PRO/1000 Network Connection
pcnet32.c:v1.28 02.20.2004 tsbogend@alpha.franken.de
Intel(R) PRO/100 Network Driver - version 2.3.38-k1
Copyright (c) 2004 Intel Corporation

PCI: Obtained IRQ 19 for device 01:01.0
e100: eth2: Intel(R) PRO/100 Network Connection
  Hardware receive checksums enabled

Uniform Multi-Platform E-IDE driver Revision: 7.00beta4-2.4
ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
ICH3: IDE controller at PCI slot 00:1f.1
PCI: Enabling device 00:1f.1 (0005 -> 0007)
PCI: Obtained IRQ 18 for device 00:1f.1
ICH3: chipset revision 2
ICH3: not 100% native mode: will probe irqs later
    ide0: BM-DMA at 0xffa0-0xffa7, BIOS settings: hda:pio, hdb:pio
    ide1: BM-DMA at 0xffa8-0xffaf, BIOS settings: hdc:pio, hdd:pio
hdb: TEAC CD-552E, ATAPI CD/DVD-ROM drive
ide0 at 0x1f0-0x1f7,0x3f6 on irq 14
hdb: attached ide-cdrom driver.
hdb: ATAPI 52X CD-ROM drive, 128kB Cache, UDMA(33)
Uniform CD-ROM driver Revision: 3.12
SCSI subsystem driver Revision: 1.00
scsi0 : SCSI host adapter emulation for IDE ATAPI devices
3w-xxxx: tw_scsi_detect()
3ware Storage Controller device driver for Linux v1.02.00.037.
3w-xxxx: tw_findcards()
PCI: Obtained IRQ 72 for device 03:03.0
3w-xxxx: tw_initialize_device_extension()
3w-xxxx: tw_allocate_memory()
3w-xxxx: tw_allocate_memory()
3w-xxxx: tw_aen_drain_queue()
3w-xxxx: tw_check_bits(): No expected bits (0x13005002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: AEN: INFO: AEN queue empty.
3w-xxxx: tw_initialize_units()
3w-xxxx: tw_initialize_units(): Unit 0 found.
3w-xxxx: Found unit 0 to be a raid5 unit.
3w-xxxx: tw_initconnection()
scsi1 : Found a 3ware Storage Controller at 0xb800, IRQ: 72, P-chip: 1.3
3w-xxxx: tw_setup_irq()
3w-xxxx: tw_interrupt()
PCI: Obtained IRQ 96 for device 04:03.0
3w-xxxx: tw_initialize_device_extension()
3w-xxxx: tw_allocate_memory()
3w-xxxx: tw_allocate_memory()
3w-xxxx: tw_aen_drain_queue()
3w-xxxx: tw_check_bits(): No expected bits (0x13005002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
.....
.....endless loop
.....

*********** REPLY SEPARATOR  ***********

On 10.08.2004 at 20:42 Christian Limpach wrote:

>On Tue, Aug 10, 2004 at 12:16:21AM +0200, Sven Kretzschmar wrote:
>> Ok, here are the outputs:
>>
>> 1.) the config diffs (I can not garantee any more that this is an
>orginal .config,
>>      because I now already tried some things to make it perhaps work...,
>however it's still
>>      CONFIG_NOHIGHMEM=y ?!):
>
>The failure you showed can only occur with a kernel with CONFIG_HIGHMEM
>enabled.  In any case, highmem should now work on 2.6.
>
>Re the 3ware problems:
>Could you build a 2.6 dom0 kernel with #define TW_DEBUG added before
>the dprintk macro gets defined around line 248 (the file is
>linux-2.6.7-xen0/drivers/scsi/3w-xxxx.h), like this:
>#define TW_DEBUG 1
>#ifdef TW_DEBUG
>#define dprintk(msg...) printk(msg)
>#else
>#define dprintk(msg...) do { } while(0)
>#endif
>
>Also, does the boot get to the point where it prints a line like:
>Found a 3ware Storage Controller...
>I couldn't find a mail from you which included dmesg output of a failed
>2.6 boot, please include all the output from Xen and from dom0 when
>you boot with TW_DEBUG enabled.
>
>    christian





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Re: Problems booting with 3ware Controllers

[Christian Limpach]

On Wed, Aug 11, 2004 at 01:47:11AM +0200, Sven Kretzschmar wrote:
> Unresolved symbols in ...../3w-xxxx.o
> depmod:   force_evtchn_callback
> 
> looks like a missing EXPORT_SYMBOL statement, but I am
> not sure if this has anything to do with my problems when
> booting with the 3ware drivers compiled into the kernel; I think
> it hasn't ...

Keir has fixed this.

> OK, I attached now the output while booting with TW_DEBUG=1.
> Caveat: It's from the 2.4. Xenolinux, because that compiled quicker :-/
> Don't pay too much attention at that part:
> "3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
> 3w-xxxx: tw_poll_status(): Unexpected bits."
> ...because it also shows up when booting a vanilla 2.4.26 kernel
> (successfully !), but without the endless loop.

Are you sure it gets into an endless loop?  Because you indicated
earlier that it does find both cards, so it should find the 2nd
card after a long stream of tw_check_bits/tw_poll_status messages.
Because the interesting part will be after it found both cards and
tries to use them...  At least PCI setup und interrupt routing
looks allright.

> BTW: How can I catch the output of a normal 2.4.26 kernel via
> serial line ? What kernel options do I have to set exactly ?
> I tried "com1=115200,8n1 console=ttyS0" like with xenolinux,
> but it did not work ?

You need to enable the serial drivers (on by default) and there's
a console on serial line just next to it.  The syntax for the
command line is: console=ttyS0,115200n8
I don't know if a com1= option is supported...

> Tomorrow I will also try to boot only with one 3ware controller;
> currently, there are 2 controllers connected to the machine.
> And I will send you the output of a 2.6. kernel, if still necessary

Please try to get the output after the endless loop or confirm that
it doesn't find the 2nd card without TW_DEBUG set.

    christian



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Re: Problems booting with 3ware Controllers

[Sven Kretzschmar]

[-- Attachment #1: Type: text/plain, Size: 2238 bytes --]

Sorry for cutting the dump too early :-(

Attached is the complete dump, that I did yesterday.
I will also start now with only 1 controler and send 
this dump too (and I will dump many more lines this time...)

Sven


*********** REPLY SEPARATOR  ***********

On 11.08.2004 at 09:51 Christian Limpach wrote:

>On Wed, Aug 11, 2004 at 01:47:11AM +0200, Sven Kretzschmar wrote:
>> Unresolved symbols in ...../3w-xxxx.o
>> depmod:   force_evtchn_callback
>> 
>> looks like a missing EXPORT_SYMBOL statement, but I am
>> not sure if this has anything to do with my problems when
>> booting with the 3ware drivers compiled into the kernel; I think
>> it hasn't ...
>
>Keir has fixed this.
>
>> OK, I attached now the output while booting with TW_DEBUG=1.
>> Caveat: It's from the 2.4. Xenolinux, because that compiled quicker :-/
>> Don't pay too much attention at that part:
>> "3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
>> 3w-xxxx: tw_poll_status(): Unexpected bits."
>> ...because it also shows up when booting a vanilla 2.4.26 kernel
>> (successfully !), but without the endless loop.
>
>Are you sure it gets into an endless loop?  Because you indicated
>earlier that it does find both cards, so it should find the 2nd
>card after a long stream of tw_check_bits/tw_poll_status messages.
>Because the interesting part will be after it found both cards and
>tries to use them...  At least PCI setup und interrupt routing
>looks allright.
>
>> BTW: How can I catch the output of a normal 2.4.26 kernel via
>> serial line ? What kernel options do I have to set exactly ?
>> I tried "com1=115200,8n1 console=ttyS0" like with xenolinux,
>> but it did not work ?
>
>You need to enable the serial drivers (on by default) and there's
>a console on serial line just next to it.  The syntax for the
>command line is: console=ttyS0,115200n8
>I don't know if a com1= option is supported...
>
>> Tomorrow I will also try to boot only with one 3ware controller;
>> currently, there are 2 controllers connected to the machine.
>> And I will send you the output of a 2.6. kernel, if still necessary
>
>Please try to get the output after the endless loop or confirm that
>it doesn't find the 2nd card without TW_DEBUG set.
>
>    christian



[-- Attachment #2: bootdump.txt --]
[-- Type: text/plain, Size: 86140 bytes --]

 __  __            _   _____        _                _ 
 \ \/ /___ _ __   / | |___ /     __| | _____   _____| |
  \  // _ \ '_ \  | |   |_ \ __ / _` |/ _ \ \ / / _ \ |
  /  \  __/ | | | | |_ ___) |__| (_| |  __/\ V /  __/ |
 /_/\_\___|_| |_| |_(_)____/    \__,_|\___| \_/ \___|_|
                                                       
 http://www.cl.cam.ac.uk/netos/xen
 University of Cambridge Computer Laboratory

 Xen version 1.3-devel (root@local) (gcc version 3.3.3 20040412 (Red Hat Linux 3.3.3-7)) Wed Aug 11 00:46:15 CEST 2004

(XEN) Initialised 1023MB memory (262128 pages) on a 1023MB machine
(XEN) Xen heap size is 10604KB
(XEN) CPU0: Before vendor init, caps: bfebfbff 00000000 00000000, vendor = 0
(XEN) CPU#0: Hyper-Threading is disabled
(XEN) CPU caps: bfebfbff 00000000 00000000 00000000
(XEN) found SMP MP-table at 000ff780
(XEN) Memory Reservation 0xff780, 4096 bytes
(XEN) Memory Reservation 0xf9500, 4096 bytes
(XEN) ACPI: RSDP (v000 ACPIAM                                    ) @ 0x000f4fa0
(XEN) ACPI: RSDT (v001 A M I  OEMRSDT  0x02000304 MSFT 0x00000097) @ 0x3fff0000
(XEN) ACPI: FADT (v002 A M I  OEMFACP  0x02000304 MSFT 0x00000097) @ 0x3fff0200
(XEN) ACPI: MADT (v001 A M I  OEMAPIC  0x02000304 MSFT 0x00000097) @ 0x3fff0300
(XEN) ACPI: OEMB (v001 A M I  OEMBIOS  0x02000304 MSFT 0x00000097) @ 0x3ffff040
(XEN) ACPI: DSDT (v001  0ABBP 0ABBP000 0x00000000 INTL 0x02002026) @ 0x00000000
(XEN) ACPI: Local APIC address 0xfee00000
(XEN) ACPI: LAPIC (acpi_id[0x01] lapic_id[0x00] enabled)
(XEN) Processor #0 Pentium 4(tm) XEON(tm) APIC version 20
(XEN) ACPI: LAPIC (acpi_id[0x02] lapic_id[0x06] enabled)
(XEN) Processor #6 Pentium 4(tm) XEON(tm) APIC version 20
(XEN) ACPI: LAPIC (acpi_id[0x03] lapic_id[0x82] disabled)
(XEN) Processor #130 invalid (max 16)
(XEN) ACPI: LAPIC (acpi_id[0x04] lapic_id[0x83] disabled)
(XEN) Processor #131 invalid (max 16)
(XEN) Using ACPI for processor (LAPIC) configuration information
(XEN) Intel MultiProcessor Specification v1.4
(XEN)     Virtual Wire compatibility mode.
(XEN) OEM ID: INTEL    Product ID: KingsCanyonC APIC at: 0xFEE00000
(XEN) I/O APIC #7 Version 32 at 0xFEC00000.
(XEN) I/O APIC #8 Version 32 at 0xFEC80000.
(XEN) I/O APIC #9 Version 32 at 0xFEC80400.
(XEN) I/O APIC #10 Version 32 at 0xFEC81000.
(XEN) I/O APIC #11 Version 32 at 0xFEC81400.
(XEN) Enabling APIC mode: Flat.	Using 5 I/O APICs
(XEN) Processors: 2
(XEN) Using scheduler: Borrowed Virtual Time (bvt)
(XEN) Initializing CPU#0
(XEN) Detected 2665.991 MHz processor.
(XEN) CPU0: Before vendor init, caps: bfebfbff 00000000 00000000, vendor = 0
(XEN) CPU#0: Hyper-Threading is disabled
(XEN) CPU caps: bfebfbff 00000000 00000000 00000000
(XEN) CPU0 booted
(XEN) enabled ExtINT on CPU#0
(XEN) ESR value before enabling vector: 00000000
(XEN) ESR value after enabling vector: 00000000
(XEN) Booting processor 1/6 eip 90000
(XEN) Initializing CPU#1
(XEN) masked ExtINT on CPU#1
(XEN) ESR value before enabling vector: 00000000
(XEN) ESR value after enabling vector: 00000000
(XEN) CPU1: Before vendor init, caps: bfebfbff 00000000 00000000, vendor = 0
(XEN) CPU#1: Hyper-Threading is disabled
(XEN) CPU caps: bfebfbff 00000000 00000000 00000000
(XEN) CPU1 has booted.
(XEN) Total of 2 processors activated.
(XEN) ENABLING IO-APIC IRQs
(XEN) Setting 7 in the phys_id_present_map
(XEN) ...changing IO-APIC physical APIC ID to 7 ... ok.
(XEN) Setting 8 in the phys_id_present_map
(XEN) ...changing IO-APIC physical APIC ID to 8 ... ok.
(XEN) Setting 9 in the phys_id_present_map
(XEN) ...changing IO-APIC physical APIC ID to 9 ... ok.
(XEN) Setting 10 in the phys_id_present_map
(XEN) ...changing IO-APIC physical APIC ID to 10 ... ok.
(XEN) Setting 11 in the phys_id_present_map
(XEN) ...changing IO-APIC physical APIC ID to 11 ... ok.
(XEN) init IO_APIC IRQs
(XEN) ..TIMER: vector=0x41 pin1=2 pin2=0
(XEN) number of MP IRQ sources: 23.
(XEN) number of IO-APIC #7 registers: 24.
(XEN) number of IO-APIC #8 registers: 24.
(XEN) number of IO-APIC #9 registers: 24.
(XEN) number of IO-APIC #10 registers: 24.
(XEN) number of IO-APIC #11 registers: 24.
(XEN) testing the IO APIC.......................
(XEN) 
(XEN) IO APIC #7......
(XEN) .... register #00: 07000000
(XEN) .......    : physical APIC id: 07
(XEN) .......    : Delivery Type: 0
(XEN) .......    : LTS          : 0
(XEN) .... register #01: 00178020
(XEN) .......     : max redirection entries: 0017
(XEN) .......     : PRQ implemented: 1
(XEN) .......     : IO APIC version: 0020
(XEN) .... register #02: 00000000
(XEN) .......     : arbitration: 00
(XEN) .... register #03: 00000001
(XEN) .......     : Boot DT    : 1
(XEN) .... IRQ redirection table:
(XEN)  NR Log Phy Mask Trig IRR Pol Stat Dest Deli Vect:   
(XEN)  00 000 00  1    0    0   0   0    0    0    00
(XEN)  01 003 03  0    0    0   0   0    1    1    49
(XEN)  02 003 03  0    0    0   0   0    1    1    41
(XEN)  03 003 03  0    0    0   0   0    1    1    51
(XEN)  04 003 03  0    0    0   0   0    1    1    59
(XEN)  05 000 00  1    0    0   0   0    0    0    00
(XEN)  06 003 03  0    0    0   0   0    1    1    61
(XEN)  07 003 03  0    0    0   0   0    1    1    69
(XEN)  08 003 03  0    0    0   0   0    1    1    71
(XEN)  09 000 00  1    0    0   0   0    0    0    00
(XEN)  0a 000 00  1    0    0   0   0    0    0    00
(XEN)  0b 000 00  1    0    0   0   0    0    0    00
(XEN)  0c 003 03  0    0    0   0   0    1    1    79
(XEN)  0d 003 03  0    0    0   0   0    1    1    81
(XEN)  0e 003 03  0    0    0   0   0    1    1    89
(XEN)  0f 003 03  0    0    0   0   0    1    1    91
(XEN)  10 003 03  1    1    0   1   0    1    1    99
(XEN)  11 003 03  1    1    0   1   0    1    1    A1
(XEN)  12 003 03  1    1    0   1   0    1    1    A9
(XEN)  13 003 03  1    1    0   1   0    1    1    B1
(XEN)  14 000 00  1    0    0   0   0    0    0    00
(XEN)  15 000 00  1    0    0   0   0    0    0    00
(XEN)  16 000 00  1    0    0   0   0    0    0    00
(XEN)  17 000 00  1    0    0   0   0    0    0    00
(XEN) 
(XEN) IO APIC #8......
(XEN) .... register #00: 08000000
(XEN) .......    : physical APIC id: 08
(XEN) .......    : Delivery Type: 0
(XEN) .......    : LTS          : 0
(XEN) .... register #01: 00178020
(XEN) .......     : max redirection entries: 0017
(XEN) .......     : PRQ implemented: 1
(XEN) .......     : IO APIC version: 0020
(XEN) .... register #02: 08000000
(XEN) .......     : arbitration: 08
(XEN) .... register #03: 00000001
(XEN) .......     : Boot DT    : 1
(XEN) .... IRQ redirection table:
(XEN)  NR Log Phy Mask Trig IRR Pol Stat Dest Deli Vect:   
(XEN)  00 003 03  1    1    0   1   0    1    1    B9
(XEN)  01 000 00  1    0    0   0   0    0    0    00
(XEN)  02 000 00  1    0    0   0   0    0    0    00
(XEN)  03 000 00  1    0    0   0   0    0    0    00
(XEN)  04 000 00  1    0    0   0   0    0    0    00
(XEN)  05 000 00  1    0    0   0   0    0    0    00
(XEN)  06 000 00  1    0    0   0   0    0    0    00
(XEN)  07 000 00  1    0    0   0   0    0    0    00
(XEN)  08 000 00  1    0    0   0   0    0    0    00
(XEN)  09 000 00  1    0    0   0   0    0    0    00
(XEN)  0a 000 00  1    0    0   0   0    0    0    00
(XEN)  0b 000 00  1    0    0   0   0    0    0    00
(XEN)  0c 000 00  1    0    0   0   0    0    0    00
(XEN)  0d 000 00  1    0    0   0   0    0    0    00
(XEN)  0e 000 00  1    0    0   0   0    0    0    00
(XEN)  0f 000 00  1    0    0   0   0    0    0    00
(XEN)  10 000 00  1    0    0   0   0    0    0    00
(XEN)  11 000 00  1    0    0   0   0    0    0    00
(XEN)  12 000 00  1    0    0   0   0    0    0    00
(XEN)  13 000 00  1    0    0   0   0    0    0    00
(XEN)  14 000 00  1    0    0   0   0    0    0    00
(XEN)  15 000 00  1    0    0   0   0    0    0    00
(XEN)  16 000 00  1    0    0   0   0    0    0    00
(XEN)  17 000 00  1    0    0   0   0    0    0    00
(XEN) 
(XEN) IO APIC #9......
(XEN) .... register #00: 09000000
(XEN) .......    : physical APIC id: 09
(XEN) .......    : Delivery Type: 0
(XEN) .......    : LTS          : 0
(XEN) .... register #01: 00178020
(XEN) .......     : max redirection entries: 0017
(XEN) .......     : PRQ implemented: 1
(XEN) .......     : IO APIC version: 0020
(XEN) .... register #02: 09000000
(XEN) .......     : arbitration: 09
(XEN) .... register #03: 00000001
(XEN) .......     : Boot DT    : 1
(XEN) .... IRQ redirection table:
(XEN)  NR Log Phy Mask Trig IRR Pol Stat Dest Deli Vect:   
(XEN)  00 003 03  1    1    0   1   0    1    1    C1
(XEN)  01 003 03  1    1    0   1   0    1    1    C9
(XEN)  02 000 00  1    0    0   0   0    0    0    00
(XEN)  03 000 00  1    0    0   0   0    0    0    00
(XEN)  04 000 00  1    0    0   0   0    0    0    00
(XEN)  05 000 00  1    0    0   0   0    0    0    00
(XEN)  06 000 00  1    0    0   0   0    0    0    00
(XEN)  07 000 00  1    0    0   0   0    0    0    00
(XEN)  08 000 00  1    0    0   0   0    0    0    00
(XEN)  09 000 00  1    0    0   0   0    0    0    00
(XEN)  0a 000 00  1    0    0   0   0    0    0    00
(XEN)  0b 000 00  1    0    0   0   0    0    0    00
(XEN)  0c 000 00  1    0    0   0   0    0    0    00
(XEN)  0d 000 00  1    0    0   0   0    0    0    00
(XEN)  0e 000 00  1    0    0   0   0    0    0    00
(XEN)  0f 000 00  1    0    0   0   0    0    0    00
(XEN)  10 000 00  1    0    0   0   0    0    0    00
(XEN)  11 000 00  1    0    0   0   0    0    0    00
(XEN)  12 000 00  1    0    0   0   0    0    0    00
(XEN)  13 000 00  1    0    0   0   0    0    0    00
(XEN)  14 000 00  1    0    0   0   0    0    0    00
(XEN)  15 000 00  1    0    0   0   0    0    0    00
(XEN)  16 000 00  1    0    0   0   0    0    0    00
(XEN)  17 000 00  1    0    0   0   0    0    0    00
(XEN) 
(XEN) IO APIC #10......
(XEN) .... register #00: 0A000000
(XEN) .......    : physical APIC id: 0A
(XEN) .......    : Delivery Type: 0
(XEN) .......    : LTS          : 0
(XEN) .... register #01: 00178020
(XEN) .......     : max redirection entries: 0017
(XEN) .......     : PRQ implemented: 1
(XEN) .......     : IO APIC version: 0020
(XEN) .... register #02: 0A000000
(XEN) .......     : arbitration: 0A
(XEN) .... register #03: 00000001
(XEN) .......     : Boot DT    : 1
(XEN) .... IRQ redirection table:
(XEN)  NR Log Phy Mask Trig IRR Pol Stat Dest Deli Vect:   
(XEN)  00 003 03  1    1    0   1   0    1    1    D1
(XEN)  01 000 00  1    0    0   0   0    0    0    00
(XEN)  02 000 00  1    0    0   0   0    0    0    00
(XEN)  03 000 00  1    0    0   0   0    0    0    00
(XEN)  04 000 00  1    0    0   0   0    0    0    00
(XEN)  05 000 00  1    0    0   0   0    0    0    00
(XEN)  06 000 00  1    0    0   0   0    0    0    00
(XEN)  07 000 00  1    0    0   0   0    0    0    00
(XEN)  08 000 00  1    0    0   0   0    0    0    00
(XEN)  09 000 00  1    0    0   0   0    0    0    00
(XEN)  0a 000 00  1    0    0   0   0    0    0    00
(XEN)  0b 000 00  1    0    0   0   0    0    0    00
(XEN)  0c 000 00  1    0    0   0   0    0    0    00
(XEN)  0d 000 00  1    0    0   0   0    0    0    00
(XEN)  0e 000 00  1    0    0   0   0    0    0    00
(XEN)  0f 000 00  1    0    0   0   0    0    0    00
(XEN)  10 000 00  1    0    0   0   0    0    0    00
(XEN)  11 000 00  1    0    0   0   0    0    0    00
(XEN)  12 000 00  1    0    0   0   0    0    0    00
(XEN)  13 000 00  1    0    0   0   0    0    0    00
(XEN)  14 000 00  1    0    0   0   0    0    0    00
(XEN)  15 000 00  1    0    0   0   0    0    0    00
(XEN)  16 000 00  1    0    0   0   0    0    0    00
(XEN)  17 000 00  1    0    0   0   0    0    0    00
(XEN) 
(XEN) IO APIC #11......
(XEN) .... register #00: 0B000000
(XEN) .......    : physical APIC id: 0B
(XEN) .......    : Delivery Type: 0
(XEN) .......    : LTS          : 0
(XEN) .... register #01: 00178020
(XEN) .......     : max redirection entries: 0017
(XEN) .......     : PRQ implemented: 1
(XEN) .......     : IO APIC version: 0020
(XEN) .... register #02: 0B000000
(XEN) .......     : arbitration: 0B
(XEN) .... register #03: 00000001
(XEN) .......     : Boot DT    : 1
(XEN) .... IRQ redirection table:
(XEN)  NR Log Phy Mask Trig IRR Pol Stat Dest Deli Vect:   
(XEN)  00 003 03  1    1    0   1   0    1    1    D9
(XEN)  01 000 00  1    0    0   0   0    0    0    00
(XEN)  02 000 00  1    0    0   0   0    0    0    00
(XEN)  03 000 00  1    0    0   0   0    0    0    00
(XEN)  04 000 00  1    0    0   0   0    0    0    00
(XEN)  05 000 00  1    0    0   0   0    0    0    00
(XEN)  06 000 00  1    0    0   0   0    0    0    00
(XEN)  07 000 00  1    0    0   0   0    0    0    00
(XEN)  08 000 00  1    0    0   0   0    0    0    00
(XEN)  09 000 00  1    0    0   0   0    0    0    00
(XEN)  0a 000 00  1    0    0   0   0    0    0    00
(XEN)  0b 000 00  1    0    0   0   0    0    0    00
(XEN)  0c 000 00  1    0    0   0   0    0    0    00
(XEN)  0d 000 00  1    0    0   0   0    0    0    00
(XEN)  0e 000 00  1    0    0   0   0    0    0    00
(XEN)  0f 000 00  1    0    0   0   0    0    0    00
(XEN)  10 000 00  1    0    0   0   0    0    0    00
(XEN)  11 000 00  1    0    0   0   0    0    0    00
(XEN)  12 000 00  1    0    0   0   0    0    0    00
(XEN)  13 000 00  1    0    0   0   0    0    0    00
(XEN)  14 000 00  1    0    0   0   0    0    0    00
(XEN)  15 000 00  1    0    0   0   0    0    0    00
(XEN)  16 000 00  1    0    0   0   0    0    0    00
(XEN)  17 000 00  1    0    0   0   0    0    0    00
(XEN) IRQ to pin mappings:
(XEN) IRQ0 -> 0:2
(XEN) IRQ1 -> 0:1
(XEN) IRQ3 -> 0:3
(XEN) IRQ4 -> 0:4
(XEN) IRQ6 -> 0:6
(XEN) IRQ7 -> 0:7
(XEN) IRQ8 -> 0:8
(XEN) IRQ12 -> 0:12
(XEN) IRQ13 -> 0:13
(XEN) IRQ14 -> 0:14
(XEN) IRQ15 -> 0:15
(XEN) IRQ16 -> 0:16
(XEN) IRQ17 -> 0:17
(XEN) IRQ18 -> 0:18
(XEN) IRQ19 -> 0:19
(XEN) IRQ24 -> 1:0
(XEN) IRQ48 -> 2:0
(XEN) IRQ49 -> 2:1
(XEN) IRQ72 -> 3:0
(XEN) IRQ96 -> 4:0
(XEN) .................................... done.
(XEN) Using local APIC timer interrupts.
(XEN) Calibrating APIC timer for CPU0...
(XEN) ..... CPU speed is 2665.8724 MHz.
(XEN) ..... Bus speed is 133.2935 MHz.
(XEN) ..... bus_scale = 0x0000887F
(XEN) checking TSC synchronization across CPUs: passed.
(XEN) Time init:
(XEN) .... System Time: 11475493ns
(XEN) .... cpu_freq:    00000000:9EE7CBD0
(XEN) .... scale:       00000001:8018E8DF
(XEN) .... Wall Clock:  1092181194s 30000us
(XEN) PCI: PCI BIOS revision 2.10 entry at 0xf0031, last bus=7
(XEN) PCI: Using configuration type 1
(XEN) PCI: Probing PCI hardware
(XEN) PCI: Probing PCI hardware (bus 00)
(XEN) PCI: Ignoring BAR0-3 of IDE controller 00:1f.1
(XEN) Transparent bridge - PCI device 8086:244e
(XEN) PCI: Using IRQ router PIIX/ICH [8086/2480] at 00:1f.0
(XEN) PCI->APIC IRQ transform: (B0,I29,P0) -> 16
(XEN) PCI->APIC IRQ transform: (B0,I31,P0) -> 18
(XEN) PCI->APIC IRQ transform: (B0,I31,P1) -> 17
(XEN) PCI->APIC IRQ transform: (B7,I1,P0) -> 48
(XEN) PCI->APIC IRQ transform: (B7,I1,P1) -> 49
(XEN) PCI->APIC IRQ transform: (B6,I3,P0) -> 24
(XEN) PCI->APIC IRQ transform: (B4,I3,P0) -> 96
(XEN) PCI->APIC IRQ transform: (B3,I3,P0) -> 72
(XEN) PCI->APIC IRQ transform: (B1,I1,P0) -> 19
(XEN) PCI->APIC IRQ transform: (B1,I2,P0) -> 18
(XEN) PCI->APIC IRQ transform: (B1,I3,P0) -> 18
(XEN) *** LOADING DOMAIN 0 ***
(XEN) Xen-ELF header found: 'GUEST_OS=linux,GUEST_VER=2.4,XEN_VER=1.3,VIRT_BASE=0xC0000000'
(XEN) PHYSICAL MEMORY ARRANGEMENT:
(XEN)  Kernel image:  02800000->02a878fc
(XEN)  Initrd image:  00000000->00000000
(XEN)  Dom0 alloc.:   02c00000->0ac00000
(XEN) VIRTUAL MEMORY ARRANGEMENT:
(XEN)  Loaded kernel: c0100000->c03cdc0c
(XEN)  Init. ramdisk: c03ce000->c03ce000
(XEN)  Phys-Mach map: c03ce000->c03ee000
(XEN)  Page tables:   c03ee000->c03f1000
(XEN)  Start info:    c03f1000->c03f2000
(XEN)  Boot stack:    c03f2000->c03f3000
(XEN)  TOTAL:         c0000000->c0800000
(XEN)  ENTRY ADDRESS: c0100000
(XEN) *** Serial input -> DOM0 (type 'CTRL-a' three times to switch input to Xen).
(XEN) Give DOM0 read access to all PCI devices
Linux version 2.4.26-xen0 (root@filer11.local) (gcc version 3.3.3 20040412 (Red Hat Linux 3.3.3-7)) #4 Wed Aug 11 01:19:07 CEST 2004
On node 0 totalpages: 32768
zone(0): 4096 pages.
zone(1): 28672 pages.
zone(2): 0 pages.
Kernel command line: /boot/vmlinuz-2.4.26-xen0 ro root=/dev/sda1 console=ttyS0
Initializing CPU#0
Xen reported: 2665.991 MHz processor.
Console: colour VGA+ 80x25
Calibrating delay loop... 5321.52 BogoMIPS
Memory: 126504k/131072k available (1892k kernel code, 4568k reserved, 578k data, 96k init, 0k highmem)
Dentry cache hash table entries: 16384 (order: 5, 131072 bytes)
Inode cache hash table entries: 8192 (order: 4, 65536 bytes)
Mount cache hash table entries: 512 (order: 0, 4096 bytes)
Buffer cache hash table entries: 8192 (order: 3, 32768 bytes)
Page-cache hash table entries: 32768 (order: 5, 131072 bytes)
CPU: L1 I cache: 12K, L1 D cache: 8K
CPU: L2 cache: 512K
CPU: Intel(R) Xeon(TM) CPU 2.66GHz stepping 05
POSIX conformance testing by UNIFIX
PCI: Probing PCI hardware
PCI: Probing PCI hardware (bus 00)
PCI: Probing PCI hardware (bus 01)
PCI: Probing PCI hardware (bus 02)
PCI: Probing PCI hardware (bus 03)
PCI: Probing PCI hardware (bus 04)
PCI: Probing PCI hardware (bus 05)
PCI: Probing PCI hardware (bus 06)
PCI: Probing PCI hardware (bus 07)
Linux NET4.0 for Linux 2.4
Based upon Swansea University Computer Society NET3.039
Initializing RT netlink socket
Starting kswapd
Journalled Block Device driver loaded
Installing knfsd (copyright (C) 1996 okir@monad.swb.de).
Event-channel device installed.
Xen virtual console successfully installed as ttyS
Starting Xen Balloon driver
Detected PS/2 Mouse Port.
pty: 256 Unix98 ptys configured
RAMDISK driver initialized: 16 RAM disks of 4096K size 1024 blocksize
loop: loaded (max 8 devices)
Intel(R) PRO/1000 Network Driver - version 5.2.30.1-k1
Copyright (c) 1999-2004 Intel Corporation.
PCI: Obtained IRQ 48 for device 07:01.0
eth0: Intel(R) PRO/1000 Network Connection
PCI: Obtained IRQ 49 for device 07:01.1
eth1: Intel(R) PRO/1000 Network Connection
pcnet32.c:v1.28 02.20.2004 tsbogend@alpha.franken.de
Intel(R) PRO/100 Network Driver - version 2.3.38-k1
Copyright (c) 2004 Intel Corporation

PCI: Obtained IRQ 19 for device 01:01.0
e100: eth2: Intel(R) PRO/100 Network Connection
  Hardware receive checksums enabled

Uniform Multi-Platform E-IDE driver Revision: 7.00beta4-2.4
ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
ICH3: IDE controller at PCI slot 00:1f.1
PCI: Enabling device 00:1f.1 (0005 -> 0007)
PCI: Obtained IRQ 18 for device 00:1f.1
ICH3: chipset revision 2
ICH3: not 100% native mode: will probe irqs later
    ide0: BM-DMA at 0xffa0-0xffa7, BIOS settings: hda:pio, hdb:pio
    ide1: BM-DMA at 0xffa8-0xffaf, BIOS settings: hdc:pio, hdd:pio
hdb: TEAC CD-552E, ATAPI CD/DVD-ROM drive
ide0 at 0x1f0-0x1f7,0x3f6 on irq 14
hdb: attached ide-cdrom driver.
hdb: ATAPI 52X CD-ROM drive, 128kB Cache, UDMA(33)
Uniform CD-ROM driver Revision: 3.12
SCSI subsystem driver Revision: 1.00
scsi0 : SCSI host adapter emulation for IDE ATAPI devices
3w-xxxx: tw_scsi_detect()
3ware Storage Controller device driver for Linux v1.02.00.037.
3w-xxxx: tw_findcards()
PCI: Obtained IRQ 72 for device 03:03.0
3w-xxxx: tw_initialize_device_extension()
3w-xxxx: tw_allocate_memory()
3w-xxxx: tw_allocate_memory()
3w-xxxx: tw_aen_drain_queue()
3w-xxxx: tw_check_bits(): No expected bits (0x13005002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: AEN: INFO: AEN queue empty.
3w-xxxx: tw_initialize_units()
3w-xxxx: tw_initialize_units(): Unit 0 found.
3w-xxxx: Found unit 0 to be a raid5 unit.
3w-xxxx: tw_initconnection()
scsi1 : Found a 3ware Storage Controller at 0xb800, IRQ: 72, P-chip: 1.3
3w-xxxx: tw_setup_irq()
3w-xxxx: tw_interrupt()
PCI: Obtained IRQ 96 for device 04:03.0
3w-xxxx: tw_initialize_device_extension()
3w-xxxx: tw_allocate_memory()
3w-xxxx: tw_allocate_memory()
3w-xxxx: tw_aen_drain_queue()
3w-xxxx: tw_check_bits(): No expected bits (0x13005002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: AEN: INFO: AEN queue empty.
3w-xxxx: tw_initialize_units()
3w-xxxx: tw_initialize_units(): Unit 0 found.
3w-xxxx: tw_initconnection()
scsi2 : Found a 3ware Storage Controller at 0xc800, IRQ: 96, P-chip: 1.3
3w-xxxx: tw_setup_irq()
3w-xxxx: tw_interrupt()
scsi1 : 3ware Storage Controller
scsi2 : 3ware Storage Controller
3w-xxxx: tw_scsi_queue()
3w-xxxx: tw_state_request_start()
3w-xxxx: tw_state_request_start(): id = 0.
3w-xxxx: tw_scsi_queue(): caught INQUIRY.
3w-xxxx: tw_scsiop_inquiry()
3w-xxxx: tw_post_command_packet()
3w-xxxx: tw_scsi_eh_abort()
3w-xxxx: scsi1: Unit #0: Command (c1371000) timed out, resetting card.
3w-xxxx: tw_reset_device_extension()
3w-xxxx: tw_aen_drain_queue()
3w-xxxx: tw_check_bits(): No expected bits (0x13001002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: AEN: INFO: AEN queue empty.
3w-xxxx: tw_initconnection()
3w-xxxx: tw_unamp_scsi_data()
3w-xxxx: tw_scsi_queue()
3w-xxxx: tw_state_request_start()
3w-xxxx: tw_state_request_start(): id = 0.
3w-xxxx: tw_scsi_queue(): caught TEST_UNIT_READY.
3w-xxxx: tw_scsiop_test_unit_ready()
3w-xxxx: tw_post_command_packet()
3w-xxxx: tw_scsi_eh_abort()
3w-xxxx: scsi1: Unit #0: Command (c1371000) timed out, resetting card.
3w-xxxx: tw_reset_device_extension()
3w-xxxx: tw_aen_drain_queue()
3w-xxxx: tw_check_bits(): No expected bits (0x13001002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: tw_check_bits(): No expected bits (0x13025002).
3w-xxxx: tw_poll_status(): Unexpected bits.
3w-xxxx: tw_decode_bits()
3w-xxxx: AEN: INFO: AEN queue empty.
3w-xxxx: tw_initconnection()
3w-xxxx: tw_unamp_scsi_data()
3w-xxxx: tw_scsi_eh_reset()

** ctrl-b quits miniterm **

Re: Problems booting with 3ware Controllers

[Sven Kretzschmar]

[-- Attachment #1: Type: text/plain, Size: 2862 bytes --]


Attached is a complete very long dump, which I gzipped
before posting now (first post failed, because it was too big --
I didn't look at the size before posting, mea culpa :-/ )
This is a boot dump from a 2.4. Xen kernel and only
_one_ 3ware card, in order to simplify things.
I did let it run some time to be sure enough that it's really an infinite loop...
I think the line:
"scsi: device set offline - not ready or command retry failed after host reset: host 1 channel 0 id X lun 0"
is interesting.
Every time it is printed, the 'id X' gets incremented by one (range 1-5 in this dump).
I am not an SCSI expert, but shouldn't this always be the same id in this case ?!
Did you test other SCSI controlers at the lab ? Is this only a 3ware specific problem ?

HTH,
  Sven


*********** REPLY SEPARATOR  ***********

On 11.08.2004 at 09:51 Christian Limpach wrote:

>On Wed, Aug 11, 2004 at 01:47:11AM +0200, Sven Kretzschmar wrote:
>> Unresolved symbols in ...../3w-xxxx.o
>> depmod:   force_evtchn_callback
>>
>> looks like a missing EXPORT_SYMBOL statement, but I am
>> not sure if this has anything to do with my problems when
>> booting with the 3ware drivers compiled into the kernel; I think
>> it hasn't ...
>
>Keir has fixed this.
>
>> OK, I attached now the output while booting with TW_DEBUG=1.
>> Caveat: It's from the 2.4. Xenolinux, because that compiled quicker :-/
>> Don't pay too much attention at that part:
>> "3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
>> 3w-xxxx: tw_poll_status(): Unexpected bits."
>> ...because it also shows up when booting a vanilla 2.4.26 kernel
>> (successfully !), but without the endless loop.
>
>Are you sure it gets into an endless loop?  Because you indicated
>earlier that it does find both cards, so it should find the 2nd
>card after a long stream of tw_check_bits/tw_poll_status messages.
>Because the interesting part will be after it found both cards and
>tries to use them...  At least PCI setup und interrupt routing
>looks allright.
>
>> BTW: How can I catch the output of a normal 2.4.26 kernel via
>> serial line ? What kernel options do I have to set exactly ?
>> I tried "com1=115200,8n1 console=ttyS0" like with xenolinux,
>> but it did not work ?
>
>You need to enable the serial drivers (on by default) and there's
>a console on serial line just next to it.  The syntax for the
>command line is: console=ttyS0,115200n8
>I don't know if a com1= option is supported...
>
>> Tomorrow I will also try to boot only with one 3ware controller;
>> currently, there are 2 controllers connected to the machine.
>> And I will send you the output of a 2.6. kernel, if still necessary
>
>Please try to get the output after the endless loop or confirm that
>it doesn't find the 2nd card without TW_DEBUG set.
>
>    christian



[-- Attachment #2: bootdump.txt.gz --]
[-- Type: application/octet-stream, Size: 7460 bytes --]

Re: Problems booting with 3ware Controllers #2

[Sven Kretzschmar]

[-- Attachment #1: Type: text/plain, Size: 2363 bytes --]


The attachment of this post includes a zipped boot dump
of a vanilla 2.4 (non-Xen) kernel, with TW_DEBUG set.
So it shows the 3ware debug output of a successfull boot and
can be used to compare it with my earlier post which
included the debug output of the non successfull boot
of the 2.4 xen kernel with the 3ware controller.

HTH,
  Sven


*********** REPLY SEPARATOR  ***********

On 11.08.2004 at 09:51 Christian Limpach wrote:

>On Wed, Aug 11, 2004 at 01:47:11AM +0200, Sven Kretzschmar wrote:
>> Unresolved symbols in ...../3w-xxxx.o
>> depmod:   force_evtchn_callback
>> 
>> looks like a missing EXPORT_SYMBOL statement, but I am
>> not sure if this has anything to do with my problems when
>> booting with the 3ware drivers compiled into the kernel; I think
>> it hasn't ...
>
>Keir has fixed this.
>
>> OK, I attached now the output while booting with TW_DEBUG=1.
>> Caveat: It's from the 2.4. Xenolinux, because that compiled quicker :-/
>> Don't pay too much attention at that part:
>> "3w-xxxx: tw_check_bits(): No expected bits (0x13025000).
>> 3w-xxxx: tw_poll_status(): Unexpected bits."
>> ...because it also shows up when booting a vanilla 2.4.26 kernel
>> (successfully !), but without the endless loop.
>
>Are you sure it gets into an endless loop?  Because you indicated
>earlier that it does find both cards, so it should find the 2nd
>card after a long stream of tw_check_bits/tw_poll_status messages.
>Because the interesting part will be after it found both cards and
>tries to use them...  At least PCI setup und interrupt routing
>looks allright.
>
>> BTW: How can I catch the output of a normal 2.4.26 kernel via
>> serial line ? What kernel options do I have to set exactly ?
>> I tried "com1=115200,8n1 console=ttyS0" like with xenolinux,
>> but it did not work ?
>
>You need to enable the serial drivers (on by default) and there's
>a console on serial line just next to it.  The syntax for the
>command line is: console=ttyS0,115200n8
>I don't know if a com1= option is supported...
>
>> Tomorrow I will also try to boot only with one 3ware controller;
>> currently, there are 2 controllers connected to the machine.
>> And I will send you the output of a 2.6. kernel, if still necessary
>
>Please try to get the output after the endless loop or confirm that
>it doesn't find the 2nd card without TW_DEBUG set.
>
>    christian



[-- Attachment #2: bd2.gzip --]
[-- Type: application/zip, Size: 10612 bytes --]

Re: Problems booting on a Dual-Xeon with 2.4 and 2.6 kernels

[Keir Fraser]

> Then during boot of the 2.6 kernel I got the following message during boot:
> 
> fixmap and kmap areas overlap - this will crash
> pkstart: ff800000h pkend: ffc00000h fixstart fbeec000h
> ...
> kernel BUG at arch/xen/i386/mm/init.c:583!
> invalid operand: 0000 [#1]
> ...
> <0>Kernel panic: Attempted to kill the idel task!
> In idle task - not syncing

This is due to CONFIG_HIGHMEM currently being broken in our Linux 2.6
port. I guess fixing it won't be very hard.

> During boot, the boot process of the newly installed kernel
> showed that it recognizes the two 3ware Controlers, but then reports the 
> following errors:
> 3w-xxxx: scsi0: Unit #0: Command(c7f92b00) timed out, resetting card.
> 3w-xxxx: scsi0: Unit #0: Command(c7f92b00) timed out, resetting card.
> 3w-xxxx: scsi0: Reset succeeded.
> 
> Then it freezes and nothing more happens.
> I don't know if the boot process would have continued without the 3ware
> drivers, because I have no non-raid disks in this machine...

I'll have a look at the driver. Maybe it's communicating with the
controller in a strange way.

 -- Keir


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xm create weight=x

[G. Milos]

I've just added a new option to the xm create command. The weight of a 
domain (CPU share) can be set with 'weight=something' parameter 
(something can be a float). It
also works if weight is specified in the config file (xmdefaults).

Schedulers which do not have notion of weight (e.g. RRobin) ignore the 
weight argument.

For the default scheduler (BVT) the weights are inversed and then stored 
in an integer field (mcu_advance = 10 / weight). To achieve good
resolution it is therefore good to use relativelly small walues for the 
weight parameter.

Finally - the scheduling parameters can be changed using:
xm bvt
xm fbvt
xm rrobin
xm atropos (if it worked)
calls, depending on which scheduler is currently used.

All the test reports are welcomed, directly to me or to the list.

Cheers
Gregor



-------------------------------------------------------
SF.Net email is sponsored by Shop4tech.com-Lowest price on Blank Media
100pk Sonic DVD-R 4x for only $29 -100pk Sonic DVD+R for only $33
Save 50% off Retail on Ink & Toner - Free Shipping and Free Gift.
http://www.shop4tech.com/z/Inkjet_Cartridges/9_108_r285