* [U-Boot] [PATCH] powerpc/p2041: skip waiting for SERDES bank 3 reset done @ 2013-01-23 8:48 Anatolij Gustschin 2013-01-23 10:17 ` Xie Shaohui-B21989 0 siblings, 1 reply; 6+ messages in thread From: Anatolij Gustschin @ 2013-01-23 8:48 UTC (permalink / raw) To: u-boot Bank 3 is not present on P2041, do not try to wait for RSTDONE for this bank. This fixes the bank 3 reset wait timeout and thus speeds up booting on P2041RDB. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Shaohui Xie <Shaohui.Xie@freescale.com> Cc: Andy Fleming <afleming@freescale.com> --- arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c index 5495dc5..2cea1dc 100644 --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c @@ -579,6 +579,10 @@ void fsl_serdes_init(void) for (lane = 0; lane < SRDS_MAX_LANES; lane++) { enum srds_prtcl lane_prtcl = serdes_get_prtcl(cfg, lane); if (serdes_lane_enabled(lane)) { +#if defined(CONFIG_PPC_P2041) + if (!is_serdes_prtcl_valid(lane_prtcl)) + continue; +#endif have_bank[serdes_get_bank_by_lane(lane)] = 1; serdes_prtcl_map |= (1 << lane_prtcl); } -- 1.7.11.7 ^ permalink raw reply related [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] powerpc/p2041: skip waiting for SERDES bank 3 reset done 2013-01-23 8:48 [U-Boot] [PATCH] powerpc/p2041: skip waiting for SERDES bank 3 reset done Anatolij Gustschin @ 2013-01-23 10:17 ` Xie Shaohui-B21989 2013-01-23 10:36 ` Anatolij Gustschin 0 siblings, 1 reply; 6+ messages in thread From: Xie Shaohui-B21989 @ 2013-01-23 10:17 UTC (permalink / raw) To: u-boot Hello, Anatolij Gustschin, Could you please post the " bank 3 reset wait timeout" dumped by U-boot, I don't see this, and also the RCW dump? Best Regards, Shaohui Xie > -----Original Message----- > From: Anatolij Gustschin [mailto:agust at denx.de] > Sent: Wednesday, January 23, 2013 4:49 PM > To: u-boot at lists.denx.de > Cc: Xie Shaohui-B21989; Fleming Andy-AFLEMING > Subject: [PATCH] powerpc/p2041: skip waiting for SERDES bank 3 reset done > > Bank 3 is not present on P2041, do not try to wait for RSTDONE for this > bank. This fixes the bank 3 reset wait timeout and thus speeds up booting > on P2041RDB. > > Signed-off-by: Anatolij Gustschin <agust@denx.de> > Cc: Shaohui Xie <Shaohui.Xie@freescale.com> > Cc: Andy Fleming <afleming@freescale.com> > --- > arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c > b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c > index 5495dc5..2cea1dc 100644 > --- a/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c > +++ b/arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c > @@ -579,6 +579,10 @@ void fsl_serdes_init(void) > for (lane = 0; lane < SRDS_MAX_LANES; lane++) { > enum srds_prtcl lane_prtcl = serdes_get_prtcl(cfg, lane); > if (serdes_lane_enabled(lane)) { > +#if defined(CONFIG_PPC_P2041) > + if (!is_serdes_prtcl_valid(lane_prtcl)) > + continue; > +#endif > have_bank[serdes_get_bank_by_lane(lane)] = 1; > serdes_prtcl_map |= (1 << lane_prtcl); > } > -- > 1.7.11.7 > ^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] powerpc/p2041: skip waiting for SERDES bank 3 reset done 2013-01-23 10:17 ` Xie Shaohui-B21989 @ 2013-01-23 10:36 ` Anatolij Gustschin 2013-01-24 2:33 ` Xie Shaohui-B21989 0 siblings, 1 reply; 6+ messages in thread From: Anatolij Gustschin @ 2013-01-23 10:36 UTC (permalink / raw) To: u-boot Hello, On Wed, 23 Jan 2013 10:17:44 +0000 Xie Shaohui-B21989 <B21989@freescale.com> wrote: > Hello, Anatolij Gustschin, > > Could you please post the " bank 3 reset wait timeout" dumped by U-boot, > I don't see this, and also the RCW dump? currently I do not have access to the p2041rdb board, but here is the previously captured boot log where I've seen this: U-Boot 2011.09-00000-g2c02d1d (Oct 22 2011 - 18:31:36) CPU0: P2041E, Version: 1.0, (0x82180110) Core: E500MC, Version: 2.2, (0x80230022) Clock Configuration: CPU0:1500 MHz, CPU1:1500 MHz, CPU2:1500 MHz, CPU3:1500 MHz, CCB:750 MHz, DDR:666.667 MHz (1333.333 MT/s data rate) (Asynchronous), LBC:93.750 MHz FMAN1: 583.333 MHz PME: 375 MHz L1: D-cache 32 kB enabled I-cache 32 kB enabled Board: P2041RDB, CPLD version: 4.0 vBank: 0 36-bit Addressing Reset Configuration Word (RCW): 00000000: 12600000 00000000 241c0000 00000000 00000010: 249f40c0 c3c02000 fe800000 40000000 00000020: 00000000 00000000 00000000 d0030f07 00000030: 00000000 00000000 00000000 00000000 SERDES Reference Clocks: Bank1=100Mhz Bank2=125Mhz I2C: ready SPI: ready DRAM: Initializing....using SPD Detected UDIMM UG51U6400N8SU-ACF 2 GiB left unmapped 4 GiB (DDR3, 64-bit, CL=9, ECC off) DDR Chip-Select Interleaving Mode: CS0+CS1 Testing 0x00000000 - 0x7fffffff Testing 0x80000000 - 0xffffffff Remap DDR 2 GiB left unmapped POST memory PASSED Flash: 128 MiB L2: 128 KB enabled Corenet Platform Cache: 1024 KB enabled SERDES: timeout resetting bank 3 SRIO1: disabled SRIO2: disabled MMC: FSL_ESDHC: 0 EEPROM: Invalid ID (ff ff ff ff) PCIe1: disabled PCIe2: Root Complex, no link, regs @ 0xfe201000 PCIe2: Bus 00 - 00 PCIe3: disabled In: serial Out: serial Err: serial Net: Initializing Fman Fman1: DTSEC3 set to unknown interface 11 Fman1: Uploading microcode version 101.8.0 PHY reset timed out FM1 at DTSEC1, FM1 at DTSEC2, FM1 at DTSEC4, FM1 at DTSEC5, FM1 at TGEC1 Hit any key to stop autoboot: 0 Thanks, Anatolij ^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] powerpc/p2041: skip waiting for SERDES bank 3 reset done 2013-01-23 10:36 ` Anatolij Gustschin @ 2013-01-24 2:33 ` Xie Shaohui-B21989 2013-01-24 8:03 ` Anatolij Gustschin 0 siblings, 1 reply; 6+ messages in thread From: Xie Shaohui-B21989 @ 2013-01-24 2:33 UTC (permalink / raw) To: u-boot > Hello, > > On Wed, 23 Jan 2013 10:17:44 +0000 > Xie Shaohui-B21989 <B21989@freescale.com> wrote: > > > Hello, Anatolij Gustschin, > > > > Could you please post the " bank 3 reset wait timeout" dumped by > > U-boot, I don't see this, and also the RCW dump? > > currently I do not have access to the p2041rdb board, but here is the > previously captured boot log where I've seen this: > > > U-Boot 2011.09-00000-g2c02d1d (Oct 22 2011 - 18:31:36) > [S.H] Did you try the latest U-boot? This u-boot is old. I don't see the "time out" dump with the latest U-boot. Best Regards, Shaohui Xie ^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] powerpc/p2041: skip waiting for SERDES bank 3 reset done 2013-01-24 2:33 ` Xie Shaohui-B21989 @ 2013-01-24 8:03 ` Anatolij Gustschin 2013-01-25 8:06 ` Anatolij Gustschin 0 siblings, 1 reply; 6+ messages in thread From: Anatolij Gustschin @ 2013-01-24 8:03 UTC (permalink / raw) To: u-boot Hello, On Thu, 24 Jan 2013 02:33:31 +0000 Xie Shaohui-B21989 <B21989@freescale.com> wrote: ... > > currently I do not have access to the p2041rdb board, but here is the > > previously captured boot log where I've seen this: > > > > > > U-Boot 2011.09-00000-g2c02d1d (Oct 22 2011 - 18:31:36) > > > [S.H] Did you try the latest U-boot? This u-boot is old. I don't see the > "time out" dump with the latest U-boot. I'm not sure which exact version I've tried, IIRC it was v2013-rcX and the problem was there also. I'll have access to the p2041rdb board tomorrow and will tell which exact version it was. Thanks, Anatolij ^ permalink raw reply [flat|nested] 6+ messages in thread
* [U-Boot] [PATCH] powerpc/p2041: skip waiting for SERDES bank 3 reset done 2013-01-24 8:03 ` Anatolij Gustschin @ 2013-01-25 8:06 ` Anatolij Gustschin 0 siblings, 0 replies; 6+ messages in thread From: Anatolij Gustschin @ 2013-01-25 8:06 UTC (permalink / raw) To: u-boot Hello, On Thu, 24 Jan 2013 09:03:11 +0100 Anatolij Gustschin <agust@denx.de> wrote: > Hello, > > On Thu, 24 Jan 2013 02:33:31 +0000 > Xie Shaohui-B21989 <B21989@freescale.com> wrote: > ... > > > currently I do not have access to the p2041rdb board, but here is the > > > previously captured boot log where I've seen this: > > > > > > > > > U-Boot 2011.09-00000-g2c02d1d (Oct 22 2011 - 18:31:36) > > > > > [S.H] Did you try the latest U-boot? This u-boot is old. I don't see the > > "time out" dump with the latest U-boot. > > I'm not sure which exact version I've tried, IIRC it was v2013-rcX > and the problem was there also. I'll have access to the p2041rdb > board tomorrow and will tell which exact version it was. It was the version 2013.01-rc1-00258-gce12a8c. Now I updated to v2013.01 and do not see the issue any more. This patch is not needed then. Sorry for the noise. Thanks, Anatolij ^ permalink raw reply [flat|nested] 6+ messages in thread
end of thread, other threads:[~2013-01-25 8:06 UTC | newest] Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2013-01-23 8:48 [U-Boot] [PATCH] powerpc/p2041: skip waiting for SERDES bank 3 reset done Anatolij Gustschin 2013-01-23 10:17 ` Xie Shaohui-B21989 2013-01-23 10:36 ` Anatolij Gustschin 2013-01-24 2:33 ` Xie Shaohui-B21989 2013-01-24 8:03 ` Anatolij Gustschin 2013-01-25 8:06 ` Anatolij Gustschin
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