From: Inochi Amaoto <inochiama@outlook.com> To: Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Chao Wei <chao.wei@sophgo.com>, Chen Wang <unicorn_wang@outlook.com>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Inochi Amaoto <inochiama@outlook.com> Cc: Jisheng Zhang <jszhang@kernel.org>, Liu Gui <kenneth.liu@sophgo.com>, Jingbao Qiu <qiujingbao.dlmu@gmail.com>, dlan@gentoo.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v6 0/4] riscv: sophgo: add clock support for Sophgo CV1800/SG2000 SoCs Date: Sun, 14 Jan 2024 12:15:49 +0800 [thread overview] Message-ID: <IA1PR20MB4953C774D41EDF1EADB6EC18BB6D2@IA1PR20MB4953.namprd20.prod.outlook.com> (raw) Add clock controller support for the Sophgo CV1800B, CV1812H and SG2000. Changed from v5: 1. rebased to mainline master tree 2. add SG2000 clock support. 3. fix document link Changed from v4: 1. improve code for patch 2 2. remove the already applied bindings https://lore.kernel.org/all/IA1PR20MB49535E448097F6FFC1218C39BB90A@IA1PR20MB4953.namprd20.prod.outlook.com/ Changed from v3: 1. improve comment of patch 3 2. cleanup the include of patch 2 Changed from v2: 1. remove clock-names from bindings. 2. remove clock-frequency node of DT from previous patch. 3. change some unused clock to bypass mode to avoid unlockable PLL. Changed from v1: 1. fix license issues. Inochi Amaoto (4): dt-bindings: clock: sophgo: Add clock controller of SG2000 series SoC clk: sophgo: Add CV1800/SG2000 series clock controller driver riscv: dts: sophgo: add clock generator for Sophgo CV1800 series SoC riscv: dts: sophgo: add uart clock for Sophgo CV1800 series SoC .../bindings/clock/sophgo,cv1800-clk.yaml | 3 +- arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 4 + arch/riscv/boot/dts/sophgo/cv1812h.dtsi | 4 + arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 22 +- drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/sophgo/Kconfig | 12 + drivers/clk/sophgo/Makefile | 7 + drivers/clk/sophgo/clk-cv1800.c | 1545 +++++++++++++++++ drivers/clk/sophgo/clk-cv1800.h | 123 ++ drivers/clk/sophgo/clk-cv18xx-common.c | 66 + drivers/clk/sophgo/clk-cv18xx-common.h | 81 + drivers/clk/sophgo/clk-cv18xx-ip.c | 905 ++++++++++ drivers/clk/sophgo/clk-cv18xx-ip.h | 265 +++ drivers/clk/sophgo/clk-cv18xx-pll.c | 425 +++++ drivers/clk/sophgo/clk-cv18xx-pll.h | 119 ++ 16 files changed, 3577 insertions(+), 6 deletions(-) create mode 100644 drivers/clk/sophgo/Kconfig create mode 100644 drivers/clk/sophgo/Makefile create mode 100644 drivers/clk/sophgo/clk-cv1800.c create mode 100644 drivers/clk/sophgo/clk-cv1800.h create mode 100644 drivers/clk/sophgo/clk-cv18xx-common.c create mode 100644 drivers/clk/sophgo/clk-cv18xx-common.h create mode 100644 drivers/clk/sophgo/clk-cv18xx-ip.c create mode 100644 drivers/clk/sophgo/clk-cv18xx-ip.h create mode 100644 drivers/clk/sophgo/clk-cv18xx-pll.c create mode 100644 drivers/clk/sophgo/clk-cv18xx-pll.h -- 2.43.0
WARNING: multiple messages have this Message-ID (diff)
From: Inochi Amaoto <inochiama@outlook.com> To: Michael Turquette <mturquette@baylibre.com>, Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Conor Dooley <conor+dt@kernel.org>, Chao Wei <chao.wei@sophgo.com>, Chen Wang <unicorn_wang@outlook.com>, Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Albert Ou <aou@eecs.berkeley.edu>, Inochi Amaoto <inochiama@outlook.com> Cc: Jisheng Zhang <jszhang@kernel.org>, Liu Gui <kenneth.liu@sophgo.com>, Jingbao Qiu <qiujingbao.dlmu@gmail.com>, dlan@gentoo.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org Subject: [PATCH v6 0/4] riscv: sophgo: add clock support for Sophgo CV1800/SG2000 SoCs Date: Sun, 14 Jan 2024 12:15:49 +0800 [thread overview] Message-ID: <IA1PR20MB4953C774D41EDF1EADB6EC18BB6D2@IA1PR20MB4953.namprd20.prod.outlook.com> (raw) Add clock controller support for the Sophgo CV1800B, CV1812H and SG2000. Changed from v5: 1. rebased to mainline master tree 2. add SG2000 clock support. 3. fix document link Changed from v4: 1. improve code for patch 2 2. remove the already applied bindings https://lore.kernel.org/all/IA1PR20MB49535E448097F6FFC1218C39BB90A@IA1PR20MB4953.namprd20.prod.outlook.com/ Changed from v3: 1. improve comment of patch 3 2. cleanup the include of patch 2 Changed from v2: 1. remove clock-names from bindings. 2. remove clock-frequency node of DT from previous patch. 3. change some unused clock to bypass mode to avoid unlockable PLL. Changed from v1: 1. fix license issues. Inochi Amaoto (4): dt-bindings: clock: sophgo: Add clock controller of SG2000 series SoC clk: sophgo: Add CV1800/SG2000 series clock controller driver riscv: dts: sophgo: add clock generator for Sophgo CV1800 series SoC riscv: dts: sophgo: add uart clock for Sophgo CV1800 series SoC .../bindings/clock/sophgo,cv1800-clk.yaml | 3 +- arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 4 + arch/riscv/boot/dts/sophgo/cv1812h.dtsi | 4 + arch/riscv/boot/dts/sophgo/cv18xx.dtsi | 22 +- drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/sophgo/Kconfig | 12 + drivers/clk/sophgo/Makefile | 7 + drivers/clk/sophgo/clk-cv1800.c | 1545 +++++++++++++++++ drivers/clk/sophgo/clk-cv1800.h | 123 ++ drivers/clk/sophgo/clk-cv18xx-common.c | 66 + drivers/clk/sophgo/clk-cv18xx-common.h | 81 + drivers/clk/sophgo/clk-cv18xx-ip.c | 905 ++++++++++ drivers/clk/sophgo/clk-cv18xx-ip.h | 265 +++ drivers/clk/sophgo/clk-cv18xx-pll.c | 425 +++++ drivers/clk/sophgo/clk-cv18xx-pll.h | 119 ++ 16 files changed, 3577 insertions(+), 6 deletions(-) create mode 100644 drivers/clk/sophgo/Kconfig create mode 100644 drivers/clk/sophgo/Makefile create mode 100644 drivers/clk/sophgo/clk-cv1800.c create mode 100644 drivers/clk/sophgo/clk-cv1800.h create mode 100644 drivers/clk/sophgo/clk-cv18xx-common.c create mode 100644 drivers/clk/sophgo/clk-cv18xx-common.h create mode 100644 drivers/clk/sophgo/clk-cv18xx-ip.c create mode 100644 drivers/clk/sophgo/clk-cv18xx-ip.h create mode 100644 drivers/clk/sophgo/clk-cv18xx-pll.c create mode 100644 drivers/clk/sophgo/clk-cv18xx-pll.h -- 2.43.0 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next reply other threads:[~2024-01-14 4:16 UTC|newest] Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-01-14 4:15 Inochi Amaoto [this message] 2024-01-14 4:15 ` [PATCH v6 0/4] riscv: sophgo: add clock support for Sophgo CV1800/SG2000 SoCs Inochi Amaoto 2024-01-14 4:16 ` [PATCH v6 1/4] dt-bindings: clock: sophgo: Add clock controller of SG2000 series SoC Inochi Amaoto 2024-01-14 4:16 ` Inochi Amaoto 2024-01-15 7:31 ` Krzysztof Kozlowski 2024-01-15 7:31 ` Krzysztof Kozlowski 2024-01-15 16:35 ` Conor Dooley 2024-01-15 16:35 ` Conor Dooley 2024-01-16 0:27 ` Inochi Amaoto 2024-01-16 0:27 ` Inochi Amaoto 2024-01-16 7:36 ` Conor Dooley 2024-01-16 7:36 ` Conor Dooley 2024-01-16 8:00 ` Inochi Amaoto 2024-01-16 8:00 ` Inochi Amaoto 2024-01-16 17:24 ` Conor Dooley 2024-01-16 17:24 ` Conor Dooley 2024-01-14 4:16 ` [PATCH v6 2/4] clk: sophgo: Add CV1800/SG2000 series clock controller driver Inochi Amaoto 2024-01-14 4:16 ` Inochi Amaoto 2024-01-31 4:27 ` Inochi Amaoto 2024-01-31 4:27 ` Inochi Amaoto 2024-01-14 4:17 ` [PATCH v6 3/4] riscv: dts: sophgo: add clock generator for Sophgo CV1800 series SoC Inochi Amaoto 2024-01-14 4:17 ` Inochi Amaoto 2024-01-31 3:44 ` Chen Wang 2024-01-31 3:44 ` Chen Wang 2024-01-14 4:17 ` [PATCH v6 4/4] riscv: dts: sophgo: add uart clock " Inochi Amaoto 2024-01-14 4:17 ` Inochi Amaoto 2024-01-31 3:46 ` Chen Wang 2024-01-31 3:46 ` Chen Wang
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