From: Anup Patel <Anup.Patel@wdc.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v6 09/16] clk: Add SiFive FU540 PRCI clock driver
Date: Mon, 11 Feb 2019 04:32:01 +0000 [thread overview]
Message-ID: <MN2PR04MB6061C5E63854096DF008E99B8D640@MN2PR04MB6061.namprd04.prod.outlook.com> (raw)
In-Reply-To: <93bf2da4aedb059f1024576294947fb48286c957.camel@aisec.fraunhofer.de>
> -----Original Message-----
> From: Auer, Lukas [mailto:lukas.auer at aisec.fraunhofer.de]
> Sent: Monday, February 11, 2019 12:10 AM
> To: sjg at chromium.org; michal.simek at xilinx.com; bmeng.cn at gmail.com;
> joe.hershberger at ni.com; rick at andestech.com;
> yamada.masahiro at socionext.com; monstr at monstr.eu; Anup Patel
> <Anup.Patel@wdc.com>
> Cc: paul.walmsley at sifive.com; palmer at sifive.com; u-boot at lists.denx.de;
> agraf at suse.de; Atish Patra <Atish.Patra@wdc.com>
> Subject: Re: [PATCH v6 09/16] clk: Add SiFive FU540 PRCI clock driver
>
> On Sat, 2019-02-09 at 06:32 +0000, Anup Patel wrote:
> > Add driver code for the SiFive FU540 PRCI IP block. This IP block
> > handles reset and clock control for the SiFive FU540 device and
> > implements SoC-level clock tree controls and dividers.
> >
> > Based on code written by Wesley Terpstra <wesley@sifive.com> found in
> > commit 999529edf517ed75b56659d456d221b2ee56bb60 of:
> > https://github.com/riscv/riscv-linux
> >
> > Boot and PLL rate change were tested on a SiFive HiFive Unleashed
> > board.
> >
> > Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
> > Signed-off-by: Atish Patra <atish.patra@wdc.com>
> > Signed-off-by: Anup Patel <anup.patel@wdc.com>
> > Reviewed-by: Alexander Graf <agraf@suse.de>
> > ---
> > drivers/clk/Kconfig | 1 +
> > drivers/clk/Makefile | 1 +
> > drivers/clk/sifive/Kconfig | 19 +
> > drivers/clk/sifive/Makefile | 5 +
> > .../clk/sifive/analogbits-wrpll-cln28hpc.h | 101 +++
> > drivers/clk/sifive/fu540-prci.c | 604
> > ++++++++++++++++++
> > drivers/clk/sifive/wrpll-cln28hpc.c | 390 +++++++++++
> > include/dt-bindings/clk/sifive-fu540-prci.h | 29 +
> > 8 files changed, 1150 insertions(+)
> > create mode 100644 drivers/clk/sifive/Kconfig create mode 100644
> > drivers/clk/sifive/Makefile create mode 100644
> > drivers/clk/sifive/analogbits-wrpll-cln28hpc.h
> > create mode 100644 drivers/clk/sifive/fu540-prci.c create mode
> > 100644 drivers/clk/sifive/wrpll-cln28hpc.c
> > create mode 100644 include/dt-bindings/clk/sifive-fu540-prci.h
> >
>
> This patch currently does not apply cleanly on U-Boot master.
The patches are based upon latest RISC-V U-Boot tree
(git://git.denx.de/u-boot-riscv.git) at commit id 91882c472d8c0aef4db699d3f2de55bf43d4ae4b
Do you want me to base this upon U-Boot master ??
Regards,
Anup
next prev parent reply other threads:[~2019-02-11 4:32 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-09 6:31 [U-Boot] [PATCH v6 00/16] SiFive FU540 Support Anup Patel
2019-02-09 6:31 ` [U-Boot] [PATCH v6 01/16] .gitignore: Don't ignore arch/riscv/include/asm/arch Anup Patel
2019-02-10 18:18 ` Auer, Lukas
2019-02-09 6:31 ` [U-Boot] [PATCH v6 02/16] Makefile: Fix mrproper make target Anup Patel
2019-02-10 18:31 ` Auer, Lukas
2019-02-11 1:12 ` Tom Rini
2019-02-11 4:27 ` Anup Patel
2019-02-09 6:31 ` [U-Boot] [PATCH v6 03/16] riscv: Rename cpu/qemu to cpu/generic Anup Patel
2019-02-09 6:31 ` [U-Boot] [PATCH v6 04/16] riscv: Add asm/dma-mapping.h for DMA mappings Anup Patel
2019-02-09 6:31 ` [U-Boot] [PATCH v6 05/16] riscv: Add place-holder asm/arch/clk.h for driver compilation Anup Patel
2019-02-10 18:32 ` Auer, Lukas
2019-02-11 3:21 ` Bin Meng
2019-02-11 4:28 ` Anup Patel
2019-02-09 6:32 ` [U-Boot] [PATCH v6 06/16] riscv: generic: Ensure that U-Boot runs within 4GB for 64bit systems Anup Patel
2019-02-09 6:32 ` [U-Boot] [PATCH v6 07/16] net: macb: Fix clk API usage for RISC-V systems Anup Patel
2019-02-09 6:32 ` [U-Boot] [PATCH v6 08/16] net: macb: Fix GEM hardware detection Anup Patel
2019-02-09 6:32 ` [U-Boot] [PATCH v6 09/16] clk: Add SiFive FU540 PRCI clock driver Anup Patel
2019-02-10 18:40 ` Auer, Lukas
2019-02-11 4:32 ` Anup Patel [this message]
2019-02-11 9:37 ` Auer, Lukas
2019-02-09 6:32 ` [U-Boot] [PATCH v6 10/16] clk: Add fixed-factor " Anup Patel
2019-02-09 6:32 ` [U-Boot] [PATCH v6 11/16] drivers: serial_sifive: Fix baud rate calculation Anup Patel
2019-02-09 6:33 ` [U-Boot] [PATCH v6 12/16] drivers: serial_sifive: Skip baudrate config if no input clock Anup Patel
2019-02-09 6:33 ` [U-Boot] [PATCH v6 13/16] cpu: Bind timer driver for boot hart Anup Patel
2019-02-09 6:33 ` [U-Boot] [PATCH v6 14/16] riscv: Add SiFive FU540 board support Anup Patel
2019-02-09 6:33 ` [U-Boot] [PATCH v6 15/16] doc: Add a readme guide for SiFive FU540 Anup Patel
2019-02-10 18:47 ` Auer, Lukas
2019-02-11 3:00 ` Atish Patra
2019-02-09 6:33 ` [U-Boot] [PATCH v6 16/16] riscv: Enable CONFIG_SYS_BOOT_RAMDISK_HIGH for using initrd Anup Patel
2019-02-10 18:48 ` Auer, Lukas
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