[PATCH v2 0/6] arm64: renesas: add USB 2.0 device nodes for r8a7795

[PATCH v2 0/6] arm64: renesas: add USB 2.0 device nodes for r8a7795

[Yoshihiro Shimoda]

This patch set is based on the renesas.git / 20151221renesas-devel-20151221-v4.4-rc6 tag.
(commit id = fe0e8e675dedf1877709a17258e88151c2614b77)

Changed from v1:
 - Fix register size from 0xff to 0x100 in patch 2

Yoshihiro Shimoda (6):
  arm64: renesas: r8a7795: add usb2_phy device nodes
  arm64: renesas: r8a7795: add USB2.0 Host (EHCI/OHCI) device nodes
  arm64: renesas: r8a7795: add HS-USB device node
  arm64: renesas: salvator-x: enable usb2_phy
  arm64: renesas: salvator-x: enable USB 2.0 Host channel 1 and 2
  arm64: renesas: salvator-x: enable HS-USB

 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts |  54 +++++++++-
 arch/arm64/boot/dts/renesas/r8a7795.dtsi           | 113 +++++++++++++++++++++
 2 files changed, 166 insertions(+), 1 deletion(-)

-- 
1.9.1

[PATCH v2 0/6] arm64: renesas: add USB 2.0 device nodes for r8a7795

[Yoshihiro Shimoda]

This patch set is based on the renesas.git / 20151221renesas-devel-20151221-v4.4-rc6 tag.
(commit id = fe0e8e675dedf1877709a17258e88151c2614b77)

Changed from v1:
 - Fix register size from 0xff to 0x100 in patch 2

Yoshihiro Shimoda (6):
  arm64: renesas: r8a7795: add usb2_phy device nodes
  arm64: renesas: r8a7795: add USB2.0 Host (EHCI/OHCI) device nodes
  arm64: renesas: r8a7795: add HS-USB device node
  arm64: renesas: salvator-x: enable usb2_phy
  arm64: renesas: salvator-x: enable USB 2.0 Host channel 1 and 2
  arm64: renesas: salvator-x: enable HS-USB

 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts |  54 +++++++++-
 arch/arm64/boot/dts/renesas/r8a7795.dtsi           | 113 +++++++++++++++++++++
 2 files changed, 166 insertions(+), 1 deletion(-)

-- 
1.9.1

[PATCH v2 1/6] arm64: renesas: r8a7795: add usb2_phy device nodes

[Yoshihiro Shimoda]

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 34 ++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index bb353cd..89393ea 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -775,5 +775,39 @@
 			clocks = <&cpg CPG_MOD 815>;
 			status = "disabled";
 		};
+
+		usb2_phy0: usb-phy@ee080200 {
+			compatible = "renesas,usb2-phy-r8a7795";
+			reg = <0 0xee080200 0 0x700>, <0 0xe6590100 0 0x100>;
+			reg-names = "usb2_host", "hsusb";
+			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
+			clock-names = "usb2", "hsusb";
+			power-domains = <&cpg>;
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+
+		usb2_phy1: usb-phy@ee0a0200 {
+			compatible = "renesas,usb2-phy-r8a7795";
+			reg = <0 0xee0a0200 0 0x700>;
+			reg-names = "usb2_host";
+			clocks = <&cpg CPG_MOD 702>;
+			clock-names = "usb2";
+			power-domains = <&cpg>;
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+
+		usb2_phy2: usb-phy@ee0c0200 {
+			compatible = "renesas,usb2-phy-r8a7795";
+			reg = <0 0xee0c0200 0 0x700>;
+			reg-names = "usb2_host";
+			clocks = <&cpg CPG_MOD 701>;
+			clock-names = "usb2";
+			power-domains = <&cpg>;
+			#phy-cells = <0>;
+			status = "disabled";
+		};
 	};
 };
-- 
1.9.1

[PATCH v2 1/6] arm64: renesas: r8a7795: add usb2_phy device nodes

[Yoshihiro Shimoda]

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 34 ++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index bb353cd..89393ea 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -775,5 +775,39 @@
 			clocks = <&cpg CPG_MOD 815>;
 			status = "disabled";
 		};
+
+		usb2_phy0: usb-phy@ee080200 {
+			compatible = "renesas,usb2-phy-r8a7795";
+			reg = <0 0xee080200 0 0x700>, <0 0xe6590100 0 0x100>;
+			reg-names = "usb2_host", "hsusb";
+			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
+			clock-names = "usb2", "hsusb";
+			power-domains = <&cpg>;
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+
+		usb2_phy1: usb-phy@ee0a0200 {
+			compatible = "renesas,usb2-phy-r8a7795";
+			reg = <0 0xee0a0200 0 0x700>;
+			reg-names = "usb2_host";
+			clocks = <&cpg CPG_MOD 702>;
+			clock-names = "usb2";
+			power-domains = <&cpg>;
+			#phy-cells = <0>;
+			status = "disabled";
+		};
+
+		usb2_phy2: usb-phy@ee0c0200 {
+			compatible = "renesas,usb2-phy-r8a7795";
+			reg = <0 0xee0c0200 0 0x700>;
+			reg-names = "usb2_host";
+			clocks = <&cpg CPG_MOD 701>;
+			clock-names = "usb2";
+			power-domains = <&cpg>;
+			#phy-cells = <0>;
+			status = "disabled";
+		};
 	};
 };
-- 
1.9.1

[PATCH v2 2/6] arm64: renesas: r8a7795: add USB2.0 Host (EHCI/OHCI) device nodes

[Yoshihiro Shimoda]

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 66 ++++++++++++++++++++++++++++++++
 1 file changed, 66 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 89393ea..499e158 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -809,5 +809,71 @@
 			#phy-cells = <0>;
 			status = "disabled";
 		};
+
+		ehci0: usb@ee080100 {
+			compatible = "renesas,ehci-r8a7795", "generic-ehci";
+			reg = <0 0xee080100 0 0x100>;
+			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 703>;
+			phys = <&usb2_phy0>;
+			phy-names = "usb";
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
+		ehci1: usb@ee0a0100 {
+			compatible = "renesas,ehci-r8a7795", "generic-ehci";
+			reg = <0 0xee0a0100 0 0x100>;
+			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 702>;
+			phys = <&usb2_phy1>;
+			phy-names = "usb";
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
+		ehci2: usb@ee0c0100 {
+			compatible = "renesas,ehci-r8a7795", "generic-ehci";
+			reg = <0 0xee0c0100 0 0x100>;
+			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 701>;
+			phys = <&usb2_phy2>;
+			phy-names = "usb";
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
+		ohci0: usb@ee080000 {
+			compatible = "renesas,ohci-r8a7795", "generic-ohci";
+			reg = <0 0xee080000 0 0x100>;
+			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 703>;
+			phys = <&usb2_phy0>;
+			phy-names = "usb";
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
+		ohci1: usb@ee0a0000 {
+			compatible = "renesas,ohci-r8a7795", "generic-ohci";
+			reg = <0 0xee0a0000 0 0x100>;
+			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 702>;
+			phys = <&usb2_phy1>;
+			phy-names = "usb";
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
+		ohci2: usb@ee0c0000 {
+			compatible = "renesas,ohci-r8a7795", "generic-ohci";
+			reg = <0 0xee0c0000 0 0x100>;
+			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 701>;
+			phys = <&usb2_phy2>;
+			phy-names = "usb";
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
 	};
 };
-- 
1.9.1

[PATCH v2 2/6] arm64: renesas: r8a7795: add USB2.0 Host (EHCI/OHCI) device nodes

[Yoshihiro Shimoda]

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 66 ++++++++++++++++++++++++++++++++
 1 file changed, 66 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 89393ea..499e158 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -809,5 +809,71 @@
 			#phy-cells = <0>;
 			status = "disabled";
 		};
+
+		ehci0: usb@ee080100 {
+			compatible = "renesas,ehci-r8a7795", "generic-ehci";
+			reg = <0 0xee080100 0 0x100>;
+			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 703>;
+			phys = <&usb2_phy0>;
+			phy-names = "usb";
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
+		ehci1: usb@ee0a0100 {
+			compatible = "renesas,ehci-r8a7795", "generic-ehci";
+			reg = <0 0xee0a0100 0 0x100>;
+			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 702>;
+			phys = <&usb2_phy1>;
+			phy-names = "usb";
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
+		ehci2: usb@ee0c0100 {
+			compatible = "renesas,ehci-r8a7795", "generic-ehci";
+			reg = <0 0xee0c0100 0 0x100>;
+			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 701>;
+			phys = <&usb2_phy2>;
+			phy-names = "usb";
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
+		ohci0: usb@ee080000 {
+			compatible = "renesas,ohci-r8a7795", "generic-ohci";
+			reg = <0 0xee080000 0 0x100>;
+			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 703>;
+			phys = <&usb2_phy0>;
+			phy-names = "usb";
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
+		ohci1: usb@ee0a0000 {
+			compatible = "renesas,ohci-r8a7795", "generic-ohci";
+			reg = <0 0xee0a0000 0 0x100>;
+			interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 702>;
+			phys = <&usb2_phy1>;
+			phy-names = "usb";
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
+
+		ohci2: usb@ee0c0000 {
+			compatible = "renesas,ohci-r8a7795", "generic-ohci";
+			reg = <0 0xee0c0000 0 0x100>;
+			interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 701>;
+			phys = <&usb2_phy2>;
+			phy-names = "usb";
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
 	};
 };
-- 
1.9.1

[PATCH v2 3/6] arm64: renesas: r8a7795: add HS-USB device node

[Yoshihiro Shimoda]

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 499e158..e027314 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -875,5 +875,18 @@
 			power-domains = <&cpg>;
 			status = "disabled";
 		};
+
+		hsusb: usb@e6590000 {
+			compatible = "renesas,usbhs-r8a7795",
+				     "renesas,rcar-gen3-usbhs";
+			reg = <0 0xe6590000 0 0x100>;
+			interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 704>;
+			renesas,buswait = <11>;
+			phys = <&usb2_phy0>;
+			phy-names = "usb";
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
 	};
 };
-- 
1.9.1

[PATCH v2 3/6] arm64: renesas: r8a7795: add HS-USB device node

[Yoshihiro Shimoda]

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index 499e158..e027314 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -875,5 +875,18 @@
 			power-domains = <&cpg>;
 			status = "disabled";
 		};
+
+		hsusb: usb@e6590000 {
+			compatible = "renesas,usbhs-r8a7795",
+				     "renesas,rcar-gen3-usbhs";
+			reg = <0 0xe6590000 0 0x100>;
+			interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&cpg CPG_MOD 704>;
+			renesas,buswait = <11>;
+			phys = <&usb2_phy0>;
+			phy-names = "usb";
+			power-domains = <&cpg>;
+			status = "disabled";
+		};
 	};
 };
-- 
1.9.1

[PATCH v2 4/6] arm64: renesas: salvator-x: enable usb2_phy

[Yoshihiro Shimoda]

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 34 +++++++++++++++++++++-
 1 file changed, 33 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index 265d12f..7353407 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -122,8 +122,22 @@
 				 "audio_clkout_a", "audio_clkout3_a";
 		renesas,function = "audio_clk";
 	};
-};
 
+	usb0_pins: usb0 {
+		renesas,groups = "usb0";
+		renesas,function = "usb";
+	};
+
+	usb1_pins: usb1 {
+		renesas,groups = "usb1";
+		renesas,function = "usb";
+	};
+
+	usb2_pins: usb2 {
+		renesas,groups = "usb2";
+		renesas,function = "usb";
+	};
+};
 &scif1 {
 	pinctrl-0 = <&scif1_pins>;
 	pinctrl-names = "default";
@@ -249,3 +263,21 @@
 		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
 	};
 };
+
+&usb2_phy0 {
+	status = "okay";
+	pinctrl-0 = <&usb0_pins>;
+	pinctrl-names = "default";
+};
+
+&usb2_phy1 {
+	status = "okay";
+	pinctrl-0 = <&usb1_pins>;
+	pinctrl-names = "default";
+};
+
+&usb2_phy2 {
+	status = "okay";
+	pinctrl-0 = <&usb2_pins>;
+	pinctrl-names = "default";
+};
-- 
1.9.1

[PATCH v2 4/6] arm64: renesas: salvator-x: enable usb2_phy

[Yoshihiro Shimoda]

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 34 +++++++++++++++++++++-
 1 file changed, 33 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index 265d12f..7353407 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -122,8 +122,22 @@
 				 "audio_clkout_a", "audio_clkout3_a";
 		renesas,function = "audio_clk";
 	};
-};
 
+	usb0_pins: usb0 {
+		renesas,groups = "usb0";
+		renesas,function = "usb";
+	};
+
+	usb1_pins: usb1 {
+		renesas,groups = "usb1";
+		renesas,function = "usb";
+	};
+
+	usb2_pins: usb2 {
+		renesas,groups = "usb2";
+		renesas,function = "usb";
+	};
+};
 &scif1 {
 	pinctrl-0 = <&scif1_pins>;
 	pinctrl-names = "default";
@@ -249,3 +263,21 @@
 		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
 	};
 };
+
+&usb2_phy0 {
+	status = "okay";
+	pinctrl-0 = <&usb0_pins>;
+	pinctrl-names = "default";
+};
+
+&usb2_phy1 {
+	status = "okay";
+	pinctrl-0 = <&usb1_pins>;
+	pinctrl-names = "default";
+};
+
+&usb2_phy2 {
+	status = "okay";
+	pinctrl-0 = <&usb2_pins>;
+	pinctrl-names = "default";
+};
-- 
1.9.1

[PATCH v2 5/6] arm64: renesas: salvator-x: enable USB 2.0 Host channel 1 and 2

[Yoshihiro Shimoda]

This patch doesn't enable USB2.0 Host channel 0 because it is connected
to MAX3355 and cannot control the SHDN pin for now.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index 7353407..8e9cd31 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -281,3 +281,19 @@
 	pinctrl-0 = <&usb2_pins>;
 	pinctrl-names = "default";
 };
+
+&ehci1 {
+	status = "okay";
+};
+
+&ehci2 {
+	status = "okay";
+};
+
+&ohci1 {
+	status = "okay";
+};
+
+&ohci2 {
+	status = "okay";
+};
-- 
1.9.1

[PATCH v2 5/6] arm64: renesas: salvator-x: enable USB 2.0 Host channel 1 and 2

[Yoshihiro Shimoda]

This patch doesn't enable USB2.0 Host channel 0 because it is connected
to MAX3355 and cannot control the SHDN pin for now.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index 7353407..8e9cd31 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -281,3 +281,19 @@
 	pinctrl-0 = <&usb2_pins>;
 	pinctrl-names = "default";
 };
+
+&ehci1 {
+	status = "okay";
+};
+
+&ehci2 {
+	status = "okay";
+};
+
+&ohci1 {
+	status = "okay";
+};
+
+&ohci2 {
+	status = "okay";
+};
-- 
1.9.1

[PATCH v2 6/6] arm64: renesas: salvator-x: enable HS-USB

[Yoshihiro Shimoda]

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index 8e9cd31..eb16403 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -297,3 +297,7 @@
 &ohci2 {
 	status = "okay";
 };
+
+&hsusb {
+	status = "okay";
+};
-- 
1.9.1

[PATCH v2 6/6] arm64: renesas: salvator-x: enable HS-USB

[Yoshihiro Shimoda]

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
---
 arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index 8e9cd31..eb16403 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -297,3 +297,7 @@
 &ohci2 {
 	status = "okay";
 };
+
+&hsusb {
+	status = "okay";
+};
-- 
1.9.1

Re: [PATCH v2 0/6] arm64: renesas: add USB 2.0 device nodes for r8a7795

[Simon Horman]

On Fri, Dec 25, 2015 at 08:52:35PM +0900, Yoshihiro Shimoda wrote:
> This patch set is based on the renesas.git / 20151221renesas-devel-20151221-v4.4-rc6 tag.
> (commit id = fe0e8e675dedf1877709a17258e88151c2614b77)
> 
> Changed from v1:
>  - Fix register size from 0xff to 0x100 in patch 2

Thanks, I have queued these up for v4.6.

Re: [PATCH v2 0/6] arm64: renesas: add USB 2.0 device nodes for r8a7795

[Simon Horman]

On Fri, Dec 25, 2015 at 08:52:35PM +0900, Yoshihiro Shimoda wrote:
> This patch set is based on the renesas.git / 20151221renesas-devel-20151221-v4.4-rc6 tag.
> (commit id = fe0e8e675dedf1877709a17258e88151c2614b77)
> 
> Changed from v1:
>  - Fix register size from 0xff to 0x100 in patch 2

Thanks, I have queued these up for v4.6.

Re: [PATCH v2 1/6] arm64: renesas: r8a7795: add usb2_phy device nodes

[Geert Uytterhoeven]

Hi Shimoda-san,

On Fri, Dec 25, 2015 at 12:52 PM, Yoshihiro Shimoda
<yoshihiro.shimoda.uh@renesas.com> wrote:
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> ---
>  arch/arm64/boot/dts/renesas/r8a7795.dtsi | 34 ++++++++++++++++++++++++++++++++
>  1 file changed, 34 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> index bb353cd..89393ea 100644
> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> @@ -775,5 +775,39 @@
>                         clocks = <&cpg CPG_MOD 815>;
>                         status = "disabled";
>                 };
> +
> +               usb2_phy0: usb-phy@ee080200 {
> +                       compatible = "renesas,usb2-phy-r8a7795";
> +                       reg = <0 0xee080200 0 0x700>, <0 0xe6590100 0 0x100>;
> +                       reg-names = "usb2_host", "hsusb";
> +                       interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;

Isn't 108 the EHCI0 interrupt?
Cfr. the other usb-phy nodes that don't have interrupts.

> +                       clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
> +                       clock-names = "usb2", "hsusb";
> +                       power-domains = <&cpg>;

This device has two modules clocks, but the CPG/MSSR driver only manages
the first modulo clock.
Who enables the second clock (HS-USB-IF)?

> +                       #phy-cells = <0>;
> +                       status = "disabled";
> +               };
> +
> +               usb2_phy1: usb-phy@ee0a0200 {
> +                       compatible = "renesas,usb2-phy-r8a7795";
> +                       reg = <0 0xee0a0200 0 0x700>;
> +                       reg-names = "usb2_host";
> +                       clocks = <&cpg CPG_MOD 702>;
> +                       clock-names = "usb2";
> +                       power-domains = <&cpg>;
> +                       #phy-cells = <0>;
> +                       status = "disabled";
> +               };
> +
> +               usb2_phy2: usb-phy@ee0c0200 {
> +                       compatible = "renesas,usb2-phy-r8a7795";
> +                       reg = <0 0xee0c0200 0 0x700>;
> +                       reg-names = "usb2_host";
> +                       clocks = <&cpg CPG_MOD 701>;
> +                       clock-names = "usb2";
> +                       power-domains = <&cpg>;
> +                       #phy-cells = <0>;
> +                       status = "disabled";
> +               };
>         };
>  };

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

Re: [PATCH v2 1/6] arm64: renesas: r8a7795: add usb2_phy device nodes

[Geert Uytterhoeven]

Hi Shimoda-san,

On Fri, Dec 25, 2015 at 12:52 PM, Yoshihiro Shimoda
<yoshihiro.shimoda.uh-zM6kxYcvzFBBDgjK7y7TUQ@public.gmane.org> wrote:
> Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh-zM6kxYcvzFBBDgjK7y7TUQ@public.gmane.org>
> ---
>  arch/arm64/boot/dts/renesas/r8a7795.dtsi | 34 ++++++++++++++++++++++++++++++++
>  1 file changed, 34 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> index bb353cd..89393ea 100644
> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> @@ -775,5 +775,39 @@
>                         clocks = <&cpg CPG_MOD 815>;
>                         status = "disabled";
>                 };
> +
> +               usb2_phy0: usb-phy@ee080200 {
> +                       compatible = "renesas,usb2-phy-r8a7795";
> +                       reg = <0 0xee080200 0 0x700>, <0 0xe6590100 0 0x100>;
> +                       reg-names = "usb2_host", "hsusb";
> +                       interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;

Isn't 108 the EHCI0 interrupt?
Cfr. the other usb-phy nodes that don't have interrupts.

> +                       clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
> +                       clock-names = "usb2", "hsusb";
> +                       power-domains = <&cpg>;

This device has two modules clocks, but the CPG/MSSR driver only manages
the first modulo clock.
Who enables the second clock (HS-USB-IF)?

> +                       #phy-cells = <0>;
> +                       status = "disabled";
> +               };
> +
> +               usb2_phy1: usb-phy@ee0a0200 {
> +                       compatible = "renesas,usb2-phy-r8a7795";
> +                       reg = <0 0xee0a0200 0 0x700>;
> +                       reg-names = "usb2_host";
> +                       clocks = <&cpg CPG_MOD 702>;
> +                       clock-names = "usb2";
> +                       power-domains = <&cpg>;
> +                       #phy-cells = <0>;
> +                       status = "disabled";
> +               };
> +
> +               usb2_phy2: usb-phy@ee0c0200 {
> +                       compatible = "renesas,usb2-phy-r8a7795";
> +                       reg = <0 0xee0c0200 0 0x700>;
> +                       reg-names = "usb2_host";
> +                       clocks = <&cpg CPG_MOD 701>;
> +                       clock-names = "usb2";
> +                       power-domains = <&cpg>;
> +                       #phy-cells = <0>;
> +                       status = "disabled";
> +               };
>         };
>  };

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert-Td1EMuHUCqxL1ZNQvxDV9g@public.gmane.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
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RE: [PATCH v2 1/6] arm64: renesas: r8a7795: add usb2_phy device nodes

[Yoshihiro Shimoda]

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RE: [PATCH v2 1/6] arm64: renesas: r8a7795: add usb2_phy device nodes

[Yoshihiro Shimoda]

Hi Geert-san,

Thank you for your comment and sorry for the delayed response.

> From: Geert Uytterhoeven
> Sent: Monday, January 04, 2016 9:42 PM
> 
> On Fri, Dec 25, 2015 at 12:52 PM, Yoshihiro Shimoda
> <yoshihiro.shimoda.uh@renesas.com> wrote:
> > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > @@ -775,5 +775,39 @@
> >                         clocks = <&cpg CPG_MOD 815>;
> >                         status = "disabled";
> >                 };
> > +
> > +               usb2_phy0: usb-phy@ee080200 {
> > +                       compatible = "renesas,usb2-phy-r8a7795";
> > +                       reg = <0 0xee080200 0 0x700>, <0 0xe6590100 0 0x100>;
> > +                       reg-names = "usb2_host", "hsusb";
> > +                       interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> 
> Isn't 108 the EHCI0 interrupt?
> Cfr. the other usb-phy nodes that don't have interrupts.

Yes, 108 is the EHCI0 interrupt.
However, as the 73.5.1 Interrupt Signal List in the datasheet is described,
this EHCI0 has also phy interrupt (the datasheet names "UCON").

> > +                       clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
> > +                       clock-names = "usb2", "hsusb";
> > +                       power-domains = <&cpg>;
> 
> This device has two modules clocks, but the CPG/MSSR driver only manages
> the first modulo clock.
> Who enables the second clock (HS-USB-IF)?

Oops! Thank you for the point.
The second clock was enabled by a boot loader.
If a boot loader doesn't enable this clock,
a panic happens as the followings in probing timing of the renesas-hsusb driver:

renesas_usbhs e6590000.usb: transceiver found
renesas_usbhs e6590000.usb: gadget probed
Bad mode in Error handler detected, code 0xbf000002 -- SError
CPU: 3 PID: 1 Comm: swapper/0 Not tainted 4.4.0-rc6+ #42
Hardware name: Renesas Salvator-X board based on r8a7795 (DT)
task: ffffffc031868000 ti: ffffffc031870000 task.ti: ffffffc031870000
PC is at rcar_gen3_phy_usb2_init+0x38/0x114
LR is at phy_init+0x60/0xcc

So, I will fix this issue somehow.
Also, I would like to revert this patch set to avoid any troubles.
Simon-san, would you revert this patch set?

Best regards,
Yoshihiro Shimoda

> 
> Gr{oetje,eeting}s,
> 
>                         Geert
> 
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
> 
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
>                                 -- Linus Torvalds

Re: [PATCH v2 1/6] arm64: renesas: r8a7795: add usb2_phy device nodes

[Simon Horman]

On Thu, Jan 07, 2016 at 01:47:47AM +0000, Yoshihiro Shimoda wrote:
> Hi Geert-san,
> 
> Thank you for your comment and sorry for the delayed response.
> 
> > From: Geert Uytterhoeven
> > Sent: Monday, January 04, 2016 9:42 PM
> > 
> > On Fri, Dec 25, 2015 at 12:52 PM, Yoshihiro Shimoda
> > <yoshihiro.shimoda.uh@renesas.com> wrote:
> > > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > > +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > > @@ -775,5 +775,39 @@
> > >                         clocks = <&cpg CPG_MOD 815>;
> > >                         status = "disabled";
> > >                 };
> > > +
> > > +               usb2_phy0: usb-phy@ee080200 {
> > > +                       compatible = "renesas,usb2-phy-r8a7795";
> > > +                       reg = <0 0xee080200 0 0x700>, <0 0xe6590100 0 0x100>;
> > > +                       reg-names = "usb2_host", "hsusb";
> > > +                       interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> > 
> > Isn't 108 the EHCI0 interrupt?
> > Cfr. the other usb-phy nodes that don't have interrupts.
> 
> Yes, 108 is the EHCI0 interrupt.
> However, as the 73.5.1 Interrupt Signal List in the datasheet is described,
> this EHCI0 has also phy interrupt (the datasheet names "UCON").
> 
> > > +                       clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
> > > +                       clock-names = "usb2", "hsusb";
> > > +                       power-domains = <&cpg>;
> > 
> > This device has two modules clocks, but the CPG/MSSR driver only manages
> > the first modulo clock.
> > Who enables the second clock (HS-USB-IF)?
> 
> Oops! Thank you for the point.
> The second clock was enabled by a boot loader.
> If a boot loader doesn't enable this clock,
> a panic happens as the followings in probing timing of the renesas-hsusb driver:
> 
> renesas_usbhs e6590000.usb: transceiver found
> renesas_usbhs e6590000.usb: gadget probed
> Bad mode in Error handler detected, code 0xbf000002 -- SError
> CPU: 3 PID: 1 Comm: swapper/0 Not tainted 4.4.0-rc6+ #42
> Hardware name: Renesas Salvator-X board based on r8a7795 (DT)
> task: ffffffc031868000 ti: ffffffc031870000 task.ti: ffffffc031870000
> PC is at rcar_gen3_phy_usb2_init+0x38/0x114
> LR is at phy_init+0x60/0xcc
> 
> So, I will fix this issue somehow.
> Also, I would like to revert this patch set to avoid any troubles.
> Simon-san, would you revert this patch set?

Sure, I will drop the entire patchset.

Re: [PATCH v2 1/6] arm64: renesas: r8a7795: add usb2_phy device nodes

[Simon Horman]

On Thu, Jan 07, 2016 at 01:47:47AM +0000, Yoshihiro Shimoda wrote:
> Hi Geert-san,
> 
> Thank you for your comment and sorry for the delayed response.
> 
> > From: Geert Uytterhoeven
> > Sent: Monday, January 04, 2016 9:42 PM
> > 
> > On Fri, Dec 25, 2015 at 12:52 PM, Yoshihiro Shimoda
> > <yoshihiro.shimoda.uh@renesas.com> wrote:
> > > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > > +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> > > @@ -775,5 +775,39 @@
> > >                         clocks = <&cpg CPG_MOD 815>;
> > >                         status = "disabled";
> > >                 };
> > > +
> > > +               usb2_phy0: usb-phy@ee080200 {
> > > +                       compatible = "renesas,usb2-phy-r8a7795";
> > > +                       reg = <0 0xee080200 0 0x700>, <0 0xe6590100 0 0x100>;
> > > +                       reg-names = "usb2_host", "hsusb";
> > > +                       interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
> > 
> > Isn't 108 the EHCI0 interrupt?
> > Cfr. the other usb-phy nodes that don't have interrupts.
> 
> Yes, 108 is the EHCI0 interrupt.
> However, as the 73.5.1 Interrupt Signal List in the datasheet is described,
> this EHCI0 has also phy interrupt (the datasheet names "UCON").
> 
> > > +                       clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
> > > +                       clock-names = "usb2", "hsusb";
> > > +                       power-domains = <&cpg>;
> > 
> > This device has two modules clocks, but the CPG/MSSR driver only manages
> > the first modulo clock.
> > Who enables the second clock (HS-USB-IF)?
> 
> Oops! Thank you for the point.
> The second clock was enabled by a boot loader.
> If a boot loader doesn't enable this clock,
> a panic happens as the followings in probing timing of the renesas-hsusb driver:
> 
> renesas_usbhs e6590000.usb: transceiver found
> renesas_usbhs e6590000.usb: gadget probed
> Bad mode in Error handler detected, code 0xbf000002 -- SError
> CPU: 3 PID: 1 Comm: swapper/0 Not tainted 4.4.0-rc6+ #42
> Hardware name: Renesas Salvator-X board based on r8a7795 (DT)
> task: ffffffc031868000 ti: ffffffc031870000 task.ti: ffffffc031870000
> PC is at rcar_gen3_phy_usb2_init+0x38/0x114
> LR is at phy_init+0x60/0xcc
> 
> So, I will fix this issue somehow.
> Also, I would like to revert this patch set to avoid any troubles.
> Simon-san, would you revert this patch set?

Sure, I will drop the entire patchset.