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From: Sai Krishna Potthuri <lakshmis@xilinx.com>
To: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Michal Simek <michals@xilinx.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-arm Mailing List <linux-arm-kernel@lists.infradead.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	devicetree <devicetree@vger.kernel.org>,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
	git <git@xilinx.com>,
	"saikrishna12468@gmail.com" <saikrishna12468@gmail.com>
Subject: RE: [PATCH v4 3/3] pinctrl: Add Xilinx ZynqMP pinctrl driver support
Date: Tue, 23 Mar 2021 08:08:00 +0000	[thread overview]
Message-ID: <SN6PR02MB391785963644FD54FD37B8D9BD649@SN6PR02MB3917.namprd02.prod.outlook.com> (raw)
In-Reply-To: <CAHp75VeQyk6E4DJY0ArYX=Too-nkZ12oA2YcVZ0gw0zz5chNAQ@mail.gmail.com>

Hi Andy Shevchenko,

> -----Original Message-----
> From: Andy Shevchenko <andy.shevchenko@gmail.com>
> Sent: Monday, March 22, 2021 10:47 PM
> To: Sai Krishna Potthuri <lakshmis@xilinx.com>
> Cc: Linus Walleij <linus.walleij@linaro.org>; Rob Herring
> <robh+dt@kernel.org>; Michal Simek <michals@xilinx.com>; Greg Kroah-
> Hartman <gregkh@linuxfoundation.org>; linux-arm Mailing List <linux-arm-
> kernel@lists.infradead.org>; Linux Kernel Mailing List <linux-
> kernel@vger.kernel.org>; devicetree <devicetree@vger.kernel.org>; open
> list:GPIO SUBSYSTEM <linux-gpio@vger.kernel.org>; git <git@xilinx.com>;
> saikrishna12468@gmail.com
> Subject: Re: [PATCH v4 3/3] pinctrl: Add Xilinx ZynqMP pinctrl driver support
> 
> On Mon, Mar 22, 2021 at 5:25 PM Sai Krishna Potthuri
> <lakshmis@xilinx.com> wrote:
> > > From: Andy Shevchenko <andy.shevchenko@gmail.com>
> > > Sent: Friday, March 19, 2021 3:53 PM On Thu, Mar 18, 2021 at 4:42 PM
> > > Sai Krishna Potthuri <lakshmis@xilinx.com>
> > > wrote:
> > > > > From: Andy Shevchenko <andy.shevchenko@gmail.com>
> > > > > Sent: Wednesday, March 17, 2021 6:26 PM On Wed, Mar 17, 2021 at
> > > > > 10:27 AM Sai Krishna Potthuri
> > > > > <lakshmi.sai.krishna.potthuri@xilinx.com> wrote:
> 
> ...
> 
> > > > #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
> > >
> > > Looking into other drivers with similar includes, shouldn't it go
> > > first in the file before any other linux/* asm/* etc?
> > I see some drivers are including this header before linux/* and some
> > are using after linux/*.
> 
> The rule of thumb is that: more generic headers are going first.
> 
> I consider dt/* ones are more generic than linux/* ones because they are
> covering more than just the Linux kernel.
Ok, I will reorder accordingly.
> 
> ...
> 
> > > > > I'm lost here. What is IO standard exactly? Why it can't be in
> > > > > generic headers?
> > > > It represents LVCMOS 3.3 volts/ LVCMOS 1.8 volts.
> > > > Since this is specific to Xilinx ZynqMP platform, considered to be
> > > > added in the driver file.
> > >
> > > So, why can't we create a couple of bits to represent this voltages
> > > in the generic header and gain usability for others as well?
> > I see some drivers are maintaining the configuration list in the
> > driver file, if the configuration is specific to the driver.
> 
> Yes, my point is that this case doesn't sound too specific to the driver. Many
> pin control buffers (in hardware way of speaking) have properties to be
> different voltage tolerant / produce.
Ok, you want me to proceed with this change or shall we wait for
Linus to comment?
> 
> > We can move this to generic header if it is used by others as well.
> > Ok, will wait for Linus to comment.
> > >
> > > Linus?
> 
> ...
> 
> > > > > > +       ret = zynqmp_pm_pinctrl_request(pin);
> > > > > > +       if (ret) {
> > > > > > +               dev_err(pctldev->dev, "request failed for pin
> > > > > > + %u\n", pin);
> > > > >
> > > > > > +               return -EIO;
> > > > >
> > > > > Why shadowing error code?
> > >
> > > So, any comments on the initial Q?
> > Xilinx low level secure firmware error codes are different from Linux error
> codes.
> > Secure firmware maintains list of error codes (positive values other than
> zero).
> > Hence we return -EIO, if the return value from firmware is non-zero.
> 
> Why the zynqmp_pm_pinctrl_request() can't return codes in Linux error
> code space?
I cross checked with the Xilinx firmware team, firmware driver is now returning
Linux error codes in the latest kernel but while developing the driver it was a
different approach. I will update the driver to simply return the values from
firmware calls.
> 
> > > >>  Since it's the only possible error, why is it not
> > > > > reflected in the kernel doc?
> > > > I will update the kernel doc with the error value for such cases.
> > > > >
> > > > > > +       }
> 
> --
> With Best Regards,
> Andy Shevchenko

WARNING: multiple messages have this Message-ID (diff)
From: Sai Krishna Potthuri <lakshmis@xilinx.com>
To: Andy Shevchenko <andy.shevchenko@gmail.com>
Cc: Linus Walleij <linus.walleij@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Michal Simek <michals@xilinx.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-arm Mailing List <linux-arm-kernel@lists.infradead.org>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
	devicetree <devicetree@vger.kernel.org>,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
	git <git@xilinx.com>,
	"saikrishna12468@gmail.com" <saikrishna12468@gmail.com>
Subject: RE: [PATCH v4 3/3] pinctrl: Add Xilinx ZynqMP pinctrl driver support
Date: Tue, 23 Mar 2021 08:08:00 +0000	[thread overview]
Message-ID: <SN6PR02MB391785963644FD54FD37B8D9BD649@SN6PR02MB3917.namprd02.prod.outlook.com> (raw)
In-Reply-To: <CAHp75VeQyk6E4DJY0ArYX=Too-nkZ12oA2YcVZ0gw0zz5chNAQ@mail.gmail.com>

Hi Andy Shevchenko,

> -----Original Message-----
> From: Andy Shevchenko <andy.shevchenko@gmail.com>
> Sent: Monday, March 22, 2021 10:47 PM
> To: Sai Krishna Potthuri <lakshmis@xilinx.com>
> Cc: Linus Walleij <linus.walleij@linaro.org>; Rob Herring
> <robh+dt@kernel.org>; Michal Simek <michals@xilinx.com>; Greg Kroah-
> Hartman <gregkh@linuxfoundation.org>; linux-arm Mailing List <linux-arm-
> kernel@lists.infradead.org>; Linux Kernel Mailing List <linux-
> kernel@vger.kernel.org>; devicetree <devicetree@vger.kernel.org>; open
> list:GPIO SUBSYSTEM <linux-gpio@vger.kernel.org>; git <git@xilinx.com>;
> saikrishna12468@gmail.com
> Subject: Re: [PATCH v4 3/3] pinctrl: Add Xilinx ZynqMP pinctrl driver support
> 
> On Mon, Mar 22, 2021 at 5:25 PM Sai Krishna Potthuri
> <lakshmis@xilinx.com> wrote:
> > > From: Andy Shevchenko <andy.shevchenko@gmail.com>
> > > Sent: Friday, March 19, 2021 3:53 PM On Thu, Mar 18, 2021 at 4:42 PM
> > > Sai Krishna Potthuri <lakshmis@xilinx.com>
> > > wrote:
> > > > > From: Andy Shevchenko <andy.shevchenko@gmail.com>
> > > > > Sent: Wednesday, March 17, 2021 6:26 PM On Wed, Mar 17, 2021 at
> > > > > 10:27 AM Sai Krishna Potthuri
> > > > > <lakshmi.sai.krishna.potthuri@xilinx.com> wrote:
> 
> ...
> 
> > > > #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
> > >
> > > Looking into other drivers with similar includes, shouldn't it go
> > > first in the file before any other linux/* asm/* etc?
> > I see some drivers are including this header before linux/* and some
> > are using after linux/*.
> 
> The rule of thumb is that: more generic headers are going first.
> 
> I consider dt/* ones are more generic than linux/* ones because they are
> covering more than just the Linux kernel.
Ok, I will reorder accordingly.
> 
> ...
> 
> > > > > I'm lost here. What is IO standard exactly? Why it can't be in
> > > > > generic headers?
> > > > It represents LVCMOS 3.3 volts/ LVCMOS 1.8 volts.
> > > > Since this is specific to Xilinx ZynqMP platform, considered to be
> > > > added in the driver file.
> > >
> > > So, why can't we create a couple of bits to represent this voltages
> > > in the generic header and gain usability for others as well?
> > I see some drivers are maintaining the configuration list in the
> > driver file, if the configuration is specific to the driver.
> 
> Yes, my point is that this case doesn't sound too specific to the driver. Many
> pin control buffers (in hardware way of speaking) have properties to be
> different voltage tolerant / produce.
Ok, you want me to proceed with this change or shall we wait for
Linus to comment?
> 
> > We can move this to generic header if it is used by others as well.
> > Ok, will wait for Linus to comment.
> > >
> > > Linus?
> 
> ...
> 
> > > > > > +       ret = zynqmp_pm_pinctrl_request(pin);
> > > > > > +       if (ret) {
> > > > > > +               dev_err(pctldev->dev, "request failed for pin
> > > > > > + %u\n", pin);
> > > > >
> > > > > > +               return -EIO;
> > > > >
> > > > > Why shadowing error code?
> > >
> > > So, any comments on the initial Q?
> > Xilinx low level secure firmware error codes are different from Linux error
> codes.
> > Secure firmware maintains list of error codes (positive values other than
> zero).
> > Hence we return -EIO, if the return value from firmware is non-zero.
> 
> Why the zynqmp_pm_pinctrl_request() can't return codes in Linux error
> code space?
I cross checked with the Xilinx firmware team, firmware driver is now returning
Linux error codes in the latest kernel but while developing the driver it was a
different approach. I will update the driver to simply return the values from
firmware calls.
> 
> > > >>  Since it's the only possible error, why is it not
> > > > > reflected in the kernel doc?
> > > > I will update the kernel doc with the error value for such cases.
> > > > >
> > > > > > +       }
> 
> --
> With Best Regards,
> Andy Shevchenko
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-03-23  8:08 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-17  8:25 [PATCH v4 0/3] Add ZynqMP pinctrl driver Sai Krishna Potthuri
2021-03-17  8:25 ` Sai Krishna Potthuri
2021-03-17  8:25 ` [PATCH v4 1/3] firmware: xilinx: Add pinctrl support Sai Krishna Potthuri
2021-03-17  8:25   ` Sai Krishna Potthuri
2021-03-17  8:25 ` [PATCH v4 2/3] dt-bindings: pinctrl: Add binding for ZynqMP pinctrl driver Sai Krishna Potthuri
2021-03-17  8:25   ` Sai Krishna Potthuri
2021-03-25  9:00   ` Linus Walleij
2021-03-25  9:00     ` Linus Walleij
2021-03-17  8:25 ` [PATCH v4 3/3] pinctrl: Add Xilinx ZynqMP pinctrl driver support Sai Krishna Potthuri
2021-03-17  8:25   ` Sai Krishna Potthuri
2021-03-17 12:55   ` Andy Shevchenko
2021-03-17 12:55     ` Andy Shevchenko
2021-03-18 14:42     ` Sai Krishna Potthuri
2021-03-18 14:42       ` Sai Krishna Potthuri
2021-03-19 10:23       ` Andy Shevchenko
2021-03-19 10:23         ` Andy Shevchenko
2021-03-22 15:25         ` Sai Krishna Potthuri
2021-03-22 15:25           ` Sai Krishna Potthuri
2021-03-22 17:16           ` Andy Shevchenko
2021-03-22 17:16             ` Andy Shevchenko
2021-03-23  8:08             ` Sai Krishna Potthuri [this message]
2021-03-23  8:08               ` Sai Krishna Potthuri
2021-03-25  8:57           ` Linus Walleij
2021-03-25  8:57             ` Linus Walleij
2021-03-25 10:15             ` Sai Krishna Potthuri
2021-03-25 10:15               ` Sai Krishna Potthuri
2021-03-23 13:42   ` Greg Kroah-Hartman
2021-03-23 13:42     ` Greg Kroah-Hartman
2021-03-24  8:29     ` Michal Simek
2021-03-24  8:29       ` Michal Simek
2021-03-24  8:49       ` Greg Kroah-Hartman
2021-03-24  8:49         ` Greg Kroah-Hartman
2021-03-24  9:02         ` Michal Simek
2021-03-24  9:02           ` Michal Simek
2021-03-24  9:13           ` Greg Kroah-Hartman
2021-03-24  9:13             ` Greg Kroah-Hartman
2021-03-24  9:16             ` Michal Simek
2021-03-24  9:16               ` Michal Simek

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