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From: Paul Cercueil <paul@crapouillou.net>
To: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>
Cc: Sam Ravnborg <sam@ravnborg.org>,
	od@zcrc.me, linux-mips@vger.kernel.org,
	dri-devel@lists.freedesktop.org, linux-kernel@vger.kernel.org,
	stable@vger.kernel.org
Subject: Re: [PATCH] drm/ingenic: Fix pixclock rate for 24-bit serial panels
Date: Mon, 12 Apr 2021 15:34:07 +0100	[thread overview]
Message-ID: <VGGGRQ.1IX0AMZPBZBT3@crapouillou.net> (raw)
In-Reply-To: <20210323144008.166248-1-paul@crapouillou.net>

Hi,

Can I have an ACK for this patch?

Then I can apply it to drm-misc-next-fixes.

Cheers,
-Paul


Le mar. 23 mars 2021 à 14:40, Paul Cercueil <paul@crapouillou.net> a 
écrit :
> When using a 24-bit panel on a 8-bit serial bus, the pixel clock
> requested by the panel has to be multiplied by 3, since the subpixels
> are shifted sequentially.
> 
> The code (in ingenic_drm_encoder_atomic_check) already computed
> crtc_state->adjusted_mode->crtc_clock accordingly, but clk_set_rate()
> used crtc_state->adjusted_mode->clock instead.
> 
> Fixes: 28ab7d35b6e0 ("drm/ingenic: Properly compute timings when 
> using a 3x8-bit panel")
> Cc: stable@vger.kernel.org # v5.10
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
> ---
>  drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c 
> b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
> index d60e1eefc9d1..cba68bf52ec5 100644
> --- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
> +++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
> @@ -342,7 +342,7 @@ static void ingenic_drm_crtc_atomic_flush(struct 
> drm_crtc *crtc,
>  	if (priv->update_clk_rate) {
>  		mutex_lock(&priv->clk_mutex);
>  		clk_set_rate(priv->pix_clk,
> -			     crtc_state->adjusted_mode.clock * 1000);
> +			     crtc_state->adjusted_mode.crtc_clock * 1000);
>  		priv->update_clk_rate = false;
>  		mutex_unlock(&priv->clk_mutex);
>  	}
> --
> 2.30.2
> 



WARNING: multiple messages have this Message-ID (diff)
From: Paul Cercueil <paul@crapouillou.net>
To: David Airlie <airlied@linux.ie>, Daniel Vetter <daniel@ffwll.ch>
Cc: linux-mips@vger.kernel.org, stable@vger.kernel.org,
	linux-kernel@vger.kernel.org, od@zcrc.me,
	dri-devel@lists.freedesktop.org, Sam Ravnborg <sam@ravnborg.org>
Subject: Re: [PATCH] drm/ingenic: Fix pixclock rate for 24-bit serial panels
Date: Mon, 12 Apr 2021 15:34:07 +0100	[thread overview]
Message-ID: <VGGGRQ.1IX0AMZPBZBT3@crapouillou.net> (raw)
In-Reply-To: <20210323144008.166248-1-paul@crapouillou.net>

Hi,

Can I have an ACK for this patch?

Then I can apply it to drm-misc-next-fixes.

Cheers,
-Paul


Le mar. 23 mars 2021 à 14:40, Paul Cercueil <paul@crapouillou.net> a 
écrit :
> When using a 24-bit panel on a 8-bit serial bus, the pixel clock
> requested by the panel has to be multiplied by 3, since the subpixels
> are shifted sequentially.
> 
> The code (in ingenic_drm_encoder_atomic_check) already computed
> crtc_state->adjusted_mode->crtc_clock accordingly, but clk_set_rate()
> used crtc_state->adjusted_mode->clock instead.
> 
> Fixes: 28ab7d35b6e0 ("drm/ingenic: Properly compute timings when 
> using a 3x8-bit panel")
> Cc: stable@vger.kernel.org # v5.10
> Signed-off-by: Paul Cercueil <paul@crapouillou.net>
> ---
>  drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c 
> b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
> index d60e1eefc9d1..cba68bf52ec5 100644
> --- a/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
> +++ b/drivers/gpu/drm/ingenic/ingenic-drm-drv.c
> @@ -342,7 +342,7 @@ static void ingenic_drm_crtc_atomic_flush(struct 
> drm_crtc *crtc,
>  	if (priv->update_clk_rate) {
>  		mutex_lock(&priv->clk_mutex);
>  		clk_set_rate(priv->pix_clk,
> -			     crtc_state->adjusted_mode.clock * 1000);
> +			     crtc_state->adjusted_mode.crtc_clock * 1000);
>  		priv->update_clk_rate = false;
>  		mutex_unlock(&priv->clk_mutex);
>  	}
> --
> 2.30.2
> 


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  reply	other threads:[~2021-04-12 14:34 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-23 14:40 [PATCH] drm/ingenic: Fix pixclock rate for 24-bit serial panels Paul Cercueil
2021-03-23 14:40 ` Paul Cercueil
2021-04-12 14:34 ` Paul Cercueil [this message]
2021-04-12 14:34   ` Paul Cercueil
2021-04-12 14:53   ` H. Nikolaus Schaller
2021-04-12 14:53     ` H. Nikolaus Schaller
2021-05-13 12:29 ` Paul Cercueil
2021-05-13 12:29   ` Paul Cercueil
2021-05-14 17:26   ` Thomas Zimmermann
2021-05-14 17:26     ` Thomas Zimmermann
2021-05-17 13:15   ` Daniel Vetter
2021-05-17 13:15     ` Daniel Vetter
2021-05-17 14:30     ` Paul Cercueil
2021-05-17 14:30       ` Paul Cercueil
2021-05-17 14:37       ` Daniel Vetter
2021-05-17 14:37         ` Daniel Vetter

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