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From: Q.Y. Gong <qianyu.gong@nxp.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [Patch v6 5/9] armv8: fsl-layerscape: spl: remove BSS clearing and board_init_r
Date: Fri, 9 Sep 2016 06:12:53 +0000	[thread overview]
Message-ID: <VI1PR04MB21116D4E30C46FBCA5132E51E7FA0@VI1PR04MB2111.eurprd04.prod.outlook.com> (raw)
In-Reply-To: <AM4PR0401MB173271D930B58DBA5FBB4F8C9AFB0@AM4PR0401MB1732.eurprd04.prod.outlook.com>

Hi York,

> -----Original Message-----
> From: york sun
> Sent: Friday, September 09, 2016 1:07 AM
> To: Q.Y. Gong <qianyu.gong@nxp.com>; u-boot at lists.denx.de
> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>; Vincent Hu
> <mingkai.hu@nxp.com>; S.H. Xie <shaohui.xie@nxp.com>; Z.Q. Hou
> <zhiqiang.hou@nxp.com>; Wenbin Song <wenbin.song@nxp.com>; Shengzhou Liu
> <shengzhou.liu@nxp.com>
> Subject: Re: [Patch v6 5/9] armv8: fsl-layerscape: spl: remove BSS clearing and
> board_init_r
> 
> On 09/07/2016 03:08 AM, Gong Qianyu wrote:
> > As per the top level U-Boot README "Board Initialisation Flow"
> > section, board_init_f() should return without calling board_init_r()
> > directly.
> > Clearing BSS and calling board_init_r() will be done in crt0_64.S.
> >
> > Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com>
> > ---
> > v6:
> >  - No change.
> > v5:
> >  - New Patch.
> >
> >  arch/arm/cpu/armv8/fsl-layerscape/spl.c | 5 -----
> >  1 file changed, 5 deletions(-)
> >
> > diff --git a/arch/arm/cpu/armv8/fsl-layerscape/spl.c
> > b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
> > index 19e34fa..b8e1d75 100644
> > --- a/arch/arm/cpu/armv8/fsl-layerscape/spl.c
> > +++ b/arch/arm/cpu/armv8/fsl-layerscape/spl.c
> > @@ -62,13 +62,8 @@ void board_init_f(ulong dummy)
> >  	i2c_init_all();
> >  #endif
> >  	dram_init();
> > -
> > -	/* Clear the BSS */
> > -	memset(__bss_start, 0, __bss_end - __bss_start);
> > -
> >  #ifdef CONFIG_LAYERSCAPE_NS_ACCESS
> >  	enable_layerscape_ns_access();
> >  #endif
> > -	board_init_r(NULL, 0);
> >  }
> >  #endif
> >
> 
> Qianyu,
> 
> This looks OK but it breaks LS2080ARDB NAND boot. Please investigate.
> 
> York

I can boot it up with this patch set on star server: LS2085ARDB-1. 
I also tested the single patch and no issue.

This is my U-Boot command:
=>tftp 82000000 b52263/ls2080ardb/u-boot-with-spl.bin;nand erase 80000 180000;nand write 82000000 80000 120000;qixis_reset nand

Regards,
Qianyu

  reply	other threads:[~2016-09-09  6:12 UTC|newest]

Thread overview: 23+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-07  9:56 [U-Boot] [Patch v6 0/9] Add LS1046ARDB&QDS board support Gong Qianyu
2016-09-07  9:56 ` [U-Boot] [Patch v6 1/9] ddr: fsl: fix a compile issue Gong Qianyu
2016-09-07  9:56 ` [U-Boot] [Patch v6 2/9] Export memset for standalone AQ FW load apps Gong Qianyu
2016-09-07  9:56 ` [U-Boot] [Patch v6 3/9] armv8: fsl-layerscape: Increase L2 Data RAM latency and L2 Tag RAM latency Gong Qianyu
2016-09-07  9:56 ` [U-Boot] [Patch v6 4/9] armv8: fsl-layerscape: add define CONFIG_STANDALONE_LOAD_ADDR for standalone app Gong Qianyu
2016-09-07  9:56 ` [U-Boot] [Patch v6 5/9] armv8: fsl-layerscape: spl: remove BSS clearing and board_init_r Gong Qianyu
2016-09-08 17:06   ` york sun
2016-09-09  6:12     ` Q.Y. Gong [this message]
2016-09-13 20:45       ` york sun
2016-09-14  7:32         ` Q.Y. Gong
2016-09-14 15:55           ` york sun
2016-09-07  9:56 ` [U-Boot] [Patch v6 6/9] armv8: ls1046a: Enable DDR erratum for ls1046a Gong Qianyu
2016-09-07  9:56 ` [U-Boot] [Patch v6 7/9] armv8: ls1046a: disable SATA ECC in DCSR Gong Qianyu
2016-09-07  9:56 ` [U-Boot] [Patch v6 8/9] armv8: ls1046ardb: Add LS1046ARDB board support Gong Qianyu
2016-09-08 17:21   ` york sun
2016-09-09  0:07     ` Prabhakar Kushwaha
2016-09-09 16:20       ` york sun
2016-09-16 20:14   ` york sun
2016-09-21  3:21     ` Q.Y. Gong
2016-09-21  7:46     ` Mingkai Hu
2016-09-21 15:31       ` york sun
2016-09-07  9:56 ` [U-Boot] [Patch v6 9/9] armv8: ls1046aqds: Add LS1046AQDS " Gong Qianyu
2016-09-20 18:06 ` [U-Boot] [Patch v6 0/9] Add LS1046ARDB&QDS " york sun

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