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From: Jean-Philippe Brucker <jean-philippe@linaro.org>
To: Zhangfei Gao <zhangfei.gao@linaro.org>
Cc: Bjorn Helgaas <helgaas@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Arnd Bergmann <arnd@arndb.de>,
	kenneth-lee-2012@foxmail.com, wangzhou1@hisilicon.com,
	linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,
	wanghuiqiang <wanghuiqiang@huawei.com>
Subject: Re: [PATCH] PCI: Add a quirk to enable SVA for HiSilicon chip
Date: Wed, 13 Jan 2021 15:39:05 +0100	[thread overview]
Message-ID: <X/8GCc9e/2GmYOyz@myrica> (raw)
In-Reply-To: <b9fd8097-85f9-408d-f58c-b26dd21f3aa0@linaro.org>

On Wed, Jan 13, 2021 at 08:05:11PM +0800, Zhangfei Gao wrote:
> > > +	/* Device-tree can set the stall property */
> > > +	if (!pdev->dev.of_node &&
> > > +	    device_add_properties(&pdev->dev, properties))
> > Does this mean "dma-can-stall" *can* be set via DT, and if it is, this
> > quirk is not needed?  So is this quirk basically a workaround for an
> > old or broken DT?
> The quirk is still needed for uefi case, since uefi can not describe the
> endpoints (peripheral devices).

Yes, this comment isn't very clear. How about
	/*
	 * Set the dma-can-stall property on ACPI platforms. Device tree
	 * can set it directly.
	 */ 

> > 
> > > +		pci_warn(pdev, "could not add stall property");
> > > +}
> > > +
> > Remove this blank line to follow the style of the rest of the file.
> > 
> > > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa250, quirk_huawei_pcie_sva);
> > > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa251, quirk_huawei_pcie_sva);
> > > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa255, quirk_huawei_pcie_sva);
> > > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa256, quirk_huawei_pcie_sva);
> > > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa258, quirk_huawei_pcie_sva);
> > > +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_HUAWEI, 0xa259, quirk_huawei_pcie_sva);
> > > +
> > >   /*
> > >    * It's possible for the MSI to get corrupted if SHPC and ACPI are used
> > >    * together on certain PXH-based systems.
> 
> How about changes like this
> 
> diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> index 68f53f7..886ea26 100644
> --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c
> @@ -2466,6 +2466,9 @@ static int arm_smmu_enable_pasid(struct
> arm_smmu_master *master)
>      if (num_pasids <= 0)
>          return num_pasids;
> 
> +    if (master->stall_enabled)
> +        pdev->pasid_no_tlp = 1;
> +

From the SMMU perspective there is no relation between stall and pasid, so
I don't think this makes a lot of sense. Could we instead set pasid_no_tlp
for the list of device IDs above?

I agree with splitting the patches. PASID support for SMMUv3 is upstream,
but the introduction of dma-can-stall, which this depends on, is still
pending on the list.

Thanks,
Jean

  reply	other threads:[~2021-01-13 14:40 UTC|newest]

Thread overview: 102+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-26 11:49 [PATCH 0/2] Introduce PCI_FIXUP_IOMMU Zhangfei Gao
2020-05-26 11:49 ` Zhangfei Gao
2020-05-26 11:49 ` Zhangfei Gao
2020-05-26 11:49 ` [PATCH 1/2] PCI: " Zhangfei Gao
2020-05-26 11:49   ` Zhangfei Gao
2020-05-26 11:49   ` Zhangfei Gao
2020-05-26 14:46   ` Christoph Hellwig
2020-05-26 14:46     ` Christoph Hellwig
2020-05-26 14:46     ` Christoph Hellwig
2020-05-26 15:09     ` Zhangfei Gao
2020-05-26 15:09       ` Zhangfei Gao
2020-05-26 15:09       ` Zhangfei Gao
2020-05-27  9:01       ` Greg Kroah-Hartman
2020-05-27  9:01         ` Greg Kroah-Hartman
2020-05-27  9:01         ` Greg Kroah-Hartman
2020-05-26 11:49 ` [PATCH 2/2] iommu: calling pci_fixup_iommu in iommu_fwspec_init Zhangfei Gao
2020-05-26 11:49   ` Zhangfei Gao
2020-05-26 11:49   ` Zhangfei Gao
2020-05-27  9:01   ` Greg Kroah-Hartman
2020-05-27  9:01     ` Greg Kroah-Hartman
2020-05-27  9:01     ` Greg Kroah-Hartman
2020-05-28  6:53     ` Zhangfei Gao
2020-05-28  6:53       ` Zhangfei Gao
2020-05-28  6:53       ` Zhangfei Gao
2020-05-27  9:00 ` [PATCH 0/2] Introduce PCI_FIXUP_IOMMU Greg Kroah-Hartman
2020-05-27  9:00   ` Greg Kroah-Hartman
2020-05-27  9:00   ` Greg Kroah-Hartman
2020-05-27  9:53   ` Arnd Bergmann
2020-05-27  9:53     ` Arnd Bergmann
2020-05-27  9:53     ` Arnd Bergmann
2020-05-27 13:51     ` Zhangfei Gao
2020-05-27 13:51       ` Zhangfei Gao
2020-05-27 13:51       ` Zhangfei Gao
2020-05-27 18:18 ` Bjorn Helgaas
2020-05-27 18:18   ` Bjorn Helgaas
2020-05-27 18:18   ` Bjorn Helgaas
2020-05-28  6:46   ` Zhangfei Gao
2020-05-28  6:46     ` Zhangfei Gao
2020-05-28  6:46     ` Zhangfei Gao
2020-05-28  7:33   ` Joerg Roedel
2020-05-28  7:33     ` Joerg Roedel
2020-05-28  7:33     ` Joerg Roedel
2020-06-01 17:41     ` Bjorn Helgaas
2020-06-01 17:41       ` Bjorn Helgaas
2020-06-01 17:41       ` Bjorn Helgaas
2020-06-04 13:33       ` Zhangfei Gao
2020-06-04 13:33         ` Zhangfei Gao
2020-06-04 13:33         ` Zhangfei Gao
2020-06-05 23:19         ` Bjorn Helgaas
2020-06-05 23:19           ` Bjorn Helgaas
2020-06-05 23:19           ` Bjorn Helgaas
2020-06-08  2:54           ` Zhangfei Gao
2020-06-08  2:54             ` Zhangfei Gao
2020-06-08  2:54             ` Zhangfei Gao
2020-06-08 16:41             ` Bjorn Helgaas
2020-06-08 16:41               ` Bjorn Helgaas
2020-06-08 16:41               ` Bjorn Helgaas
2020-06-09  4:01               ` Zhangfei Gao
2020-06-09  4:01                 ` Zhangfei Gao
2020-06-09  4:01                 ` Zhangfei Gao
2020-06-09  9:15                 ` Arnd Bergmann
2020-06-09  9:15                   ` Arnd Bergmann
2020-06-09  9:15                   ` Arnd Bergmann
2020-06-09 16:49                   ` Bjorn Helgaas
2020-06-09 16:49                     ` Bjorn Helgaas
2020-06-09 16:49                     ` Bjorn Helgaas
2020-06-11  2:54                     ` Zhangfei Gao
2020-06-11  2:54                       ` Zhangfei Gao
2020-06-11  2:54                       ` Zhangfei Gao
2020-06-11 13:44                       ` Bjorn Helgaas
2020-06-11 13:44                         ` Bjorn Helgaas
2020-06-11 13:44                         ` Bjorn Helgaas
2020-06-13 14:30                         ` Zhangfei Gao
2020-06-13 14:30                           ` Zhangfei Gao
2020-06-13 14:30                           ` Zhangfei Gao
2020-06-15 23:52                           ` Bjorn Helgaas
2020-06-15 23:52                             ` Bjorn Helgaas
2020-06-15 23:52                             ` Bjorn Helgaas
2020-06-19  2:26                             ` Zhangfei Gao
2020-06-19  2:26                               ` Zhangfei Gao
2020-06-19  2:26                               ` Zhangfei Gao
2020-06-23 15:04                               ` Bjorn Helgaas
2020-06-23 15:04                                 ` Bjorn Helgaas
2020-06-23 15:04                                 ` Bjorn Helgaas
2020-12-16 11:24                                 ` Zhou Wang
2020-12-16 11:24                                   ` Zhou Wang
2020-12-16 11:24                                   ` Zhou Wang
2020-12-17 20:38                                   ` Bjorn Helgaas
2020-12-17 20:38                                     ` Bjorn Helgaas
2020-12-17 20:38                                     ` Bjorn Helgaas
2021-01-12  6:49                                     ` [PATCH] PCI: Add a quirk to enable SVA for HiSilicon chip Zhangfei Gao
2021-01-12 17:02                                       ` Bjorn Helgaas
2021-01-13 12:05                                         ` Zhangfei Gao
2021-01-13 14:39                                           ` Jean-Philippe Brucker [this message]
2021-01-12  7:05                                     ` [PATCH 0/2] Introduce PCI_FIXUP_IOMMU zhangfei.gao
2021-01-12  7:05                                       ` zhangfei.gao
2020-06-22 11:55         ` Joerg Roedel
2020-06-22 11:55           ` Joerg Roedel
2020-06-23  7:48           ` Zhangfei Gao
2020-06-23  7:48             ` Zhangfei Gao
2020-06-22 11:53       ` Joerg Roedel
2020-06-22 11:53         ` Joerg Roedel

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