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From: Zhangfei Gao <zhangfei.gao@linaro.org>
To: Joerg Roedel <joro@8bytes.org>
Cc: Bjorn Helgaas <helgaas@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	Arnd Bergmann <arnd@arndb.de>,
	Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>,
	Hanjun Guo <guohanjun@huawei.com>,
	Sudeep Holla <sudeep.holla@arm.com>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	Len Brown <lenb@kernel.org>,
	jean-philippe <jean-philippe@linaro.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Herbert Xu <herbert@gondor.apana.org.au>,
	kenneth-lee-2012@foxmail.com, Wangzhou <wangzhou1@hisilicon.com>,
	linux-kernel@vger.kernel.org, linux-crypto@vger.kernel.org,
	iommu@lists.linux-foundation.org, linux-acpi@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, linux-pci@vger.kernel.org
Subject: Re: [PATCH 0/2] Introduce PCI_FIXUP_IOMMU
Date: Tue, 23 Jun 2020 15:48:25 +0800	[thread overview]
Message-ID: <d007cbea-85c0-6c75-fc4a-e2872ff59ea4@linaro.org> (raw)
In-Reply-To: <20200622115536.GH3701@8bytes.org>

Hi, Joerg

On 2020/6/22 下午7:55, Joerg Roedel wrote:
> On Thu, Jun 04, 2020 at 09:33:07PM +0800, Zhangfei Gao wrote:
>> +++ b/drivers/iommu/iommu.c
>> @@ -2418,6 +2418,10 @@ int iommu_fwspec_init(struct device *dev, struct
>> fwnode_handle *iommu_fwnode,
>>          fwspec->iommu_fwnode = iommu_fwnode;
>>          fwspec->ops = ops;
>>          dev_iommu_fwspec_set(dev, fwspec);
>> +
>> +       if (dev_is_pci(dev))
>> +               pci_fixup_device(pci_fixup_final, to_pci_dev(dev));
>> +
> That's not going to fly, I don't think we should run the fixups twice,
> and they should not be run from IOMMU code. Is the only reason for this
> second pass that iommu_fwspec is not yet allocated when it runs the
> first time? I ask because it might be easier to just allocate the struct
> earlier then.
Thanks for looking this.

Yes, it is the only reason calling fixup secondly after iommu_fwspec is 
allocated.

The first time fixup final is very early in pci_bus_add_device.
If allocating iommu_fwspec earlier, it maybe in pci_alloc_dev.
And assigning ops still in iommu_fwspec_init.
Have tested it works.
Not sure is it acceptable?

Alternatively, adding can_stall to struct pci_dev is simple but ugly too,
since pci does not know stall now.


Thanks




WARNING: multiple messages have this Message-ID (diff)
From: Zhangfei Gao <zhangfei.gao@linaro.org>
To: Joerg Roedel <joro@8bytes.org>
Cc: jean-philippe <jean-philippe@linaro.org>,
	Herbert Xu <herbert@gondor.apana.org.au>,
	Arnd Bergmann <arnd@arndb.de>,
	linux-pci@vger.kernel.org,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Hanjun Guo <guohanjun@huawei.com>,
	"Rafael J. Wysocki" <rjw@rjwysocki.net>,
	linux-kernel@vger.kernel.org, iommu@lists.linux-foundation.org,
	linux-acpi@vger.kernel.org, Bjorn Helgaas <helgaas@kernel.org>,
	linux-crypto@vger.kernel.org, Sudeep Holla <sudeep.holla@arm.com>,
	Bjorn Helgaas <bhelgaas@google.com>,
	kenneth-lee-2012@foxmail.com,
	linux-arm-kernel@lists.infradead.org, Len Brown <lenb@kernel.org>
Subject: Re: [PATCH 0/2] Introduce PCI_FIXUP_IOMMU
Date: Tue, 23 Jun 2020 15:48:25 +0800	[thread overview]
Message-ID: <d007cbea-85c0-6c75-fc4a-e2872ff59ea4@linaro.org> (raw)
In-Reply-To: <20200622115536.GH3701@8bytes.org>

Hi, Joerg

On 2020/6/22 下午7:55, Joerg Roedel wrote:
> On Thu, Jun 04, 2020 at 09:33:07PM +0800, Zhangfei Gao wrote:
>> +++ b/drivers/iommu/iommu.c
>> @@ -2418,6 +2418,10 @@ int iommu_fwspec_init(struct device *dev, struct
>> fwnode_handle *iommu_fwnode,
>>          fwspec->iommu_fwnode = iommu_fwnode;
>>          fwspec->ops = ops;
>>          dev_iommu_fwspec_set(dev, fwspec);
>> +
>> +       if (dev_is_pci(dev))
>> +               pci_fixup_device(pci_fixup_final, to_pci_dev(dev));
>> +
> That's not going to fly, I don't think we should run the fixups twice,
> and they should not be run from IOMMU code. Is the only reason for this
> second pass that iommu_fwspec is not yet allocated when it runs the
> first time? I ask because it might be easier to just allocate the struct
> earlier then.
Thanks for looking this.

Yes, it is the only reason calling fixup secondly after iommu_fwspec is 
allocated.

The first time fixup final is very early in pci_bus_add_device.
If allocating iommu_fwspec earlier, it maybe in pci_alloc_dev.
And assigning ops still in iommu_fwspec_init.
Have tested it works.
Not sure is it acceptable?

Alternatively, adding can_stall to struct pci_dev is simple but ugly too,
since pci does not know stall now.


Thanks



_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu

  reply	other threads:[~2020-06-23  7:48 UTC|newest]

Thread overview: 102+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-05-26 11:49 [PATCH 0/2] Introduce PCI_FIXUP_IOMMU Zhangfei Gao
2020-05-26 11:49 ` Zhangfei Gao
2020-05-26 11:49 ` Zhangfei Gao
2020-05-26 11:49 ` [PATCH 1/2] PCI: " Zhangfei Gao
2020-05-26 11:49   ` Zhangfei Gao
2020-05-26 11:49   ` Zhangfei Gao
2020-05-26 14:46   ` Christoph Hellwig
2020-05-26 14:46     ` Christoph Hellwig
2020-05-26 14:46     ` Christoph Hellwig
2020-05-26 15:09     ` Zhangfei Gao
2020-05-26 15:09       ` Zhangfei Gao
2020-05-26 15:09       ` Zhangfei Gao
2020-05-27  9:01       ` Greg Kroah-Hartman
2020-05-27  9:01         ` Greg Kroah-Hartman
2020-05-27  9:01         ` Greg Kroah-Hartman
2020-05-26 11:49 ` [PATCH 2/2] iommu: calling pci_fixup_iommu in iommu_fwspec_init Zhangfei Gao
2020-05-26 11:49   ` Zhangfei Gao
2020-05-26 11:49   ` Zhangfei Gao
2020-05-27  9:01   ` Greg Kroah-Hartman
2020-05-27  9:01     ` Greg Kroah-Hartman
2020-05-27  9:01     ` Greg Kroah-Hartman
2020-05-28  6:53     ` Zhangfei Gao
2020-05-28  6:53       ` Zhangfei Gao
2020-05-28  6:53       ` Zhangfei Gao
2020-05-27  9:00 ` [PATCH 0/2] Introduce PCI_FIXUP_IOMMU Greg Kroah-Hartman
2020-05-27  9:00   ` Greg Kroah-Hartman
2020-05-27  9:00   ` Greg Kroah-Hartman
2020-05-27  9:53   ` Arnd Bergmann
2020-05-27  9:53     ` Arnd Bergmann
2020-05-27  9:53     ` Arnd Bergmann
2020-05-27 13:51     ` Zhangfei Gao
2020-05-27 13:51       ` Zhangfei Gao
2020-05-27 13:51       ` Zhangfei Gao
2020-05-27 18:18 ` Bjorn Helgaas
2020-05-27 18:18   ` Bjorn Helgaas
2020-05-27 18:18   ` Bjorn Helgaas
2020-05-28  6:46   ` Zhangfei Gao
2020-05-28  6:46     ` Zhangfei Gao
2020-05-28  6:46     ` Zhangfei Gao
2020-05-28  7:33   ` Joerg Roedel
2020-05-28  7:33     ` Joerg Roedel
2020-05-28  7:33     ` Joerg Roedel
2020-06-01 17:41     ` Bjorn Helgaas
2020-06-01 17:41       ` Bjorn Helgaas
2020-06-01 17:41       ` Bjorn Helgaas
2020-06-04 13:33       ` Zhangfei Gao
2020-06-04 13:33         ` Zhangfei Gao
2020-06-04 13:33         ` Zhangfei Gao
2020-06-05 23:19         ` Bjorn Helgaas
2020-06-05 23:19           ` Bjorn Helgaas
2020-06-05 23:19           ` Bjorn Helgaas
2020-06-08  2:54           ` Zhangfei Gao
2020-06-08  2:54             ` Zhangfei Gao
2020-06-08  2:54             ` Zhangfei Gao
2020-06-08 16:41             ` Bjorn Helgaas
2020-06-08 16:41               ` Bjorn Helgaas
2020-06-08 16:41               ` Bjorn Helgaas
2020-06-09  4:01               ` Zhangfei Gao
2020-06-09  4:01                 ` Zhangfei Gao
2020-06-09  4:01                 ` Zhangfei Gao
2020-06-09  9:15                 ` Arnd Bergmann
2020-06-09  9:15                   ` Arnd Bergmann
2020-06-09  9:15                   ` Arnd Bergmann
2020-06-09 16:49                   ` Bjorn Helgaas
2020-06-09 16:49                     ` Bjorn Helgaas
2020-06-09 16:49                     ` Bjorn Helgaas
2020-06-11  2:54                     ` Zhangfei Gao
2020-06-11  2:54                       ` Zhangfei Gao
2020-06-11  2:54                       ` Zhangfei Gao
2020-06-11 13:44                       ` Bjorn Helgaas
2020-06-11 13:44                         ` Bjorn Helgaas
2020-06-11 13:44                         ` Bjorn Helgaas
2020-06-13 14:30                         ` Zhangfei Gao
2020-06-13 14:30                           ` Zhangfei Gao
2020-06-13 14:30                           ` Zhangfei Gao
2020-06-15 23:52                           ` Bjorn Helgaas
2020-06-15 23:52                             ` Bjorn Helgaas
2020-06-15 23:52                             ` Bjorn Helgaas
2020-06-19  2:26                             ` Zhangfei Gao
2020-06-19  2:26                               ` Zhangfei Gao
2020-06-19  2:26                               ` Zhangfei Gao
2020-06-23 15:04                               ` Bjorn Helgaas
2020-06-23 15:04                                 ` Bjorn Helgaas
2020-06-23 15:04                                 ` Bjorn Helgaas
2020-12-16 11:24                                 ` Zhou Wang
2020-12-16 11:24                                   ` Zhou Wang
2020-12-16 11:24                                   ` Zhou Wang
2020-12-17 20:38                                   ` Bjorn Helgaas
2020-12-17 20:38                                     ` Bjorn Helgaas
2020-12-17 20:38                                     ` Bjorn Helgaas
2021-01-12  6:49                                     ` [PATCH] PCI: Add a quirk to enable SVA for HiSilicon chip Zhangfei Gao
2021-01-12 17:02                                       ` Bjorn Helgaas
2021-01-13 12:05                                         ` Zhangfei Gao
2021-01-13 14:39                                           ` Jean-Philippe Brucker
2021-01-12  7:05                                     ` [PATCH 0/2] Introduce PCI_FIXUP_IOMMU zhangfei.gao
2021-01-12  7:05                                       ` zhangfei.gao
2020-06-22 11:55         ` Joerg Roedel
2020-06-22 11:55           ` Joerg Roedel
2020-06-23  7:48           ` Zhangfei Gao [this message]
2020-06-23  7:48             ` Zhangfei Gao
2020-06-22 11:53       ` Joerg Roedel
2020-06-22 11:53         ` Joerg Roedel

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