From: Catalin Marinas <catalin.marinas@arm.com> To: Isaac Manjarres <isaacmanjarres@google.com> Cc: Herbert Xu <herbert@gondor.apana.org.au>, Ard Biesheuvel <ardb@kernel.org>, Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>, Arnd Bergmann <arnd@arndb.de>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Andrew Morton <akpm@linux-foundation.org>, Linus Torvalds <torvalds@linux-foundation.org>, Linux Memory Management List <linux-mm@kvack.org>, Linux ARM <linux-arm-kernel@lists.infradead.org>, Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, "David S. Miller" <davem@davemloft.net>, Saravana Kannan <saravanak@google.com>, kernel-team@android.com Subject: Re: [PATCH 07/10] crypto: Use ARCH_DMA_MINALIGN instead of ARCH_KMALLOC_MINALIGN Date: Thu, 13 Oct 2022 17:57:26 +0100 [thread overview] Message-ID: <Y0hDdmD0yJ+PS2Kz@arm.com> (raw) In-Reply-To: <Y0b9SYI7v94ig5v8@google.com> On Wed, Oct 12, 2022 at 10:45:45AM -0700, Isaac Manjarres wrote: > On Fri, Sep 30, 2022 at 07:32:50PM +0100, Catalin Marinas wrote: > > I started refreshing the series but I got stuck on having to do bouncing > > for small buffers even if when they go through the iommu (and I don't > > have the set up to test it yet). > > For devices that go through the IOMMU, are you planning on adding > similar logic as you did in the direct-DMA path to bounce the buffer > prior to calling into whatever DMA ops are registered for the device? Yes. > Also, there are devices with ARM64 CPUs that disable SWIOTLB usage because > none of the peripherals that they engage in DMA with need bounce buffering, > and also to reclaim the default 64 MB of memory that SWIOTLB uses. With > this approach, SWIOTLB usage will become mandatory if those devices need > to perform non-coherent DMA transactions that may not necessarily be DMA > aligned (e.g. small buffers), correct? Correct. I've been thinking about this and a way around is to combine the original series (dynamic kmalloc_minalign) with the new one so that the arch code can lower the minimum alignment either to 8 if swiotlb is available (usually in server space with more RAM) or the cache line size if there is no bounce buffer. > If so, would there be concerns that the memory savings we get back from > reducing the memory footprint of kmalloc might be defeated by how much > memory is needed for bounce buffering? It's not necessarily about the saved memory but also locality of the small buffer allocations, less cache and TLB pressure. > I understand that we can use the > "swiotlb=num_slabs" command line parameter to minimize the amount of > memory allocated for bounce buffering. If this is the only way to > minimize this impact, how much memory would you recommend to allocate > for bounce buffering on a system that will only use bounce buffers for > non-DMA-aligned buffers? It's hard to tell, it would need to be guessed by trial and error on specific hardware if you want to lower it. Another issue is that IIRC the swiotlb is allocated in 2K slots, so you may need a lot more bounce buffers than the actual memory allocated. I wonder whether swiotlb is actually the best option for bouncing unaligned buffers. We could use something like mempool_alloc() instead if we stick to small buffers rather than any (even large) buffer that's not aligned to a cache line. Or just go for kmem_cache_alloc() directly. A downside is that we may need GFP_ATOMIC for such allocations, so higher risk of failure. -- Catalin
WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com> To: Isaac Manjarres <isaacmanjarres@google.com> Cc: Herbert Xu <herbert@gondor.apana.org.au>, Ard Biesheuvel <ardb@kernel.org>, Will Deacon <will@kernel.org>, Marc Zyngier <maz@kernel.org>, Arnd Bergmann <arnd@arndb.de>, Greg Kroah-Hartman <gregkh@linuxfoundation.org>, Andrew Morton <akpm@linux-foundation.org>, Linus Torvalds <torvalds@linux-foundation.org>, Linux Memory Management List <linux-mm@kvack.org>, Linux ARM <linux-arm-kernel@lists.infradead.org>, Linux Kernel Mailing List <linux-kernel@vger.kernel.org>, "David S. Miller" <davem@davemloft.net>, Saravana Kannan <saravanak@google.com>, kernel-team@android.com Subject: Re: [PATCH 07/10] crypto: Use ARCH_DMA_MINALIGN instead of ARCH_KMALLOC_MINALIGN Date: Thu, 13 Oct 2022 17:57:26 +0100 [thread overview] Message-ID: <Y0hDdmD0yJ+PS2Kz@arm.com> (raw) In-Reply-To: <Y0b9SYI7v94ig5v8@google.com> On Wed, Oct 12, 2022 at 10:45:45AM -0700, Isaac Manjarres wrote: > On Fri, Sep 30, 2022 at 07:32:50PM +0100, Catalin Marinas wrote: > > I started refreshing the series but I got stuck on having to do bouncing > > for small buffers even if when they go through the iommu (and I don't > > have the set up to test it yet). > > For devices that go through the IOMMU, are you planning on adding > similar logic as you did in the direct-DMA path to bounce the buffer > prior to calling into whatever DMA ops are registered for the device? Yes. > Also, there are devices with ARM64 CPUs that disable SWIOTLB usage because > none of the peripherals that they engage in DMA with need bounce buffering, > and also to reclaim the default 64 MB of memory that SWIOTLB uses. With > this approach, SWIOTLB usage will become mandatory if those devices need > to perform non-coherent DMA transactions that may not necessarily be DMA > aligned (e.g. small buffers), correct? Correct. I've been thinking about this and a way around is to combine the original series (dynamic kmalloc_minalign) with the new one so that the arch code can lower the minimum alignment either to 8 if swiotlb is available (usually in server space with more RAM) or the cache line size if there is no bounce buffer. > If so, would there be concerns that the memory savings we get back from > reducing the memory footprint of kmalloc might be defeated by how much > memory is needed for bounce buffering? It's not necessarily about the saved memory but also locality of the small buffer allocations, less cache and TLB pressure. > I understand that we can use the > "swiotlb=num_slabs" command line parameter to minimize the amount of > memory allocated for bounce buffering. If this is the only way to > minimize this impact, how much memory would you recommend to allocate > for bounce buffering on a system that will only use bounce buffers for > non-DMA-aligned buffers? It's hard to tell, it would need to be guessed by trial and error on specific hardware if you want to lower it. Another issue is that IIRC the swiotlb is allocated in 2K slots, so you may need a lot more bounce buffers than the actual memory allocated. I wonder whether swiotlb is actually the best option for bouncing unaligned buffers. We could use something like mempool_alloc() instead if we stick to small buffers rather than any (even large) buffer that's not aligned to a cache line. Or just go for kmem_cache_alloc() directly. A downside is that we may need GFP_ATOMIC for such allocations, so higher risk of failure. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2022-10-13 16:57 UTC|newest] Thread overview: 287+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-04-05 13:57 [PATCH 00/10] mm, arm64: Reduce ARCH_KMALLOC_MINALIGN below the cache line size Catalin Marinas 2022-04-05 13:57 ` Catalin Marinas 2022-04-05 13:57 ` [PATCH 01/10] mm/slab: Decouple ARCH_KMALLOC_MINALIGN from ARCH_DMA_MINALIGN Catalin Marinas 2022-04-05 13:57 ` Catalin Marinas 2022-04-05 23:59 ` Hyeonggon Yoo 2022-04-05 23:59 ` Hyeonggon Yoo 2022-04-06 7:29 ` Arnd Bergmann 2022-04-06 7:29 ` Arnd Bergmann 2022-04-06 12:09 ` Hyeonggon Yoo 2022-04-06 12:09 ` Hyeonggon Yoo 2022-04-06 8:53 ` Catalin Marinas 2022-04-06 8:53 ` Catalin Marinas 2022-04-06 2:01 ` kernel test robot 2022-04-06 8:56 ` Catalin Marinas 2022-04-06 8:56 ` Catalin Marinas 2022-04-06 12:18 ` [kbuild-all] " Chen, Rong A 2022-04-08 6:42 ` Hyeonggon Yoo 2022-04-08 6:42 ` Hyeonggon Yoo 2022-04-08 9:06 ` Hyeonggon Yoo 2022-04-08 9:06 ` Hyeonggon Yoo 2022-04-08 9:11 ` Catalin Marinas 2022-04-08 9:11 ` Catalin Marinas 2022-04-11 10:37 ` Hyeonggon Yoo 2022-04-11 10:37 ` Hyeonggon Yoo 2022-04-11 14:02 ` Catalin Marinas 2022-04-11 14:02 ` Catalin Marinas 2022-04-05 13:57 ` [PATCH 02/10] drivers/base: Use ARCH_DMA_MINALIGN instead of ARCH_KMALLOC_MINALIGN Catalin Marinas 2022-04-05 13:57 ` Catalin Marinas 2022-04-11 14:57 ` Andy Shevchenko 2022-04-11 14:57 ` Andy Shevchenko 2022-04-11 17:39 ` Catalin Marinas 2022-04-11 17:39 ` Catalin Marinas 2022-04-05 13:57 ` [PATCH 03/10] drivers/gpu: " Catalin Marinas 2022-04-05 13:57 ` Catalin Marinas 2022-04-05 13:57 ` [PATCH 04/10] drivers/md: " Catalin Marinas 2022-04-05 13:57 ` Catalin Marinas 2022-04-05 13:57 ` [PATCH 05/10] drivers/spi: " Catalin Marinas 2022-04-05 13:57 ` Catalin Marinas 2022-04-05 14:05 ` Mark Brown 2022-04-05 14:05 ` Mark Brown 2022-04-05 13:57 ` [PATCH 06/10] drivers/usb: " Catalin Marinas 2022-04-05 13:57 ` Catalin Marinas 2022-04-05 13:57 ` [PATCH 07/10] crypto: " Catalin Marinas 2022-04-05 13:57 ` Catalin Marinas 2022-04-05 22:57 ` Herbert Xu 2022-04-05 22:57 ` Herbert Xu 2022-04-06 6:53 ` Ard Biesheuvel 2022-04-06 6:53 ` Ard Biesheuvel 2022-04-06 8:49 ` Catalin Marinas 2022-04-06 8:49 ` Catalin Marinas 2022-04-06 9:41 ` Ard Biesheuvel 2022-04-06 9:41 ` Ard Biesheuvel 2022-04-07 4:30 ` Herbert Xu 2022-04-07 4:30 ` Herbert Xu 2022-04-07 11:01 ` Catalin Marinas 2022-04-07 11:01 ` Catalin Marinas 2022-04-07 11:40 ` Herbert Xu 2022-04-07 11:40 ` Herbert Xu 2022-04-07 16:28 ` Catalin Marinas 2022-04-07 16:28 ` Catalin Marinas 2022-04-08 3:25 ` Herbert Xu 2022-04-08 3:25 ` Herbert Xu 2022-04-08 9:04 ` Catalin Marinas 2022-04-08 9:04 ` Catalin Marinas 2022-04-08 9:11 ` Herbert Xu 2022-04-08 9:11 ` Herbert Xu 2022-04-12 9:32 ` Catalin Marinas 2022-04-12 9:32 ` Catalin Marinas 2022-04-12 9:40 ` Herbert Xu 2022-04-12 9:40 ` Herbert Xu 2022-04-12 10:02 ` Catalin Marinas 2022-04-12 10:02 ` Catalin Marinas 2022-04-12 10:18 ` Herbert Xu 2022-04-12 10:18 ` Herbert Xu 2022-04-12 12:31 ` Catalin Marinas 2022-04-12 12:31 ` Catalin Marinas 2022-04-12 22:01 ` Ard Biesheuvel 2022-04-12 22:01 ` Ard Biesheuvel 2022-04-13 8:47 ` Catalin Marinas 2022-04-13 8:47 ` Catalin Marinas 2022-04-13 19:53 ` Linus Torvalds 2022-04-13 19:53 ` Linus Torvalds 2022-04-14 5:38 ` Greg Kroah-Hartman 2022-04-14 5:38 ` Greg Kroah-Hartman 2022-04-14 13:52 ` Ard Biesheuvel 2022-04-14 13:52 ` Ard Biesheuvel 2022-04-14 14:27 ` Greg Kroah-Hartman 2022-04-14 14:27 ` Greg Kroah-Hartman 2022-04-14 14:36 ` Ard Biesheuvel 2022-04-14 14:36 ` Ard Biesheuvel 2022-04-14 14:52 ` Greg Kroah-Hartman 2022-04-14 14:52 ` Greg Kroah-Hartman 2022-04-14 15:01 ` Ard Biesheuvel 2022-04-14 15:01 ` Ard Biesheuvel 2022-04-14 15:10 ` Ard Biesheuvel 2022-04-14 15:10 ` Ard Biesheuvel 2022-04-14 19:49 ` Catalin Marinas 2022-04-14 19:49 ` Catalin Marinas 2022-04-14 22:25 ` Linus Torvalds 2022-04-14 22:25 ` Linus Torvalds 2022-04-15 6:03 ` Ard Biesheuvel 2022-04-15 6:03 ` Ard Biesheuvel 2022-04-15 11:09 ` Arnd Bergmann 2022-04-15 11:09 ` Arnd Bergmann 2022-04-16 9:42 ` Catalin Marinas 2022-04-16 9:42 ` Catalin Marinas 2022-04-20 19:07 ` Catalin Marinas 2022-04-20 19:07 ` Catalin Marinas 2022-04-20 19:33 ` Linus Torvalds 2022-04-20 19:33 ` Linus Torvalds 2022-04-14 14:30 ` Ard Biesheuvel 2022-04-14 14:30 ` Ard Biesheuvel 2022-04-15 6:51 ` Herbert Xu 2022-04-15 6:51 ` Herbert Xu 2022-04-15 7:49 ` Ard Biesheuvel 2022-04-15 7:49 ` Ard Biesheuvel 2022-04-15 7:51 ` Herbert Xu 2022-04-15 7:51 ` Herbert Xu 2022-04-15 8:05 ` Ard Biesheuvel 2022-04-15 8:05 ` Ard Biesheuvel 2022-04-15 8:12 ` Herbert Xu 2022-04-15 8:12 ` Herbert Xu 2022-04-15 9:51 ` Ard Biesheuvel 2022-04-15 9:51 ` Ard Biesheuvel 2022-04-15 10:04 ` Ard Biesheuvel 2022-04-15 10:04 ` Ard Biesheuvel 2022-04-15 10:12 ` Herbert Xu 2022-04-15 10:12 ` Herbert Xu 2022-04-15 10:22 ` Ard Biesheuvel 2022-04-15 10:22 ` Ard Biesheuvel 2022-04-15 10:45 ` Herbert Xu 2022-04-15 10:45 ` Herbert Xu 2022-04-15 11:38 ` Ard Biesheuvel 2022-04-15 11:38 ` Ard Biesheuvel 2022-04-17 8:08 ` Herbert Xu 2022-04-17 8:08 ` Herbert Xu 2022-04-17 8:31 ` Catalin Marinas 2022-04-17 8:31 ` Catalin Marinas 2022-04-17 8:35 ` Herbert Xu 2022-04-17 8:35 ` Herbert Xu 2022-04-17 8:50 ` Catalin Marinas 2022-04-17 8:50 ` Catalin Marinas 2022-04-17 8:58 ` Herbert Xu 2022-04-17 8:58 ` Herbert Xu 2022-04-17 16:30 ` Catalin Marinas 2022-04-17 16:30 ` Catalin Marinas 2022-04-18 8:37 ` Herbert Xu 2022-04-18 8:37 ` Herbert Xu 2022-04-18 9:19 ` Catalin Marinas 2022-04-18 9:19 ` Catalin Marinas 2022-04-18 16:44 ` Catalin Marinas 2022-04-18 16:44 ` Catalin Marinas 2022-04-19 21:50 ` Ard Biesheuvel 2022-04-19 21:50 ` Ard Biesheuvel 2022-04-20 10:36 ` Catalin Marinas 2022-04-20 10:36 ` Catalin Marinas 2022-04-20 11:29 ` Arnd Bergmann 2022-04-20 11:29 ` Arnd Bergmann 2022-04-21 7:20 ` Christoph Hellwig 2022-04-21 7:20 ` Christoph Hellwig 2022-04-21 7:36 ` Arnd Bergmann 2022-04-21 7:36 ` Arnd Bergmann 2022-04-21 7:44 ` Christoph Hellwig 2022-04-21 7:44 ` Christoph Hellwig 2022-04-21 8:05 ` Ard Biesheuvel 2022-04-21 8:05 ` Ard Biesheuvel 2022-04-21 11:06 ` Catalin Marinas 2022-04-21 11:06 ` Catalin Marinas 2022-04-21 12:28 ` Arnd Bergmann 2022-04-21 12:28 ` Arnd Bergmann 2022-04-21 13:25 ` Catalin Marinas 2022-04-21 13:25 ` Catalin Marinas 2022-04-21 13:47 ` Arnd Bergmann 2022-04-21 13:47 ` Arnd Bergmann 2022-04-21 14:44 ` Catalin Marinas 2022-04-21 14:44 ` Catalin Marinas 2022-04-21 14:47 ` Arnd Bergmann 2022-04-21 14:47 ` Arnd Bergmann 2022-05-10 11:03 ` [RFC PATCH 0/7] crypto: Add helpers for allocating with DMA alignment Herbert Xu 2022-05-10 11:03 ` Herbert Xu 2022-05-10 11:07 ` [RFC PATCH 1/7] crypto: Prepare to move crypto_tfm_ctx Herbert Xu 2022-05-10 11:07 ` Herbert Xu 2022-05-10 11:07 ` [RFC PATCH 2/7] crypto: api - Add crypto_tfm_ctx_dma Herbert Xu 2022-05-10 11:07 ` Herbert Xu 2022-05-10 17:10 ` Catalin Marinas 2022-05-10 17:10 ` Catalin Marinas 2022-05-12 3:57 ` Herbert Xu 2022-05-12 3:57 ` Herbert Xu 2022-05-10 11:07 ` [RFC PATCH 3/7] crypto: aead - Add ctx helpers with DMA alignment Herbert Xu 2022-05-10 11:07 ` Herbert Xu 2022-05-10 11:07 ` [RFC PATCH 4/7] crypto: hash " Herbert Xu 2022-05-10 11:07 ` Herbert Xu 2022-05-10 11:07 ` [RFC PATCH 5/7] crypto: skcipher " Herbert Xu 2022-05-10 11:07 ` Herbert Xu 2022-05-10 11:07 ` [RFC PATCH 6/7] crypto: api - Increase MAX_ALGAPI_ALIGNMASK to 127 Herbert Xu 2022-05-10 11:07 ` Herbert Xu 2022-05-10 11:07 ` [RFC PATCH 7/7] crypto: caam - Explicitly request DMA alignment Herbert Xu 2022-05-10 11:07 ` Herbert Xu 2022-04-15 12:18 ` [PATCH 07/10] crypto: Use ARCH_DMA_MINALIGN instead of ARCH_KMALLOC_MINALIGN Catalin Marinas 2022-04-15 12:18 ` Catalin Marinas 2022-04-15 12:25 ` Ard Biesheuvel 2022-04-15 12:25 ` Ard Biesheuvel 2022-04-15 9:51 ` Catalin Marinas 2022-04-15 9:51 ` Catalin Marinas 2022-04-15 12:31 ` Catalin Marinas 2022-04-15 12:31 ` Catalin Marinas 2022-04-17 8:11 ` Herbert Xu 2022-04-17 8:11 ` Herbert Xu 2022-04-17 8:38 ` Catalin Marinas 2022-04-17 8:38 ` Catalin Marinas 2022-04-17 8:43 ` Herbert Xu 2022-04-17 8:43 ` Herbert Xu 2022-04-17 16:29 ` Catalin Marinas 2022-04-17 16:29 ` Catalin Marinas 2022-07-15 22:23 ` Isaac Manjarres 2022-07-15 22:23 ` Isaac Manjarres 2022-07-16 3:25 ` Herbert Xu 2022-07-16 3:25 ` Herbert Xu 2022-07-18 17:53 ` Catalin Marinas 2022-07-18 17:53 ` Catalin Marinas 2022-09-21 0:47 ` Isaac Manjarres 2022-09-21 0:47 ` Isaac Manjarres 2022-09-30 18:32 ` Catalin Marinas 2022-09-30 18:32 ` Catalin Marinas 2022-09-30 19:35 ` Linus Torvalds 2022-09-30 19:35 ` Linus Torvalds 2022-10-01 22:29 ` Catalin Marinas 2022-10-01 22:29 ` Catalin Marinas 2022-10-02 17:00 ` Linus Torvalds 2022-10-02 17:00 ` Linus Torvalds 2022-10-02 22:08 ` Ard Biesheuvel 2022-10-02 22:08 ` Ard Biesheuvel 2022-10-02 22:24 ` Linus Torvalds 2022-10-02 22:24 ` Linus Torvalds 2022-10-03 17:39 ` Catalin Marinas 2022-10-03 17:39 ` Catalin Marinas 2022-10-12 17:45 ` Isaac Manjarres 2022-10-12 17:45 ` Isaac Manjarres 2022-10-13 16:57 ` Catalin Marinas [this message] 2022-10-13 16:57 ` Catalin Marinas 2022-10-13 18:58 ` Saravana Kannan 2022-10-13 18:58 ` Saravana Kannan 2022-10-14 16:25 ` Catalin Marinas 2022-10-14 16:25 ` Catalin Marinas 2022-10-14 20:23 ` Saravana Kannan 2022-10-14 20:23 ` Saravana Kannan 2022-10-14 20:44 ` Linus Torvalds 2022-10-14 20:44 ` Linus Torvalds 2022-10-16 21:37 ` Catalin Marinas 2022-10-16 21:37 ` Catalin Marinas 2022-04-12 10:20 ` Catalin Marinas 2022-04-12 10:20 ` Catalin Marinas 2022-04-07 6:14 ` Muchun Song 2022-04-07 6:14 ` Muchun Song 2022-04-07 9:25 ` Catalin Marinas 2022-04-07 9:25 ` Catalin Marinas 2022-04-07 10:00 ` Muchun Song 2022-04-07 10:00 ` Muchun Song 2022-04-07 11:06 ` Catalin Marinas 2022-04-07 11:06 ` Catalin Marinas 2022-04-05 13:57 ` [PATCH 08/10] mm/slab: Allow dynamic kmalloc() minimum alignment Catalin Marinas 2022-04-05 13:57 ` Catalin Marinas 2022-04-07 3:46 ` Hyeonggon Yoo 2022-04-07 3:46 ` Hyeonggon Yoo 2022-04-07 8:50 ` Catalin Marinas 2022-04-07 8:50 ` Catalin Marinas 2022-04-07 9:18 ` Hyeonggon Yoo 2022-04-07 9:18 ` Hyeonggon Yoo 2022-04-07 9:35 ` Catalin Marinas 2022-04-07 9:35 ` Catalin Marinas 2022-04-07 12:26 ` Hyeonggon Yoo 2022-04-07 12:26 ` Hyeonggon Yoo 2022-04-11 11:55 ` Hyeonggon Yoo 2022-04-11 11:55 ` Hyeonggon Yoo 2022-04-05 13:57 ` [PATCH 09/10] mm/slab: Simplify create_kmalloc_cache() args and make it static Catalin Marinas 2022-04-05 13:57 ` Catalin Marinas 2022-04-06 5:35 ` kernel test robot 2022-04-06 8:57 ` Catalin Marinas 2022-04-06 8:57 ` Catalin Marinas 2022-04-05 13:57 ` [PATCH 10/10] arm64: Enable dynamic kmalloc() minimum alignment Catalin Marinas 2022-04-05 13:57 ` Catalin Marinas 2022-04-07 14:40 ` [PATCH 00/10] mm, arm64: Reduce ARCH_KMALLOC_MINALIGN below the cache line size Vlastimil Babka 2022-04-07 14:40 ` Vlastimil Babka 2022-04-07 17:48 ` Catalin Marinas 2022-04-07 17:48 ` Catalin Marinas 2022-04-08 14:37 ` Vlastimil Babka 2022-04-08 14:37 ` Vlastimil Babka
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