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From: Abel Vesa <abel.vesa@nxp.com>
To: Martin Kepplinger <martin.kepplinger@puri.sm>
Cc: a.fatoum@pengutronix.de, adrian.hunter@intel.com,
	aisheng.dong@nxp.com, catalin.marinas@arm.com,
	cw00.choi@samsung.com, devicetree@vger.kernel.org,
	djakov@kernel.org, festevam@gmail.com, kernel@pengutronix.de,
	kyungmin.park@samsung.com, linux-arm-kernel@lists.infradead.org,
	linux-imx@nxp.com, linux-kernel@vger.kernel.org,
	linux-pm@vger.kernel.org, linux-serial@vger.kernel.org,
	myungjoo.ham@samsung.com, robh@kernel.org,
	s.hauer@pengutronix.de, shawnguo@kernel.org,
	ulf.hansson@linaro.org, will.deacon@arm.com
Subject: Re: [RFC 00/19] Add interconnect and devfreq support for i.MX8MQ
Date: Wed, 29 Sep 2021 14:44:34 +0300	[thread overview]
Message-ID: <YVRRomS8ut6NjYlV@ryzen> (raw)
In-Reply-To: <20210924102026.2679952-1-martin.kepplinger@puri.sm>

On 21-09-24 12:20:26, Martin Kepplinger wrote:
> hi Abel,
> 
> thank you for the update (this is actually v2 of this RFC right?)!
> 
> all in all this runs fine on the imx8mq (Librem 5 and devkit) I use. For all
> the pl301 nodes I'm not yet sure what I can actually test / switch frequencies.
> 

You can start by looking into each of the following:

 $ ls -1d /sys/devices/platform/soc@0/*/devfreq/*/trans_stat

and look if the transitions happen when a specific driver that is a icc user suspends.

You can also look at:

 /sys/kernel/debug/interconnect/interconnect_summary 

and:

 /sys/kernel/debug/interconnect/interconnect_graph

> But I still have one problem: lcdif/mxfb already has the interconnect dram
> DT property and I use the following call to request bandwidth:
> https://source.puri.sm/martin.kepplinger/linux-next/-/commit/d690e4c021293f938eb2253607f92f5a64f15688
> (mainlining this is on our todo list).
> 
> With your patchset, I get:
> 
> [    0.792960] genirq: Flags mismatch irq 30. 00000004 (mxsfb-drm) vs. 00000004 (mxsfb-drm)
> [    0.801143] mxsfb 30320000.lcd-controller: Failed to install IRQ handler
> [    0.808058] mxsfb: probe of 30320000.lcd-controller failed with error -16
> 
> so the main devfreq user (mxsfb) is not there :) why?
> 

OK, I admit, this patchset doesn't provide support for all the icc consumer drivers.
But that should come at a later stage. I only provided example like fec and usdhc, to show
how it all fits together.

> and when I remove the interconnect property from the lcdif DT node, mxsfb
> probes again, but of course it doesn't lower dram freq as needed.
> 
> Do I do the icc calls wrong in mxsfb despite it working without your
> patchset, or may there be something wrong on your side that breaks
> the mxsfb IRQ?
> 

Do you have the following changes into your tree?

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi               
index 00dd8e39a595..c43a84622af5 100644                                                                          
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi                                                                  
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi                                                                  
@@ -524,7 +524,7 @@ lcdif: lcd-controller@30320000 {                                                             
                                                  <&clk IMX8MQ_VIDEO_PLL1>,                                      
                                                  <&clk IMX8MQ_VIDEO_PLL1_OUT>;                                  
                                assigned-clock-rates = <0>, <0>, <0>, <594000000>;                               
-                               interconnects = <&noc IMX8MQ_ICM_LCDIF &noc IMX8MQ_ICS_DRAM>;                    
+                               interconnects = <&icc IMX8MQ_ICM_LCDIF &icc IMX8MQ_ICS_DRAM>;                    
                                interconnect-names = "dram";                                                     
                                status = "disabled";                                                             
                                                                                                                 
@@ -1117,7 +1117,7 @@ mipi_csi1: csi@30a70000 {                                                                  
                                         <&src IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET>,                            
                                         <&src IMX8MQ_RESET_MIPI_CSI1_ESC_RESET>;                                
                                fsl,mipi-phy-gpr = <&iomuxc_gpr 0x88>;                                           
-                               interconnects = <&noc IMX8MQ_ICM_CSI1 &noc IMX8MQ_ICS_DRAM>;                     
+                               interconnects = <&icc IMX8MQ_ICM_CSI1 &icc IMX8MQ_ICS_DRAM>;                     
                                interconnect-names = "dram";                                                     
                                status = "disabled";                                                             
                                                                                                                 
@@ -1169,7 +1169,7 @@ mipi_csi2: csi@30b60000 {                                                                  
                                         <&src IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET>,                            
                                         <&src IMX8MQ_RESET_MIPI_CSI2_ESC_RESET>;                                
                                fsl,mipi-phy-gpr = <&iomuxc_gpr 0xa4>;                                           
-                               interconnects = <&noc IMX8MQ_ICM_CSI2 &noc IMX8MQ_ICS_DRAM>;                     
+                               interconnects = <&icc IMX8MQ_ICM_CSI2 &icc IMX8MQ_ICS_DRAM>;                     
                                interconnect-names = "dram";                                                     
                                status = "disabled";                                                             

I forgot to update these in the current version of the patchset. Will do in the next version.

Also, would help a lot if you could give me a link to a tree you're testing with.
That way I can look exactly at what's going on.

> again thanks a lot for working on this! I'm always happy to test.
> 
>                           martin
> 
> 
> 
> ---
>  .../boot/dts/freescale/imx8mq-librem5.dtsi    | 20 -------------------
>  1 file changed, 20 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
> index 6fac6676f412..8496a90f23bf 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
> @@ -381,26 +381,6 @@ &A53_3 {
>  	cpu-supply = <&buck2_reg>;
>  };
>  
> -&ddrc {
> -	operating-points-v2 = <&ddrc_opp_table>;
> -
> -	ddrc_opp_table: ddrc-opp-table {
> -		compatible = "operating-points-v2";
> -
> -		opp-25M {
> -			opp-hz = /bits/ 64 <25000000>;
> -		};
> -
> -		opp-100M {
> -			opp-hz = /bits/ 64 <100000000>;
> -		};
> -
> -		opp-800M {
> -			opp-hz = /bits/ 64 <800000000>;
> -		};
> -	};
> -};
> -
>  &dphy {
>  	status = "okay";
>  };
> -- 
> 2.30.2
> 

WARNING: multiple messages have this Message-ID (diff)
From: Abel Vesa <abel.vesa@nxp.com>
To: Martin Kepplinger <martin.kepplinger@puri.sm>
Cc: a.fatoum@pengutronix.de, adrian.hunter@intel.com,
	aisheng.dong@nxp.com, catalin.marinas@arm.com,
	cw00.choi@samsung.com, devicetree@vger.kernel.org,
	djakov@kernel.org, festevam@gmail.com, kernel@pengutronix.de,
	kyungmin.park@samsung.com, linux-arm-kernel@lists.infradead.org,
	linux-imx@nxp.com, linux-kernel@vger.kernel.org,
	linux-pm@vger.kernel.org, linux-serial@vger.kernel.org,
	myungjoo.ham@samsung.com, robh@kernel.org,
	s.hauer@pengutronix.de, shawnguo@kernel.org,
	ulf.hansson@linaro.org, will.deacon@arm.com
Subject: Re: [RFC 00/19] Add interconnect and devfreq support for i.MX8MQ
Date: Wed, 29 Sep 2021 14:44:34 +0300	[thread overview]
Message-ID: <YVRRomS8ut6NjYlV@ryzen> (raw)
In-Reply-To: <20210924102026.2679952-1-martin.kepplinger@puri.sm>

On 21-09-24 12:20:26, Martin Kepplinger wrote:
> hi Abel,
> 
> thank you for the update (this is actually v2 of this RFC right?)!
> 
> all in all this runs fine on the imx8mq (Librem 5 and devkit) I use. For all
> the pl301 nodes I'm not yet sure what I can actually test / switch frequencies.
> 

You can start by looking into each of the following:

 $ ls -1d /sys/devices/platform/soc@0/*/devfreq/*/trans_stat

and look if the transitions happen when a specific driver that is a icc user suspends.

You can also look at:

 /sys/kernel/debug/interconnect/interconnect_summary 

and:

 /sys/kernel/debug/interconnect/interconnect_graph

> But I still have one problem: lcdif/mxfb already has the interconnect dram
> DT property and I use the following call to request bandwidth:
> https://source.puri.sm/martin.kepplinger/linux-next/-/commit/d690e4c021293f938eb2253607f92f5a64f15688
> (mainlining this is on our todo list).
> 
> With your patchset, I get:
> 
> [    0.792960] genirq: Flags mismatch irq 30. 00000004 (mxsfb-drm) vs. 00000004 (mxsfb-drm)
> [    0.801143] mxsfb 30320000.lcd-controller: Failed to install IRQ handler
> [    0.808058] mxsfb: probe of 30320000.lcd-controller failed with error -16
> 
> so the main devfreq user (mxsfb) is not there :) why?
> 

OK, I admit, this patchset doesn't provide support for all the icc consumer drivers.
But that should come at a later stage. I only provided example like fec and usdhc, to show
how it all fits together.

> and when I remove the interconnect property from the lcdif DT node, mxsfb
> probes again, but of course it doesn't lower dram freq as needed.
> 
> Do I do the icc calls wrong in mxsfb despite it working without your
> patchset, or may there be something wrong on your side that breaks
> the mxsfb IRQ?
> 

Do you have the following changes into your tree?

diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi               
index 00dd8e39a595..c43a84622af5 100644                                                                          
--- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi                                                                  
+++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi                                                                  
@@ -524,7 +524,7 @@ lcdif: lcd-controller@30320000 {                                                             
                                                  <&clk IMX8MQ_VIDEO_PLL1>,                                      
                                                  <&clk IMX8MQ_VIDEO_PLL1_OUT>;                                  
                                assigned-clock-rates = <0>, <0>, <0>, <594000000>;                               
-                               interconnects = <&noc IMX8MQ_ICM_LCDIF &noc IMX8MQ_ICS_DRAM>;                    
+                               interconnects = <&icc IMX8MQ_ICM_LCDIF &icc IMX8MQ_ICS_DRAM>;                    
                                interconnect-names = "dram";                                                     
                                status = "disabled";                                                             
                                                                                                                 
@@ -1117,7 +1117,7 @@ mipi_csi1: csi@30a70000 {                                                                  
                                         <&src IMX8MQ_RESET_MIPI_CSI1_PHY_REF_RESET>,                            
                                         <&src IMX8MQ_RESET_MIPI_CSI1_ESC_RESET>;                                
                                fsl,mipi-phy-gpr = <&iomuxc_gpr 0x88>;                                           
-                               interconnects = <&noc IMX8MQ_ICM_CSI1 &noc IMX8MQ_ICS_DRAM>;                     
+                               interconnects = <&icc IMX8MQ_ICM_CSI1 &icc IMX8MQ_ICS_DRAM>;                     
                                interconnect-names = "dram";                                                     
                                status = "disabled";                                                             
                                                                                                                 
@@ -1169,7 +1169,7 @@ mipi_csi2: csi@30b60000 {                                                                  
                                         <&src IMX8MQ_RESET_MIPI_CSI2_PHY_REF_RESET>,                            
                                         <&src IMX8MQ_RESET_MIPI_CSI2_ESC_RESET>;                                
                                fsl,mipi-phy-gpr = <&iomuxc_gpr 0xa4>;                                           
-                               interconnects = <&noc IMX8MQ_ICM_CSI2 &noc IMX8MQ_ICS_DRAM>;                     
+                               interconnects = <&icc IMX8MQ_ICM_CSI2 &icc IMX8MQ_ICS_DRAM>;                     
                                interconnect-names = "dram";                                                     
                                status = "disabled";                                                             

I forgot to update these in the current version of the patchset. Will do in the next version.

Also, would help a lot if you could give me a link to a tree you're testing with.
That way I can look exactly at what's going on.

> again thanks a lot for working on this! I'm always happy to test.
> 
>                           martin
> 
> 
> 
> ---
>  .../boot/dts/freescale/imx8mq-librem5.dtsi    | 20 -------------------
>  1 file changed, 20 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
> index 6fac6676f412..8496a90f23bf 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi
> @@ -381,26 +381,6 @@ &A53_3 {
>  	cpu-supply = <&buck2_reg>;
>  };
>  
> -&ddrc {
> -	operating-points-v2 = <&ddrc_opp_table>;
> -
> -	ddrc_opp_table: ddrc-opp-table {
> -		compatible = "operating-points-v2";
> -
> -		opp-25M {
> -			opp-hz = /bits/ 64 <25000000>;
> -		};
> -
> -		opp-100M {
> -			opp-hz = /bits/ 64 <100000000>;
> -		};
> -
> -		opp-800M {
> -			opp-hz = /bits/ 64 <800000000>;
> -		};
> -	};
> -};
> -
>  &dphy {
>  	status = "okay";
>  };
> -- 
> 2.30.2
> 

_______________________________________________
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linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2021-09-29 11:44 UTC|newest]

Thread overview: 72+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-13 17:37 [RFC 00/19] Add interconnect and devfreq support for i.MX8MQ Abel Vesa
2021-09-13 17:37 ` Abel Vesa
2021-09-13 17:37 ` [RFC 01/19] dt-bindings: interconnect: imx8mq: Add missing pl301 and SAI ids Abel Vesa
2021-09-13 17:37   ` Abel Vesa
2021-09-15  8:09   ` Georgi Djakov
2021-09-15  8:09     ` Georgi Djakov
2021-09-13 17:37 ` [RFC 02/19] devfreq: imx-bus: Switch governor to powersave Abel Vesa
2021-09-13 17:37   ` Abel Vesa
2021-09-13 17:37 ` [RFC 03/19] devfreq: imx-bus: Decouple imx-bus from icc made Abel Vesa
2021-09-13 17:37   ` Abel Vesa
2021-09-13 17:37 ` [RFC 04/19] devfreq: imx8m-ddrc: Change governor to powersave Abel Vesa
2021-09-13 17:37   ` Abel Vesa
2021-09-13 17:38 ` [RFC 05/19] devfreq: imx8m-ddrc: Use the opps acquired from EL3 Abel Vesa
2021-09-13 17:38   ` Abel Vesa
2021-09-15  3:29   ` Chanwoo Choi
2021-09-15  3:29     ` Chanwoo Choi
2021-09-15 18:12     ` Chanwoo Choi
2021-09-15 18:12       ` Chanwoo Choi
2021-09-13 17:38 ` [RFC 06/19] devfreq: imx8m-ddrc: Add late system sleep PM ops Abel Vesa
2021-09-13 17:38   ` Abel Vesa
2021-09-15  3:37   ` Chanwoo Choi
2021-09-15  3:37     ` Chanwoo Choi
2021-10-25 20:59     ` Abel Vesa
2021-10-25 20:59       ` Abel Vesa
2021-11-10 12:15   ` Martin Kepplinger
2021-11-10 12:15     ` Martin Kepplinger
2021-11-30 20:06     ` Abel Vesa
2021-11-30 20:06       ` Abel Vesa
2021-12-01  9:35       ` Martin Kepplinger
2021-12-01  9:35         ` Martin Kepplinger
2021-12-06 12:33       ` Martin Kepplinger
2021-12-06 12:33         ` Martin Kepplinger
2021-09-13 17:38 ` [RFC 07/19] interconnect: imx: Switch from imx_icc_node_adj_desc to fsl,icc-id node assignment Abel Vesa
2021-09-13 17:38   ` [RFC 07/19] interconnect: imx: Switch from imx_icc_node_adj_desc to fsl, icc-id " Abel Vesa
2021-09-13 17:38 ` [RFC 08/19] interconnect: imx8: Remove the imx_icc_node_adj_desc Abel Vesa
2021-09-13 17:38   ` Abel Vesa
2021-10-18 12:41   ` Adam Ford
2021-10-18 12:41     ` Adam Ford
2021-10-25  9:00     ` Abel Vesa
2021-10-25  9:00       ` Abel Vesa
2021-09-13 17:38 ` [RFC 09/19] interconnect: imx8mq: Add the pl301_per_m and pl301_wakeup nodes and subnodes Abel Vesa
2021-09-13 17:38   ` Abel Vesa
2021-09-13 17:38 ` [RFC 10/19] interconnect: imx8mq: Add of_match_table Abel Vesa
2021-09-13 17:38   ` Abel Vesa
2021-09-13 17:38 ` [RFC 11/19] interconnect: imx: Add imx_icc_get_bw and imx_icc_aggregate functions Abel Vesa
2021-09-13 17:38   ` Abel Vesa
2021-09-13 17:38 ` [RFC 12/19] arm64: dts: imx8mq: Add fsl,icc-id property to ddrc node Abel Vesa
2021-09-13 17:38   ` Abel Vesa
2021-09-13 17:38 ` [RFC 13/19] arm64: dts: imx8mq: Add fsl,icc-id to noc node Abel Vesa
2021-09-13 17:38   ` Abel Vesa
2021-09-13 17:38 ` [RFC 14/19] arm64: dts: imx8mq: Add all pl301 nodes Abel Vesa
2021-09-13 17:38   ` Abel Vesa
2021-09-13 17:38 ` [RFC 15/19] arm64: dts: imx8mq: Add the interconnect node Abel Vesa
2021-09-13 17:38   ` Abel Vesa
2021-09-13 17:38 ` [RFC 16/19] arm64: dts: imx8mq: Add interconnect properties to icc consumer nodes Abel Vesa
2021-09-13 17:38   ` Abel Vesa
2021-09-13 17:38 ` [RFC 17/19] net: ethernet: fec_main: Add interconnect support Abel Vesa
2021-09-13 17:38   ` Abel Vesa
2021-09-13 17:38 ` [RFC 18/19] mmc: sdhci-esdhc-imx: " Abel Vesa
2021-09-13 17:38   ` Abel Vesa
2021-09-13 17:38 ` [RFC 19/19] arm64: defconfig: Add necessary configs for icc+devfreq on i.MX8MQ Abel Vesa
2021-09-13 17:38   ` Abel Vesa
2021-09-24 10:20 ` [RFC 00/19] Add interconnect and devfreq support for i.MX8MQ Martin Kepplinger
2021-09-24 10:20   ` Martin Kepplinger
2021-09-29 11:44   ` Abel Vesa [this message]
2021-09-29 11:44     ` Abel Vesa
2021-09-30  8:03     ` Martin Kepplinger
2021-09-30  8:03       ` Martin Kepplinger
2021-09-30 14:22       ` Abel Vesa
2021-09-30 14:22         ` Abel Vesa
2021-10-05 13:34         ` Martin Kepplinger
2021-10-05 13:34           ` Martin Kepplinger

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