All of lore.kernel.org
 help / color / mirror / Atom feed
From: Andy Shevchenko <andy.shevchenko@gmail.com>
To: Emil Renner Berthing <kernel@esmil.dk>
Cc: Yury Norov <yury.norov@gmail.com>,
	linux-riscv <linux-riscv@lists.infradead.org>,
	devicetree <devicetree@vger.kernel.org>,
	linux-clk <linux-clk@vger.kernel.org>,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
	"open list:SERIAL DRIVERS" <linux-serial@vger.kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Rob Herring <robh+dt@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Linus Walleij <linus.walleij@linaro.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Jiri Slaby <jirislaby@kernel.org>,
	Maximilian Luz <luzmaximilian@gmail.com>,
	Sagar Kadam <sagar.kadam@sifive.com>,
	Drew Fustini <drew@beagleboard.org>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Michael Zhu <michael.zhu@starfivetech.com>,
	Fu Wei <tekkamanninja@gmail.com>, Anup Patel <anup.patel@wdc.com>,
	Atish Patra <atish.patra@wdc.com>,
	Matteo Croce <mcroce@microsoft.com>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 09/16] reset: starfive-jh7100: Add StarFive JH7100 reset driver
Date: Mon, 8 Nov 2021 11:17:07 +0200	[thread overview]
Message-ID: <YYjrE/+1wxgGEAKJ@smile.fi.intel.com> (raw)
In-Reply-To: <CANBLGcztx0DL=U06QPJ5XT4ra=kx2QAZxxP=0bjfgQ0skhv3Bg@mail.gmail.com>

On Thu, Nov 04, 2021 at 01:15:46PM +0100, Emil Renner Berthing wrote:
> On Tue, 2 Nov 2021 at 22:17, Emil Renner Berthing <kernel@esmil.dk> wrote:

...

> I'd really like to understand your reasoning here. As far as I can
> tell reading 2 adjacent 32bit registers with a 64bit read as you're
> proposing is exactly what would cause endian issues. Eg. on little
> endian you'd get reg0 | reg1 << 32 whereas on big-endian you'd get
> reg0 << 32 | reg1.

Nope, it won't. The endianess is a property of both CPU and device.

The I/O accessors, such as readl()/writel() and iowrtieXX()/ioreadXX()
are _always_ LE.

So, writeq() will properly put bits to their places in case device is LE.
And most devices are LE (or should be). Of course there are cases, but then
you have to specify them explicitly.

My motive here is simple as that the device is definitely a set of a few
128-bit bitmaps (in registers) and using bitmap _is_ representing hardware
in the kernel. Using something else will deviate from that (maybe not too
far, but still...).

-- 
With Best Regards,
Andy Shevchenko



WARNING: multiple messages have this Message-ID (diff)
From: Andy Shevchenko <andy.shevchenko@gmail.com>
To: Emil Renner Berthing <kernel@esmil.dk>
Cc: Yury Norov <yury.norov@gmail.com>,
	linux-riscv <linux-riscv@lists.infradead.org>,
	devicetree <devicetree@vger.kernel.org>,
	linux-clk <linux-clk@vger.kernel.org>,
	"open list:GPIO SUBSYSTEM" <linux-gpio@vger.kernel.org>,
	"open list:SERIAL DRIVERS" <linux-serial@vger.kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Rob Herring <robh+dt@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Linus Walleij <linus.walleij@linaro.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Jiri Slaby <jirislaby@kernel.org>,
	Maximilian Luz <luzmaximilian@gmail.com>,
	Sagar Kadam <sagar.kadam@sifive.com>,
	Drew Fustini <drew@beagleboard.org>,
	Geert Uytterhoeven <geert@linux-m68k.org>,
	Michael Zhu <michael.zhu@starfivetech.com>,
	Fu Wei <tekkamanninja@gmail.com>, Anup Patel <anup.patel@wdc.com>,
	Atish Patra <atish.patra@wdc.com>,
	Matteo Croce <mcroce@microsoft.com>,
	Linux Kernel Mailing List <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v3 09/16] reset: starfive-jh7100: Add StarFive JH7100 reset driver
Date: Mon, 8 Nov 2021 11:17:07 +0200	[thread overview]
Message-ID: <YYjrE/+1wxgGEAKJ@smile.fi.intel.com> (raw)
In-Reply-To: <CANBLGcztx0DL=U06QPJ5XT4ra=kx2QAZxxP=0bjfgQ0skhv3Bg@mail.gmail.com>

On Thu, Nov 04, 2021 at 01:15:46PM +0100, Emil Renner Berthing wrote:
> On Tue, 2 Nov 2021 at 22:17, Emil Renner Berthing <kernel@esmil.dk> wrote:

...

> I'd really like to understand your reasoning here. As far as I can
> tell reading 2 adjacent 32bit registers with a 64bit read as you're
> proposing is exactly what would cause endian issues. Eg. on little
> endian you'd get reg0 | reg1 << 32 whereas on big-endian you'd get
> reg0 << 32 | reg1.

Nope, it won't. The endianess is a property of both CPU and device.

The I/O accessors, such as readl()/writel() and iowrtieXX()/ioreadXX()
are _always_ LE.

So, writeq() will properly put bits to their places in case device is LE.
And most devices are LE (or should be). Of course there are cases, but then
you have to specify them explicitly.

My motive here is simple as that the device is definitely a set of a few
128-bit bitmaps (in registers) and using bitmap _is_ representing hardware
in the kernel. Using something else will deviate from that (maybe not too
far, but still...).

-- 
With Best Regards,
Andy Shevchenko



_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2021-11-08  9:17 UTC|newest]

Thread overview: 112+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-11-02 16:11 [PATCH v3 00/16] Basic StarFive JH7100 RISC-V SoC support Emil Renner Berthing
2021-11-02 16:11 ` Emil Renner Berthing
2021-11-02 16:11 ` [PATCH v3 01/16] RISC-V: Add StarFive SoC Kconfig option Emil Renner Berthing
2021-11-02 16:11   ` Emil Renner Berthing
2021-11-08  9:24   ` Geert Uytterhoeven
2021-11-08  9:24     ` Geert Uytterhoeven
2021-11-02 16:11 ` [PATCH v3 02/16] dt-bindings: timer: Add StarFive JH7100 clint Emil Renner Berthing
2021-11-02 16:11   ` Emil Renner Berthing
2021-11-02 16:11 ` [PATCH v3 03/16] dt-bindings: interrupt-controller: Add StarFive JH7100 plic Emil Renner Berthing
2021-11-02 16:11   ` Emil Renner Berthing
2021-11-02 16:11 ` [PATCH v3 04/16] dt-bindings: clock: starfive: Add JH7100 clock definitions Emil Renner Berthing
2021-11-02 16:11   ` Emil Renner Berthing
2021-11-02 16:11 ` [PATCH v3 05/16] dt-bindings: clock: starfive: Add JH7100 bindings Emil Renner Berthing
2021-11-02 16:11   ` Emil Renner Berthing
2021-11-02 16:11 ` [PATCH v3 06/16] clk: starfive: Add JH7100 clock generator driver Emil Renner Berthing
2021-11-02 16:11   ` Emil Renner Berthing
2021-11-02 19:43   ` Andy Shevchenko
2021-11-02 19:43     ` Andy Shevchenko
2021-11-02 16:11 ` [PATCH v3 07/16] dt-bindings: reset: Add StarFive JH7100 reset definitions Emil Renner Berthing
2021-11-02 16:11   ` Emil Renner Berthing
2021-11-02 16:11 ` [PATCH v3 08/16] dt-bindings: reset: Add Starfive JH7100 reset bindings Emil Renner Berthing
2021-11-02 16:11   ` Emil Renner Berthing
2021-11-08  9:25   ` Geert Uytterhoeven
2021-11-08  9:25     ` Geert Uytterhoeven
2021-11-12 19:39   ` Rob Herring
2021-11-12 19:39     ` Rob Herring
2021-11-02 16:11 ` [PATCH v3 09/16] reset: starfive-jh7100: Add StarFive JH7100 reset driver Emil Renner Berthing
2021-11-02 16:11   ` Emil Renner Berthing
2021-11-02 19:42   ` Andy Shevchenko
2021-11-02 19:42     ` Andy Shevchenko
2021-11-02 19:58     ` Emil Renner Berthing
2021-11-02 19:58       ` Emil Renner Berthing
2021-11-02 20:13       ` Andy Shevchenko
2021-11-02 20:13         ` Andy Shevchenko
2021-11-02 21:17         ` Emil Renner Berthing
2021-11-02 21:17           ` Emil Renner Berthing
2021-11-04 12:15           ` Emil Renner Berthing
2021-11-04 12:15             ` Emil Renner Berthing
2021-11-08  9:17             ` Andy Shevchenko [this message]
2021-11-08  9:17               ` Andy Shevchenko
2021-11-09  9:28               ` Emil Renner Berthing
2021-11-09  9:28                 ` Emil Renner Berthing
2021-11-02 20:55       ` Yury Norov
2021-11-02 20:55         ` Yury Norov
2021-11-10 16:34         ` Yury Norov
2021-11-10 16:34           ` Yury Norov
2021-11-02 16:11 ` [PATCH v3 10/16] dt-bindings: pinctrl: Add StarFive pinctrl definitions Emil Renner Berthing
2021-11-02 16:11   ` Emil Renner Berthing
2021-11-12 19:40   ` Rob Herring
2021-11-12 19:40     ` Rob Herring
2021-11-02 16:11 ` [PATCH v3 11/16] dt-bindings: pinctrl: Add StarFive JH7100 bindings Emil Renner Berthing
2021-11-02 16:11   ` Emil Renner Berthing
2021-11-03  1:20   ` Rob Herring
2021-11-03  1:20     ` Rob Herring
2021-11-03 13:30     ` Emil Renner Berthing
2021-11-03 13:30       ` Emil Renner Berthing
2021-11-09  0:45   ` Linus Walleij
2021-11-09  0:45     ` Linus Walleij
2021-11-11 23:04     ` Emil Renner Berthing
2021-11-11 23:04       ` Emil Renner Berthing
2021-11-21 23:19       ` Linus Walleij
2021-11-21 23:19         ` Linus Walleij
2021-11-22 14:02         ` Emil Renner Berthing
2021-11-22 14:02           ` Emil Renner Berthing
2021-11-12 19:41   ` Rob Herring
2021-11-12 19:41     ` Rob Herring
2021-11-02 16:11 ` [PATCH v3 12/16] pinctrl: starfive: Add pinctrl driver for StarFive SoCs Emil Renner Berthing
2021-11-02 16:11   ` Emil Renner Berthing
2021-11-02 20:02   ` Andy Shevchenko
2021-11-02 20:02     ` Andy Shevchenko
2021-11-02 20:07     ` Andy Shevchenko
2021-11-02 20:07       ` Andy Shevchenko
2021-11-09  1:01       ` Linus Walleij
2021-11-09  1:01         ` Linus Walleij
2021-11-09  9:21         ` Emil Renner Berthing
2021-11-09  9:21           ` Emil Renner Berthing
2021-11-09  9:33           ` Andy Shevchenko
2021-11-09  9:33             ` Andy Shevchenko
2021-11-09  9:40             ` Emil Renner Berthing
2021-11-09  9:40               ` Emil Renner Berthing
2021-11-09 20:29               ` Linus Walleij
2021-11-09 20:29                 ` Linus Walleij
2021-11-09 21:04                 ` Emil Renner Berthing
2021-11-09 21:04                   ` Emil Renner Berthing
2021-11-10  8:04                   ` Andy Shevchenko
2021-11-10  8:04                     ` Andy Shevchenko
2021-11-10 11:15                     ` Emil Renner Berthing
2021-11-10 11:15                       ` Emil Renner Berthing
2021-11-02 20:35     ` Emil Renner Berthing
2021-11-02 20:35       ` Emil Renner Berthing
2021-11-03  9:12       ` Andy Shevchenko
2021-11-03  9:12         ` Andy Shevchenko
2021-11-03 12:35         ` Emil Renner Berthing
2021-11-03 12:35           ` Emil Renner Berthing
2021-11-03 14:13           ` Andy Shevchenko
2021-11-03 14:13             ` Andy Shevchenko
2021-11-09  0:54     ` Linus Walleij
2021-11-09  0:54       ` Linus Walleij
2021-11-09  8:58       ` Andy Shevchenko
2021-11-09  8:58         ` Andy Shevchenko
2021-11-02 16:11 ` [PATCH v3 13/16] dt-bindings: serial: snps-dw-apb-uart: Add JH7100 uarts Emil Renner Berthing
2021-11-02 16:11   ` Emil Renner Berthing
2021-11-02 16:11 ` [PATCH v3 14/16] serial: 8250_dw: Add StarFive JH7100 quirk Emil Renner Berthing
2021-11-02 16:11   ` Emil Renner Berthing
2021-11-02 20:14   ` Andy Shevchenko
2021-11-02 20:14     ` Andy Shevchenko
2021-11-08  9:32   ` Geert Uytterhoeven
2021-11-08  9:32     ` Geert Uytterhoeven
2021-11-02 16:11 ` [PATCH v3 15/16] RISC-V: Add initial StarFive JH7100 device tree Emil Renner Berthing
2021-11-02 16:11   ` Emil Renner Berthing
2021-11-02 16:11 ` [PATCH v3 16/16] RISC-V: Add BeagleV Starlight Beta " Emil Renner Berthing
2021-11-02 16:11   ` Emil Renner Berthing

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=YYjrE/+1wxgGEAKJ@smile.fi.intel.com \
    --to=andy.shevchenko@gmail.com \
    --cc=anup.patel@wdc.com \
    --cc=atish.patra@wdc.com \
    --cc=daniel.lezcano@linaro.org \
    --cc=devicetree@vger.kernel.org \
    --cc=drew@beagleboard.org \
    --cc=geert@linux-m68k.org \
    --cc=gregkh@linuxfoundation.org \
    --cc=jirislaby@kernel.org \
    --cc=kernel@esmil.dk \
    --cc=linus.walleij@linaro.org \
    --cc=linux-clk@vger.kernel.org \
    --cc=linux-gpio@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-riscv@lists.infradead.org \
    --cc=linux-serial@vger.kernel.org \
    --cc=luzmaximilian@gmail.com \
    --cc=maz@kernel.org \
    --cc=mcroce@microsoft.com \
    --cc=michael.zhu@starfivetech.com \
    --cc=mturquette@baylibre.com \
    --cc=p.zabel@pengutronix.de \
    --cc=palmer@dabbelt.com \
    --cc=paul.walmsley@sifive.com \
    --cc=robh+dt@kernel.org \
    --cc=sagar.kadam@sifive.com \
    --cc=sboyd@kernel.org \
    --cc=tekkamanninja@gmail.com \
    --cc=tglx@linutronix.de \
    --cc=yury.norov@gmail.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.