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From: Catalin Marinas <catalin.marinas@arm.com>
To: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	Will Deacon <will@kernel.org>,
	Suzuki Poulose <suzuki.poulose@arm.com>,
	coresight@lists.linaro.org, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH V3 RESEND 0/7] coresight: trbe: Workaround Cortex-A510 erratas
Date: Fri, 28 Jan 2022 11:22:39 +0000	[thread overview]
Message-ID: <YfPR/93To8n7S9Sa@arm.com> (raw)
In-Reply-To: <YfPKvsw+fOsJvSm7@arm.com>

On Fri, Jan 28, 2022 at 10:51:42AM +0000, Catalin Marinas wrote:
> On Thu, Jan 27, 2022 at 01:22:20PM -0700, Mathieu Poirier wrote:
> > On Tue, Jan 25, 2022 at 07:50:30PM +0530, Anshuman Khandual wrote:
> > > Anshuman Khandual (7):
> > >   arm64: Add Cortex-A510 CPU part definition
> > >   arm64: errata: Add detection for TRBE ignored system register writes
> > >   arm64: errata: Add detection for TRBE invalid prohibited states
> > >   arm64: errata: Add detection for TRBE trace data corruption
> > >   coresight: trbe: Work around the ignored system register writes
> > >   coresight: trbe: Work around the invalid prohibited states
> > >   coresight: trbe: Work around the trace data corruption
> > > 
> > >  Documentation/arm64/silicon-errata.rst       |   6 +
> > >  arch/arm64/Kconfig                           |  59 ++++++++++
> > >  arch/arm64/include/asm/cputype.h             |   2 +
> > >  arch/arm64/kernel/cpu_errata.c               |  27 +++++
> > >  arch/arm64/tools/cpucaps                     |   3 +
> > >  drivers/hwtracing/coresight/coresight-trbe.c | 114 ++++++++++++++-----
> > >  drivers/hwtracing/coresight/coresight-trbe.h |   8 --
> > >  7 files changed, 183 insertions(+), 36 deletions(-)
> > 
> > I have applied this set and sent a pull request to Catalin for the arm64
> > portion.
> 
> Well, I'm happy for the whole series to go in via Greg's tree or however
> the coresight patches go in (that's why I acked them). The last three
> patches depend on the first four, so you might as well send them all
> together. I'd split the series only if there's a conflict with the arm64
> tree (I haven't checked).

I now checked and there's a minor conflict. I can send the arm64 part
from your pull request to Linus tonight and you can send the others via
the usual coresight path.

Thanks.

-- 
Catalin

WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com>
To: Mathieu Poirier <mathieu.poirier@linaro.org>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>,
	linux-arm-kernel@lists.infradead.org,
	Will Deacon <will@kernel.org>,
	Suzuki Poulose <suzuki.poulose@arm.com>,
	coresight@lists.linaro.org, linux-doc@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH V3 RESEND 0/7] coresight: trbe: Workaround Cortex-A510 erratas
Date: Fri, 28 Jan 2022 11:22:39 +0000	[thread overview]
Message-ID: <YfPR/93To8n7S9Sa@arm.com> (raw)
In-Reply-To: <YfPKvsw+fOsJvSm7@arm.com>

On Fri, Jan 28, 2022 at 10:51:42AM +0000, Catalin Marinas wrote:
> On Thu, Jan 27, 2022 at 01:22:20PM -0700, Mathieu Poirier wrote:
> > On Tue, Jan 25, 2022 at 07:50:30PM +0530, Anshuman Khandual wrote:
> > > Anshuman Khandual (7):
> > >   arm64: Add Cortex-A510 CPU part definition
> > >   arm64: errata: Add detection for TRBE ignored system register writes
> > >   arm64: errata: Add detection for TRBE invalid prohibited states
> > >   arm64: errata: Add detection for TRBE trace data corruption
> > >   coresight: trbe: Work around the ignored system register writes
> > >   coresight: trbe: Work around the invalid prohibited states
> > >   coresight: trbe: Work around the trace data corruption
> > > 
> > >  Documentation/arm64/silicon-errata.rst       |   6 +
> > >  arch/arm64/Kconfig                           |  59 ++++++++++
> > >  arch/arm64/include/asm/cputype.h             |   2 +
> > >  arch/arm64/kernel/cpu_errata.c               |  27 +++++
> > >  arch/arm64/tools/cpucaps                     |   3 +
> > >  drivers/hwtracing/coresight/coresight-trbe.c | 114 ++++++++++++++-----
> > >  drivers/hwtracing/coresight/coresight-trbe.h |   8 --
> > >  7 files changed, 183 insertions(+), 36 deletions(-)
> > 
> > I have applied this set and sent a pull request to Catalin for the arm64
> > portion.
> 
> Well, I'm happy for the whole series to go in via Greg's tree or however
> the coresight patches go in (that's why I acked them). The last three
> patches depend on the first four, so you might as well send them all
> together. I'd split the series only if there's a conflict with the arm64
> tree (I haven't checked).

I now checked and there's a minor conflict. I can send the arm64 part
from your pull request to Linus tonight and you can send the others via
the usual coresight path.

Thanks.

-- 
Catalin

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-01-28 11:22 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-25 14:20 [PATCH V3 RESEND 0/7] coresight: trbe: Workaround Cortex-A510 erratas Anshuman Khandual
2022-01-25 14:20 ` Anshuman Khandual
2022-01-25 14:20 ` [PATCH V3 RESEND 1/7] arm64: Add Cortex-A510 CPU part definition Anshuman Khandual
2022-01-25 14:20   ` Anshuman Khandual
2022-01-25 14:20 ` [PATCH V3 RESEND 2/7] arm64: errata: Add detection for TRBE ignored system register writes Anshuman Khandual
2022-01-25 14:20   ` Anshuman Khandual
2022-01-25 14:20 ` [PATCH V3 RESEND 3/7] arm64: errata: Add detection for TRBE invalid prohibited states Anshuman Khandual
2022-01-25 14:20   ` Anshuman Khandual
2022-01-25 14:20 ` [PATCH V3 RESEND 4/7] arm64: errata: Add detection for TRBE trace data corruption Anshuman Khandual
2022-01-25 14:20   ` Anshuman Khandual
2022-01-25 14:20 ` [PATCH V3 RESEND 5/7] coresight: trbe: Work around the ignored system register writes Anshuman Khandual
2022-01-25 14:20   ` Anshuman Khandual
2022-01-25 14:20 ` [PATCH V3 RESEND 6/7] coresight: trbe: Work around the invalid prohibited states Anshuman Khandual
2022-01-25 14:20   ` Anshuman Khandual
2022-01-25 14:20 ` [PATCH V3 RESEND 7/7] coresight: trbe: Work around the trace data corruption Anshuman Khandual
2022-01-25 14:20   ` Anshuman Khandual
2022-01-27 20:22 ` [PATCH V3 RESEND 0/7] coresight: trbe: Workaround Cortex-A510 erratas Mathieu Poirier
2022-01-27 20:22   ` Mathieu Poirier
2022-01-28 10:51   ` Catalin Marinas
2022-01-28 10:51     ` Catalin Marinas
2022-01-28 11:22     ` Catalin Marinas [this message]
2022-01-28 11:22       ` Catalin Marinas
2022-01-28 15:29     ` Mathieu Poirier
2022-01-28 15:29       ` Mathieu Poirier

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