From: Rob Herring <robh@kernel.org>
To: Heiko Stuebner <heiko@sntech.de>
Cc: hch@lst.de, linux-kernel@vger.kernel.org, maxime@cerno.tech,
huffman@cadence.com, liush@allwinnertech.com,
xinhaoqu@huawei.com, behrensj@mit.edu, anup@brainfault.org,
jscheid@ventanamicro.com, allen.baum@esperantotech.com,
philipp.tomsich@vrull.eu, aou@eecs.berkeley.edu, wefu@redhat.com,
arnd@arndb.de, andrea.mondelli@huawei.com,
paul.walmsley@sifive.com, linux-riscv@lists.infradead.org,
robh+dt@kernel.org, cmuellner@linux.com, drew@beagleboard.org,
rtrauben@gmail.com, samuel@sholland.org, palmer@dabbelt.com,
atishp@atishpatra.org, mick@ics.forth.gr,
devicetree@vger.kernel.org, gfavor@ventanamicro.com,
wens@csie.org, guoren@kernel.org
Subject: Re: [PATCH v6 11/14] dt-bindings: riscv: add MMU Standard Extensions support for Svpbmt
Date: Wed, 9 Feb 2022 12:47:16 -0600 [thread overview]
Message-ID: <YgQMNKXytqFZFiib@robh.at.kernel.org> (raw)
In-Reply-To: <20220209123800.269774-12-heiko@sntech.de>
On Wed, 09 Feb 2022 13:37:57 +0100, Heiko Stuebner wrote:
> From: Wei Fu <wefu@redhat.com>
>
> Previous patch has added svpbmt in arch/riscv and add "riscv,svpmbt"
> in the DT mmu node. Update dt-bindings related property here.
>
> Signed-off-by: Wei Fu <wefu@redhat.com>
> Co-developed-by: Guo Ren <guoren@kernel.org>
> Signed-off-by: Guo Ren <guoren@kernel.org>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> Cc: Anup Patel <anup@brainfault.org>
> Cc: Palmer Dabbelt <palmer@dabbelt.com>
> Cc: Rob Herring <robh+dt@kernel.org>
> ---
> Documentation/devicetree/bindings/riscv/cpus.yaml | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh@kernel.org>
To: Heiko Stuebner <heiko@sntech.de>
Cc: hch@lst.de, linux-kernel@vger.kernel.org, maxime@cerno.tech,
huffman@cadence.com, liush@allwinnertech.com,
xinhaoqu@huawei.com, behrensj@mit.edu, anup@brainfault.org,
jscheid@ventanamicro.com, allen.baum@esperantotech.com,
philipp.tomsich@vrull.eu, aou@eecs.berkeley.edu, wefu@redhat.com,
arnd@arndb.de, andrea.mondelli@huawei.com,
paul.walmsley@sifive.com, linux-riscv@lists.infradead.org,
robh+dt@kernel.org, cmuellner@linux.com, drew@beagleboard.org,
rtrauben@gmail.com, samuel@sholland.org, palmer@dabbelt.com,
atishp@atishpatra.org, mick@ics.forth.gr,
devicetree@vger.kernel.org, gfavor@ventanamicro.com,
wens@csie.org, guoren@kernel.org
Subject: Re: [PATCH v6 11/14] dt-bindings: riscv: add MMU Standard Extensions support for Svpbmt
Date: Wed, 9 Feb 2022 12:47:16 -0600 [thread overview]
Message-ID: <YgQMNKXytqFZFiib@robh.at.kernel.org> (raw)
In-Reply-To: <20220209123800.269774-12-heiko@sntech.de>
On Wed, 09 Feb 2022 13:37:57 +0100, Heiko Stuebner wrote:
> From: Wei Fu <wefu@redhat.com>
>
> Previous patch has added svpbmt in arch/riscv and add "riscv,svpmbt"
> in the DT mmu node. Update dt-bindings related property here.
>
> Signed-off-by: Wei Fu <wefu@redhat.com>
> Co-developed-by: Guo Ren <guoren@kernel.org>
> Signed-off-by: Guo Ren <guoren@kernel.org>
> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
> Cc: Anup Patel <anup@brainfault.org>
> Cc: Palmer Dabbelt <palmer@dabbelt.com>
> Cc: Rob Herring <robh+dt@kernel.org>
> ---
> Documentation/devicetree/bindings/riscv/cpus.yaml | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
Reviewed-by: Rob Herring <robh@kernel.org>
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next prev parent reply other threads:[~2022-02-09 18:52 UTC|newest]
Thread overview: 80+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-09 12:37 [PATCH v6 00/14] riscv: support for Svpbmt and D1 memory types Heiko Stuebner
2022-02-09 12:37 ` Heiko Stuebner
2022-02-09 12:37 ` [PATCH v6 01/14] riscv: prevent null-pointer dereference with sbi_remote_fence_i Heiko Stuebner
2022-02-09 12:37 ` Heiko Stuebner
2022-02-11 1:59 ` Atish Patra
2022-02-11 1:59 ` Atish Patra
2022-02-09 12:37 ` [PATCH v6 02/14] riscv: integrate alternatives better into the main architecture Heiko Stuebner
2022-02-09 12:37 ` Heiko Stuebner
2022-02-09 12:37 ` [PATCH v6 03/14] riscv: allow different stages with alternatives Heiko Stuebner
2022-02-09 12:37 ` Heiko Stuebner
2022-02-09 12:37 ` [PATCH v6 04/14] riscv: implement module alternatives Heiko Stuebner
2022-02-09 12:37 ` Heiko Stuebner
2022-02-09 12:37 ` [PATCH v6 05/14] riscv: implement ALTERNATIVE_2 macro Heiko Stuebner
2022-02-09 12:37 ` Heiko Stuebner
2022-02-09 12:37 ` [PATCH v6 06/14] riscv: extend concatenated alternatives-lines to the same length Heiko Stuebner
2022-02-09 12:37 ` Heiko Stuebner
2022-02-09 12:37 ` [PATCH v6 07/14] riscv: prevent compressed instructions in alternatives Heiko Stuebner
2022-02-09 12:37 ` Heiko Stuebner
2022-03-08 0:47 ` Palmer Dabbelt
2022-03-08 0:47 ` Palmer Dabbelt
2022-02-09 12:37 ` [PATCH v6 08/14] riscv: move boot alternatives to a slightly earlier position Heiko Stuebner
2022-02-09 12:37 ` Heiko Stuebner
2022-02-10 22:42 ` Atish Patra
2022-02-10 22:42 ` Atish Patra
2022-02-11 1:11 ` Heiko Stübner
2022-02-11 1:11 ` Heiko Stübner
2022-02-11 1:57 ` Atish Patra
2022-02-11 1:57 ` Atish Patra
2022-02-11 9:34 ` Heiko Stübner
2022-02-11 9:34 ` Heiko Stübner
2022-03-08 0:47 ` Palmer Dabbelt
2022-03-08 0:47 ` Palmer Dabbelt
2022-03-23 16:51 ` Heiko Stübner
2022-03-23 16:51 ` Heiko Stübner
2022-02-09 12:37 ` [PATCH v6 09/14] riscv: Fix accessing pfn bits in PTEs for non-32bit variants Heiko Stuebner
2022-02-09 12:37 ` Heiko Stuebner
2022-02-09 12:37 ` [PATCH v6 10/14] riscv: add cpufeature handling via alternatives Heiko Stuebner
2022-02-09 12:37 ` Heiko Stuebner
2022-02-09 12:37 ` [PATCH v6 11/14] dt-bindings: riscv: add MMU Standard Extensions support for Svpbmt Heiko Stuebner
2022-02-09 12:37 ` Heiko Stuebner
2022-02-09 18:47 ` Rob Herring [this message]
2022-02-09 18:47 ` Rob Herring
2022-02-09 12:37 ` [PATCH v6 12/14] riscv: add RISC-V Svpbmt extension support Heiko Stuebner
2022-02-09 12:37 ` Heiko Stuebner
2022-02-09 12:37 ` [PATCH v6 13/14] riscv: remove FIXMAP_PAGE_IO and fall back to its default value Heiko Stuebner
2022-02-09 12:37 ` Heiko Stuebner
2022-02-09 12:38 ` [PATCH v6 14/14] riscv: add memory-type errata for T-Head Heiko Stuebner
2022-02-09 12:38 ` Heiko Stuebner
2022-02-11 0:12 ` Atish Patra
2022-02-11 0:12 ` Atish Patra
2022-02-11 9:25 ` Heiko Stübner
2022-02-11 9:25 ` Heiko Stübner
2022-02-12 0:27 ` Atish Patra
2022-02-12 0:27 ` Atish Patra
2022-02-11 2:01 ` Atish Patra
2022-02-11 2:01 ` Atish Patra
2022-02-14 3:42 ` Samuel Holland
2022-02-14 3:42 ` Samuel Holland
2022-02-09 17:49 ` [PATCH v6 00/14] riscv: support for Svpbmt and D1 memory types Jisheng Zhang
2022-02-09 17:49 ` Jisheng Zhang
2022-02-09 23:44 ` Heiko Stübner
2022-02-09 23:44 ` Heiko Stübner
2022-02-10 16:01 ` Jisheng Zhang
2022-02-10 16:01 ` Jisheng Zhang
2022-02-11 0:25 ` Atish Patra
2022-02-11 0:25 ` Atish Patra
2022-02-11 1:48 ` Atish Patra
2022-02-11 1:48 ` Atish Patra
2022-02-11 2:04 ` Heiko Stübner
2022-02-11 2:04 ` Heiko Stübner
2022-02-12 0:25 ` Atish Patra
2022-02-12 0:25 ` Atish Patra
2022-02-14 20:02 ` Heiko Stübner
2022-02-14 20:02 ` Heiko Stübner
2022-02-14 20:25 ` Atish Patra
2022-02-14 20:25 ` Atish Patra
2022-02-14 20:37 ` Heiko Stübner
2022-02-14 20:37 ` Heiko Stübner
2022-03-09 7:56 ` Guo Ren
2022-03-09 7:56 ` Guo Ren
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