From: Jean-Philippe Brucker <jean-philippe@linaro.org> To: Lu Baolu <baolu.lu@linux.intel.com> Cc: Joerg Roedel <joro@8bytes.org>, Jason Gunthorpe <jgg@nvidia.com>, Christoph Hellwig <hch@infradead.org>, Kevin Tian <kevin.tian@intel.com>, Ashok Raj <ashok.raj@intel.com>, Will Deacon <will@kernel.org>, Robin Murphy <robin.murphy@arm.com>, Jean-Philippe Brucker <jean-philippe@linaro.com>, Dave Jiang <dave.jiang@intel.com>, Vinod Koul <vkoul@kernel.org>, Eric Auger <eric.auger@redhat.com>, Liu Yi L <yi.l.liu@intel.com>, Jacob jun Pan <jacob.jun.pan@intel.com>, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v7 05/10] arm-smmu-v3/sva: Add SVA domain support Date: Thu, 19 May 2022 17:37:28 +0100 [thread overview] Message-ID: <YoZySINkH/MTudFA@myrica> (raw) In-Reply-To: <20220519072047.2996983-6-baolu.lu@linux.intel.com> On Thu, May 19, 2022 at 03:20:42PM +0800, Lu Baolu wrote: > Add support for domain ops callbacks for an SVA domain. > > Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org> (I'll try to take some time next cycle to clean up the driver following this change) > --- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 4 ++ > .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 46 +++++++++++++++++++ > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 6 +++ > 3 files changed, 56 insertions(+) > > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > index d2ba86470c42..ec77f6a51ff9 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > @@ -758,6 +758,10 @@ struct iommu_sva *arm_smmu_sva_bind(struct device *dev, struct mm_struct *mm); > void arm_smmu_sva_unbind(struct iommu_sva *handle); > u32 arm_smmu_sva_get_pasid(struct iommu_sva *handle); > void arm_smmu_sva_notifier_synchronize(void); > +int arm_smmu_sva_attach_dev_pasid(struct iommu_domain *domain, > + struct device *dev, ioasid_t id); > +void arm_smmu_sva_detach_dev_pasid(struct iommu_domain *domain, > + struct device *dev, ioasid_t id); > #else /* CONFIG_ARM_SMMU_V3_SVA */ > static inline bool arm_smmu_sva_supported(struct arm_smmu_device *smmu) > { > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c > index f155d406c5d5..6969974ca89e 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c > @@ -549,3 +549,49 @@ void arm_smmu_sva_notifier_synchronize(void) > */ > mmu_notifier_synchronize(); > } > + > +int arm_smmu_sva_attach_dev_pasid(struct iommu_domain *domain, > + struct device *dev, ioasid_t id) > +{ > + int ret = 0; > + struct mm_struct *mm; > + struct iommu_sva *handle; > + > + if (domain->type != IOMMU_DOMAIN_SVA) > + return -EINVAL; > + > + mm = domain_to_mm(domain); > + if (WARN_ON(!mm)) > + return -ENODEV; > + > + mutex_lock(&sva_lock); > + handle = __arm_smmu_sva_bind(dev, mm); > + if (IS_ERR(handle)) > + ret = PTR_ERR(handle); > + mutex_unlock(&sva_lock); > + > + return ret; > +} > + > +void arm_smmu_sva_detach_dev_pasid(struct iommu_domain *domain, > + struct device *dev, ioasid_t id) > +{ > + struct arm_smmu_bond *bond = NULL, *t; > + struct mm_struct *mm = domain_to_mm(domain); > + struct arm_smmu_master *master = dev_iommu_priv_get(dev); > + > + mutex_lock(&sva_lock); > + list_for_each_entry(t, &master->bonds, list) { > + if (t->mm == mm) { > + bond = t; > + break; > + } > + } > + > + if (!WARN_ON(!bond) && refcount_dec_and_test(&bond->refs)) { > + list_del(&bond->list); > + arm_smmu_mmu_notifier_put(bond->smmu_mn); > + kfree(bond); > + } > + mutex_unlock(&sva_lock); > +} > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > index 6e2cd082c670..4ad3ca70cf89 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > @@ -2858,6 +2858,12 @@ static struct iommu_ops arm_smmu_ops = { > .page_response = arm_smmu_page_response, > .pgsize_bitmap = -1UL, /* Restricted during device attach */ > .owner = THIS_MODULE, > +#ifdef CONFIG_ARM_SMMU_V3_SVA > + .sva_domain_ops = &(const struct iommu_domain_ops) { > + .set_dev_pasid = arm_smmu_sva_attach_dev_pasid, > + .block_dev_pasid = arm_smmu_sva_detach_dev_pasid, > + }, > +#endif > .default_domain_ops = &(const struct iommu_domain_ops) { > .attach_dev = arm_smmu_attach_dev, > .map_pages = arm_smmu_map_pages, > -- > 2.25.1 >
WARNING: multiple messages have this Message-ID (diff)
From: Jean-Philippe Brucker <jean-philippe@linaro.org> To: Lu Baolu <baolu.lu@linux.intel.com> Cc: Kevin Tian <kevin.tian@intel.com>, Dave Jiang <dave.jiang@intel.com>, Ashok Raj <ashok.raj@intel.com>, Robin Murphy <robin.murphy@arm.com>, iommu@lists.linux-foundation.org, linux-kernel@vger.kernel.org, Christoph Hellwig <hch@infradead.org>, Jean-Philippe Brucker <jean-philippe@linaro.com>, Vinod Koul <vkoul@kernel.org>, Jacob jun Pan <jacob.jun.pan@intel.com>, Jason Gunthorpe <jgg@nvidia.com>, Will Deacon <will@kernel.org> Subject: Re: [PATCH v7 05/10] arm-smmu-v3/sva: Add SVA domain support Date: Thu, 19 May 2022 17:37:28 +0100 [thread overview] Message-ID: <YoZySINkH/MTudFA@myrica> (raw) In-Reply-To: <20220519072047.2996983-6-baolu.lu@linux.intel.com> On Thu, May 19, 2022 at 03:20:42PM +0800, Lu Baolu wrote: > Add support for domain ops callbacks for an SVA domain. > > Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Reviewed-by: Jean-Philippe Brucker <jean-philippe@linaro.org> (I'll try to take some time next cycle to clean up the driver following this change) > --- > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h | 4 ++ > .../iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c | 46 +++++++++++++++++++ > drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c | 6 +++ > 3 files changed, 56 insertions(+) > > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > index d2ba86470c42..ec77f6a51ff9 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.h > @@ -758,6 +758,10 @@ struct iommu_sva *arm_smmu_sva_bind(struct device *dev, struct mm_struct *mm); > void arm_smmu_sva_unbind(struct iommu_sva *handle); > u32 arm_smmu_sva_get_pasid(struct iommu_sva *handle); > void arm_smmu_sva_notifier_synchronize(void); > +int arm_smmu_sva_attach_dev_pasid(struct iommu_domain *domain, > + struct device *dev, ioasid_t id); > +void arm_smmu_sva_detach_dev_pasid(struct iommu_domain *domain, > + struct device *dev, ioasid_t id); > #else /* CONFIG_ARM_SMMU_V3_SVA */ > static inline bool arm_smmu_sva_supported(struct arm_smmu_device *smmu) > { > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c > index f155d406c5d5..6969974ca89e 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3-sva.c > @@ -549,3 +549,49 @@ void arm_smmu_sva_notifier_synchronize(void) > */ > mmu_notifier_synchronize(); > } > + > +int arm_smmu_sva_attach_dev_pasid(struct iommu_domain *domain, > + struct device *dev, ioasid_t id) > +{ > + int ret = 0; > + struct mm_struct *mm; > + struct iommu_sva *handle; > + > + if (domain->type != IOMMU_DOMAIN_SVA) > + return -EINVAL; > + > + mm = domain_to_mm(domain); > + if (WARN_ON(!mm)) > + return -ENODEV; > + > + mutex_lock(&sva_lock); > + handle = __arm_smmu_sva_bind(dev, mm); > + if (IS_ERR(handle)) > + ret = PTR_ERR(handle); > + mutex_unlock(&sva_lock); > + > + return ret; > +} > + > +void arm_smmu_sva_detach_dev_pasid(struct iommu_domain *domain, > + struct device *dev, ioasid_t id) > +{ > + struct arm_smmu_bond *bond = NULL, *t; > + struct mm_struct *mm = domain_to_mm(domain); > + struct arm_smmu_master *master = dev_iommu_priv_get(dev); > + > + mutex_lock(&sva_lock); > + list_for_each_entry(t, &master->bonds, list) { > + if (t->mm == mm) { > + bond = t; > + break; > + } > + } > + > + if (!WARN_ON(!bond) && refcount_dec_and_test(&bond->refs)) { > + list_del(&bond->list); > + arm_smmu_mmu_notifier_put(bond->smmu_mn); > + kfree(bond); > + } > + mutex_unlock(&sva_lock); > +} > diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > index 6e2cd082c670..4ad3ca70cf89 100644 > --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c > @@ -2858,6 +2858,12 @@ static struct iommu_ops arm_smmu_ops = { > .page_response = arm_smmu_page_response, > .pgsize_bitmap = -1UL, /* Restricted during device attach */ > .owner = THIS_MODULE, > +#ifdef CONFIG_ARM_SMMU_V3_SVA > + .sva_domain_ops = &(const struct iommu_domain_ops) { > + .set_dev_pasid = arm_smmu_sva_attach_dev_pasid, > + .block_dev_pasid = arm_smmu_sva_detach_dev_pasid, > + }, > +#endif > .default_domain_ops = &(const struct iommu_domain_ops) { > .attach_dev = arm_smmu_attach_dev, > .map_pages = arm_smmu_map_pages, > -- > 2.25.1 > _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
next prev parent reply other threads:[~2022-05-19 16:38 UTC|newest] Thread overview: 100+ messages / expand[flat|nested] mbox.gz Atom feed top 2022-05-19 7:20 [PATCH v7 00/10] iommu: SVA and IOPF refactoring Lu Baolu 2022-05-19 7:20 ` Lu Baolu 2022-05-19 7:20 ` [PATCH v7 01/10] iommu: Add pasids field in struct iommu_device Lu Baolu 2022-05-19 7:20 ` Lu Baolu 2022-05-19 10:37 ` Jean-Philippe Brucker 2022-05-19 10:37 ` Jean-Philippe Brucker 2022-05-19 11:55 ` Baolu Lu 2022-05-19 11:55 ` Baolu Lu 2022-05-24 9:24 ` Tian, Kevin 2022-05-24 9:24 ` Tian, Kevin 2022-05-25 2:03 ` Baolu Lu 2022-05-25 2:03 ` Baolu Lu 2022-05-25 2:13 ` Baolu Lu 2022-05-25 2:13 ` Baolu Lu 2022-05-19 7:20 ` [PATCH v7 02/10] iommu: Remove SVM_FLAG_SUPERVISOR_MODE support Lu Baolu 2022-05-19 7:20 ` Lu Baolu 2022-05-19 16:22 ` Jean-Philippe Brucker 2022-05-19 16:22 ` Jean-Philippe Brucker 2022-05-24 9:27 ` Tian, Kevin 2022-05-24 9:27 ` Tian, Kevin 2022-05-19 7:20 ` [PATCH v7 03/10] iommu/sva: Add iommu_sva_domain support Lu Baolu 2022-05-19 7:20 ` Lu Baolu 2022-05-19 16:33 ` Jean-Philippe Brucker 2022-05-19 16:33 ` Jean-Philippe Brucker 2022-05-20 4:55 ` Baolu Lu 2022-05-20 4:55 ` Baolu Lu 2022-05-23 7:12 ` Baolu Lu 2022-05-23 7:12 ` Baolu Lu 2022-05-24 9:44 ` Tian, Kevin 2022-05-24 9:44 ` Tian, Kevin 2022-05-25 2:18 ` Baolu Lu 2022-05-25 2:18 ` Baolu Lu 2022-05-24 9:39 ` Tian, Kevin 2022-05-24 9:39 ` Tian, Kevin 2022-05-24 13:38 ` Jason Gunthorpe 2022-05-24 13:38 ` Jason Gunthorpe via iommu 2022-05-25 0:44 ` Tian, Kevin 2022-05-25 0:44 ` Tian, Kevin 2022-05-25 2:38 ` Baolu Lu 2022-05-25 2:38 ` Baolu Lu 2022-05-25 4:50 ` Baolu Lu 2022-05-25 4:50 ` Baolu Lu 2022-05-24 13:44 ` Jason Gunthorpe 2022-05-24 13:44 ` Jason Gunthorpe via iommu 2022-05-25 5:19 ` Baolu Lu 2022-05-25 5:19 ` Baolu Lu 2022-05-25 15:25 ` Jason Gunthorpe 2022-05-25 15:25 ` Jason Gunthorpe via iommu 2022-05-26 1:03 ` Baolu Lu 2022-05-26 1:03 ` Baolu Lu 2022-05-25 5:33 ` Baolu Lu 2022-05-25 5:33 ` Baolu Lu 2022-05-24 14:36 ` Robin Murphy 2022-05-24 14:36 ` Robin Murphy 2022-05-25 6:20 ` Baolu Lu 2022-05-25 6:20 ` Baolu Lu 2022-05-25 10:07 ` Robin Murphy 2022-05-25 10:07 ` Robin Murphy 2022-05-25 11:06 ` Jean-Philippe Brucker 2022-05-25 11:06 ` Jean-Philippe Brucker 2022-05-25 13:11 ` Baolu Lu 2022-05-25 13:11 ` Baolu Lu 2022-05-19 7:20 ` [PATCH v7 04/10] iommu/vt-d: Add SVA domain support Lu Baolu 2022-05-19 7:20 ` Lu Baolu 2022-05-19 7:20 ` [PATCH v7 05/10] arm-smmu-v3/sva: " Lu Baolu 2022-05-19 7:20 ` Lu Baolu 2022-05-19 16:37 ` Jean-Philippe Brucker [this message] 2022-05-19 16:37 ` Jean-Philippe Brucker 2022-05-19 7:20 ` [PATCH v7 06/10] iommu/sva: Refactoring iommu_sva_bind/unbind_device() Lu Baolu 2022-05-19 7:20 ` Lu Baolu 2022-05-19 16:39 ` Jean-Philippe Brucker 2022-05-19 16:39 ` Jean-Philippe Brucker 2022-05-20 6:38 ` Baolu Lu 2022-05-20 6:38 ` Baolu Lu 2022-05-20 11:28 ` Jean-Philippe Brucker 2022-05-20 11:28 ` Jean-Philippe Brucker 2022-05-23 3:07 ` Baolu Lu 2022-05-23 3:07 ` Baolu Lu 2022-05-24 10:22 ` Tian, Kevin 2022-05-24 10:22 ` Tian, Kevin 2022-05-24 10:57 ` Jean-Philippe Brucker 2022-05-24 10:57 ` Jean-Philippe Brucker 2022-05-25 2:04 ` Tian, Kevin 2022-05-25 2:04 ` Tian, Kevin 2022-05-25 7:29 ` Jean-Philippe Brucker 2022-05-25 7:29 ` Jean-Philippe Brucker 2022-06-02 6:46 ` Tian, Kevin 2022-06-02 6:46 ` Tian, Kevin 2022-05-19 7:20 ` [PATCH v7 07/10] iommu: Remove SVA related callbacks from iommu ops Lu Baolu 2022-05-19 7:20 ` Lu Baolu 2022-05-24 10:23 ` Tian, Kevin 2022-05-24 10:23 ` Tian, Kevin 2022-05-19 7:20 ` [PATCH v7 08/10] iommu: Prepare IOMMU domain for IOPF Lu Baolu 2022-05-19 7:20 ` Lu Baolu 2022-05-19 16:40 ` Jean-Philippe Brucker 2022-05-19 16:40 ` Jean-Philippe Brucker 2022-05-19 7:20 ` [PATCH v7 09/10] iommu: Per-domain I/O page fault handling Lu Baolu 2022-05-19 7:20 ` Lu Baolu 2022-05-19 7:20 ` [PATCH v7 10/10] iommu: Rename iommu-sva-lib.{c,h} Lu Baolu 2022-05-19 7:20 ` Lu Baolu
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