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From: Mark Brown <broonie@kernel.org>
To: Michal Simek <michal.simek@xilinx.com>
Cc: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	p.yadav@ti.com, miquel.raynal@bootlin.com, richard@nod.at,
	vigneshr@ti.com, git@xilinx.com, linux-spi@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, michael@walle.cc,
	linux-mtd@lists.infradead.org
Subject: Re: [RFC PATCH 1/2] spi: Add multiple CS support for a single SPI device
Date: Mon, 11 Jul 2022 15:52:34 +0100	[thread overview]
Message-ID: <Ysw5MpvjKM5LKvWd@sirena.org.uk> (raw)
In-Reply-To: <40110ff8-5c19-bc54-759b-a51a919788eb@xilinx.com>

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On Mon, Jul 11, 2022 at 02:47:54PM +0200, Michal Simek wrote:
> On 6/9/22 13:54, Mark Brown wrote:
> > On Mon, Jun 06, 2022 at 04:56:06PM +0530, Amit Kumar Mahapatra wrote:

> > > +	u32 cs[SPI_CS_CNT_MAX];
> > > +	u8 idx;
> > >   	/* Mode (clock phase/polarity/etc.) */
> > >   	if (of_property_read_bool(nc, "spi-cpha"))

> > This is changing the DT binding but doesn't have any updates to the
> > binding document.  The binding code also doesn't validate that we don't
> > have too many chip selects.

> I would like to better understand your request here in connection to change
> in the binding code for validation.
> What exactly do you want to validate?
> That child reg property is not bigger than num-cs in controller node?

If you are adding support for multiple chip selects in the driver then
there must be some mechanism for expressing that in the bindings which I
would expect to see appear as a change to the binding document.

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WARNING: multiple messages have this Message-ID (diff)
From: Mark Brown <broonie@kernel.org>
To: Michal Simek <michal.simek@xilinx.com>
Cc: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	p.yadav@ti.com, miquel.raynal@bootlin.com, richard@nod.at,
	vigneshr@ti.com, git@xilinx.com, linux-spi@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, michael@walle.cc,
	linux-mtd@lists.infradead.org
Subject: Re: [RFC PATCH 1/2] spi: Add multiple CS support for a single SPI device
Date: Mon, 11 Jul 2022 15:52:34 +0100	[thread overview]
Message-ID: <Ysw5MpvjKM5LKvWd@sirena.org.uk> (raw)
In-Reply-To: <40110ff8-5c19-bc54-759b-a51a919788eb@xilinx.com>


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On Mon, Jul 11, 2022 at 02:47:54PM +0200, Michal Simek wrote:
> On 6/9/22 13:54, Mark Brown wrote:
> > On Mon, Jun 06, 2022 at 04:56:06PM +0530, Amit Kumar Mahapatra wrote:

> > > +	u32 cs[SPI_CS_CNT_MAX];
> > > +	u8 idx;
> > >   	/* Mode (clock phase/polarity/etc.) */
> > >   	if (of_property_read_bool(nc, "spi-cpha"))

> > This is changing the DT binding but doesn't have any updates to the
> > binding document.  The binding code also doesn't validate that we don't
> > have too many chip selects.

> I would like to better understand your request here in connection to change
> in the binding code for validation.
> What exactly do you want to validate?
> That child reg property is not bigger than num-cs in controller node?

If you are adding support for multiple chip selects in the driver then
there must be some mechanism for expressing that in the bindings which I
would expect to see appear as a change to the binding document.

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______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

WARNING: multiple messages have this Message-ID (diff)
From: Mark Brown <broonie@kernel.org>
To: Michal Simek <michal.simek@xilinx.com>
Cc: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	p.yadav@ti.com, miquel.raynal@bootlin.com, richard@nod.at,
	vigneshr@ti.com, git@xilinx.com, linux-spi@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, michael@walle.cc,
	linux-mtd@lists.infradead.org
Subject: Re: [RFC PATCH 1/2] spi: Add multiple CS support for a single SPI device
Date: Mon, 11 Jul 2022 15:52:34 +0100	[thread overview]
Message-ID: <Ysw5MpvjKM5LKvWd@sirena.org.uk> (raw)
In-Reply-To: <40110ff8-5c19-bc54-759b-a51a919788eb@xilinx.com>


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On Mon, Jul 11, 2022 at 02:47:54PM +0200, Michal Simek wrote:
> On 6/9/22 13:54, Mark Brown wrote:
> > On Mon, Jun 06, 2022 at 04:56:06PM +0530, Amit Kumar Mahapatra wrote:

> > > +	u32 cs[SPI_CS_CNT_MAX];
> > > +	u8 idx;
> > >   	/* Mode (clock phase/polarity/etc.) */
> > >   	if (of_property_read_bool(nc, "spi-cpha"))

> > This is changing the DT binding but doesn't have any updates to the
> > binding document.  The binding code also doesn't validate that we don't
> > have too many chip selects.

> I would like to better understand your request here in connection to change
> in the binding code for validation.
> What exactly do you want to validate?
> That child reg property is not bigger than num-cs in controller node?

If you are adding support for multiple chip selects in the driver then
there must be some mechanism for expressing that in the bindings which I
would expect to see appear as a change to the binding document.

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_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  reply	other threads:[~2022-07-11 14:52 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-06 11:26 [RFC PATCH 0/2] spi: Add support for stacked/parallel memories Amit Kumar Mahapatra
2022-06-06 11:26 ` Amit Kumar Mahapatra
2022-06-06 11:26 ` Amit Kumar Mahapatra
2022-06-06 11:26 ` [RFC PATCH 1/2] spi: Add multiple CS support for a single SPI device Amit Kumar Mahapatra
2022-06-06 11:26   ` Amit Kumar Mahapatra
2022-06-06 11:26   ` Amit Kumar Mahapatra
2022-06-09 11:54   ` Mark Brown
2022-06-09 11:54     ` Mark Brown
2022-06-09 11:54     ` Mark Brown
2022-06-23 11:39     ` Mahapatra, Amit Kumar
2022-06-23 11:39       ` Mahapatra, Amit Kumar
2022-06-23 11:39       ` Mahapatra, Amit Kumar
2022-06-23 12:06       ` Mark Brown
2022-06-23 12:06         ` Mark Brown
2022-06-23 12:06         ` Mark Brown
2022-07-15 15:35         ` Mahapatra, Amit Kumar
2022-07-15 15:35           ` Mahapatra, Amit Kumar
2022-07-15 15:35           ` Mahapatra, Amit Kumar
2022-07-15 15:54           ` Mark Brown
2022-07-15 15:54             ` Mark Brown
2022-07-15 15:54             ` Mark Brown
2022-07-19 13:21             ` Mahapatra, Amit Kumar
2022-07-19 13:21               ` Mahapatra, Amit Kumar
2022-07-19 13:21               ` Mahapatra, Amit Kumar
2022-07-19 17:53               ` Mark Brown
2022-07-19 17:53                 ` Mark Brown
2022-07-19 17:53                 ` Mark Brown
2022-07-27 13:02                 ` Mahapatra, Amit Kumar
2022-07-27 13:02                   ` Mahapatra, Amit Kumar
2022-07-27 13:02                   ` Mahapatra, Amit Kumar
2022-07-11 12:47     ` Michal Simek
2022-07-11 12:47       ` Michal Simek
2022-07-11 12:47       ` Michal Simek
2022-07-11 14:52       ` Mark Brown [this message]
2022-07-11 14:52         ` Mark Brown
2022-07-11 14:52         ` Mark Brown
2022-07-15 15:36         ` Mahapatra, Amit Kumar
2022-07-15 15:36           ` Mahapatra, Amit Kumar
2022-07-15 15:36           ` Mahapatra, Amit Kumar
2022-07-15 16:03           ` Mark Brown
2022-07-15 16:03             ` Mark Brown
2022-07-15 16:03             ` Mark Brown
2022-06-06 11:26 ` [RFC PATCH 2/2] mtd: spi-nor: Add support for stacked/parallel memories Amit Kumar Mahapatra
2022-06-06 11:26   ` Amit Kumar Mahapatra
2022-06-06 11:26   ` Amit Kumar Mahapatra

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