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From: Robin Murphy <robin.murphy@arm.com>
To: Srinivasarao Pathipati <quic_c_spathi@quicinc.com>,
	Will Deacon <will@kernel.org>
Cc: mark.rutland@arm.com, peterz@infradead.org, mingo@redhat.com,
	acme@kernel.org, alexander.shishkin@linux.intel.com,
	jolsa@kernel.org, namhyung@kernel.org, catalin.marinas@arm.com,
	linux-arm-kernel@lists.infradead.org,
	linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH V5] arm64: perf: Make exporting of pmu events configurable
Date: Thu, 9 Jun 2022 12:36:50 +0100	[thread overview]
Message-ID: <a0b03913-6412-0e2a-d9c5-431c52ff624f@arm.com> (raw)
In-Reply-To: <4f5dbc00-e25b-f6ff-8585-31fc50f48a21@quicinc.com>

On 2022-06-09 11:35, Srinivasarao Pathipati wrote:
> On our Qualcomm platforms, The X bit is getting set by firmware at early 
> bootup for Qualcomm use cases
> and non-secure world is resetting it, that causing issue.

I think you're going to have to clarify what exactly this "issue" is if 
we're ever going to make sense of it...

I can't imagine that export from a disabled PMU would matter much, so my 
best guess is that EL2 firmware has reserved some counters via 
MDCR_EL2.HPMN which it's using to monitor the Non-Secure boot; if that 
also depends on PMCR.X remaining set, then as far as I can see it's 
really the firmware's own stupid fault for not using MDCR_EL2.TPMCR to 
prevent Linux from messing with its configuration. Or maybe something in 
the Secure world is trying to use the PMU independently and it's an EL3 
bug where PMCR_EL0 isn't being context-switched properly?

Robin.

> On 6/9/2022 3:32 PM, Will Deacon wrote:
>> On Mon, May 23, 2022 at 05:19:34PM +0530, Srinivasarao Pathipati wrote:
>>> The PMU export bit (PMCR_EL0.X) is getting reset during pmu reset,
>>> Make is configurable using sysctls to enable/disable at runtime.
>>> It can also be enabled at early bootup with kernel arguments.
>>>
>>> Signed-off-by: Srinivasarao Pathipati <quic_c_spathi@quicinc.com>
>>> ---
>>> Changes since V4:
>>>     - Registering sysctls dynamically for only arm64 as suggested by 
>>> Will
>>>     - Not removed the code to configure with kernel parameters
>>>       as the sysctl's kernel parameter(sysctl.kernel.export_pmu_events)
>>>       is not working at early bootup. pmu_reset() getting called before
>>>       sysctl's kernel parameter is set.
>> Why do you need this during early bootup? Perf won't program any events
>> until much later and if somebody else is configuring the PMU before
>> entering Linux then they can also set that X bit in the PMCR.
>>
>> Will
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

WARNING: multiple messages have this Message-ID (diff)
From: Robin Murphy <robin.murphy@arm.com>
To: Srinivasarao Pathipati <quic_c_spathi@quicinc.com>,
	Will Deacon <will@kernel.org>
Cc: mark.rutland@arm.com, peterz@infradead.org, mingo@redhat.com,
	acme@kernel.org, alexander.shishkin@linux.intel.com,
	jolsa@kernel.org, namhyung@kernel.org, catalin.marinas@arm.com,
	linux-arm-kernel@lists.infradead.org,
	linux-perf-users@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH V5] arm64: perf: Make exporting of pmu events configurable
Date: Thu, 9 Jun 2022 12:36:50 +0100	[thread overview]
Message-ID: <a0b03913-6412-0e2a-d9c5-431c52ff624f@arm.com> (raw)
In-Reply-To: <4f5dbc00-e25b-f6ff-8585-31fc50f48a21@quicinc.com>

On 2022-06-09 11:35, Srinivasarao Pathipati wrote:
> On our Qualcomm platforms, The X bit is getting set by firmware at early 
> bootup for Qualcomm use cases
> and non-secure world is resetting it, that causing issue.

I think you're going to have to clarify what exactly this "issue" is if 
we're ever going to make sense of it...

I can't imagine that export from a disabled PMU would matter much, so my 
best guess is that EL2 firmware has reserved some counters via 
MDCR_EL2.HPMN which it's using to monitor the Non-Secure boot; if that 
also depends on PMCR.X remaining set, then as far as I can see it's 
really the firmware's own stupid fault for not using MDCR_EL2.TPMCR to 
prevent Linux from messing with its configuration. Or maybe something in 
the Secure world is trying to use the PMU independently and it's an EL3 
bug where PMCR_EL0 isn't being context-switched properly?

Robin.

> On 6/9/2022 3:32 PM, Will Deacon wrote:
>> On Mon, May 23, 2022 at 05:19:34PM +0530, Srinivasarao Pathipati wrote:
>>> The PMU export bit (PMCR_EL0.X) is getting reset during pmu reset,
>>> Make is configurable using sysctls to enable/disable at runtime.
>>> It can also be enabled at early bootup with kernel arguments.
>>>
>>> Signed-off-by: Srinivasarao Pathipati <quic_c_spathi@quicinc.com>
>>> ---
>>> Changes since V4:
>>>     - Registering sysctls dynamically for only arm64 as suggested by 
>>> Will
>>>     - Not removed the code to configure with kernel parameters
>>>       as the sysctl's kernel parameter(sysctl.kernel.export_pmu_events)
>>>       is not working at early bootup. pmu_reset() getting called before
>>>       sysctl's kernel parameter is set.
>> Why do you need this during early bootup? Perf won't program any events
>> until much later and if somebody else is configuring the PMU before
>> entering Linux then they can also set that X bit in the PMCR.
>>
>> Will
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

  parent reply	other threads:[~2022-06-09 11:37 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-23 11:49 [PATCH V5] arm64: perf: Make exporting of pmu events configurable Srinivasarao Pathipati
2022-05-23 11:49 ` Srinivasarao Pathipati
2022-06-09  5:02 ` Srinivasarao Pathipati
2022-06-09  5:02   ` Srinivasarao Pathipati
2022-06-09 10:02 ` Will Deacon
2022-06-09 10:02   ` Will Deacon
2022-06-09 10:35   ` Srinivasarao Pathipati
2022-06-09 10:35     ` Srinivasarao Pathipati
2022-06-09 11:32     ` Will Deacon
2022-06-09 11:32       ` Will Deacon
2022-06-09 13:07       ` Srinivasarao Pathipati
2022-06-09 13:07         ` Srinivasarao Pathipati
2022-06-09 11:36     ` Robin Murphy [this message]
2022-06-09 11:36       ` Robin Murphy

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