* drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: 'timer_clk' not released on lines: 64.
@ 2021-02-22 6:21 ` Dan Carpenter
0 siblings, 0 replies; 10+ messages in thread
From: Dan Carpenter @ 2021-02-22 6:21 UTC (permalink / raw)
To: kbuild, Dinh Nguyen; +Cc: lkp, kbuild-all, linux-kernel, Daniel Lezcano
[-- Attachment #1: Type: text/plain, Size: 6455 bytes --]
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 55f62bc873477dae2c45bbbc30b86cf3e0982f3b
commit: 5d9814df0aec56a638bbf20795abb4cfaf3cd331 clocksource/drivers/dw_apb_timer_of: Add error handling if no clock available
config: arm64-randconfig-m031-20210221 (attached as .config)
compiler: aarch64-linux-gcc (GCC) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
New smatch warnings:
drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: 'timer_clk' not released on lines: 64.
Old smatch warnings:
drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: '*base' not released on lines: 56,64.
vim +/timer_clk +66 drivers/clocksource/dw_apb_timer_of.c
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 17 static int __init timer_get_base_and_rate(struct device_node *np,
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 18 void __iomem **base, u32 *rate)
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 19 {
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 20 struct clk *timer_clk;
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 21 struct clk *pclk;
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 22 struct reset_control *rstc;
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 23 int ret;
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 24
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 25 *base = of_iomap(np, 0);
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 26
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 27 if (!*base)
2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 28 panic("Unable to map regs for %pOFn", np);
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 29
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 30 /*
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 31 * Reset the timer if the reset control is available, wiping
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 32 * out the state the firmware may have left it
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 33 */
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 34 rstc = of_reset_control_get(np, NULL);
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 35 if (!IS_ERR(rstc)) {
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 36 reset_control_assert(rstc);
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 37 reset_control_deassert(rstc);
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 38 }
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 39
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 40 /*
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 41 * Not all implementations use a periphal clock, so don't panic
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 42 * if it's not present
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 43 */
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 44 pclk = of_clk_get_by_name(np, "pclk");
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 45 if (!IS_ERR(pclk))
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 46 if (clk_prepare_enable(pclk))
2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 47 pr_warn("pclk for %pOFn is present, but could not be activated\n",
2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 48 np);
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 49
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 50 if (!of_property_read_u32(np, "clock-freq", rate) &&
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 51 !of_property_read_u32(np, "clock-frequency", rate))
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 52 return 0;
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 53
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 54 timer_clk = of_clk_get_by_name(np, "timer");
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 55 if (IS_ERR(timer_clk))
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 56 return PTR_ERR(timer_clk);
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 57
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 58 ret = clk_prepare_enable(timer_clk);
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 59 if (ret)
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 60 return ret;
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 61
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 62 *rate = clk_get_rate(timer_clk);
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 63 if (!(*rate))
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 64 return -EINVAL;
disable timer_clk if clk_get_rate() fails?
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 65
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 @66 return 0;
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 67 }
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
[-- Attachment #2: .config.gz --]
[-- Type: application/gzip, Size: 27214 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: 'timer_clk' not released on lines: 64.
@ 2021-02-22 6:21 ` Dan Carpenter
0 siblings, 0 replies; 10+ messages in thread
From: Dan Carpenter @ 2021-02-22 6:21 UTC (permalink / raw)
To: kbuild
[-- Attachment #1: Type: text/plain, Size: 6533 bytes --]
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 55f62bc873477dae2c45bbbc30b86cf3e0982f3b
commit: 5d9814df0aec56a638bbf20795abb4cfaf3cd331 clocksource/drivers/dw_apb_timer_of: Add error handling if no clock available
config: arm64-randconfig-m031-20210221 (attached as .config)
compiler: aarch64-linux-gcc (GCC) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
New smatch warnings:
drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: 'timer_clk' not released on lines: 64.
Old smatch warnings:
drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: '*base' not released on lines: 56,64.
vim +/timer_clk +66 drivers/clocksource/dw_apb_timer_of.c
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 17 static int __init timer_get_base_and_rate(struct device_node *np,
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 18 void __iomem **base, u32 *rate)
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 19 {
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 20 struct clk *timer_clk;
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 21 struct clk *pclk;
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 22 struct reset_control *rstc;
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 23 int ret;
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 24
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 25 *base = of_iomap(np, 0);
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 26
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 27 if (!*base)
2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 28 panic("Unable to map regs for %pOFn", np);
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 29
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 30 /*
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 31 * Reset the timer if the reset control is available, wiping
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 32 * out the state the firmware may have left it
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 33 */
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 34 rstc = of_reset_control_get(np, NULL);
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 35 if (!IS_ERR(rstc)) {
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 36 reset_control_assert(rstc);
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 37 reset_control_deassert(rstc);
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 38 }
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 39
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 40 /*
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 41 * Not all implementations use a periphal clock, so don't panic
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 42 * if it's not present
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 43 */
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 44 pclk = of_clk_get_by_name(np, "pclk");
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 45 if (!IS_ERR(pclk))
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 46 if (clk_prepare_enable(pclk))
2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 47 pr_warn("pclk for %pOFn is present, but could not be activated\n",
2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 48 np);
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 49
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 50 if (!of_property_read_u32(np, "clock-freq", rate) &&
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 51 !of_property_read_u32(np, "clock-frequency", rate))
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 52 return 0;
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 53
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 54 timer_clk = of_clk_get_by_name(np, "timer");
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 55 if (IS_ERR(timer_clk))
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 56 return PTR_ERR(timer_clk);
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 57
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 58 ret = clk_prepare_enable(timer_clk);
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 59 if (ret)
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 60 return ret;
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 61
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 62 *rate = clk_get_rate(timer_clk);
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 63 if (!(*rate))
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 64 return -EINVAL;
disable timer_clk if clk_get_rate() fails?
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 65
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 @66 return 0;
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 67 }
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 27214 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: 'timer_clk' not released on lines: 64.
@ 2021-02-22 6:21 ` Dan Carpenter
0 siblings, 0 replies; 10+ messages in thread
From: Dan Carpenter @ 2021-02-22 6:21 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 6533 bytes --]
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 55f62bc873477dae2c45bbbc30b86cf3e0982f3b
commit: 5d9814df0aec56a638bbf20795abb4cfaf3cd331 clocksource/drivers/dw_apb_timer_of: Add error handling if no clock available
config: arm64-randconfig-m031-20210221 (attached as .config)
compiler: aarch64-linux-gcc (GCC) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
New smatch warnings:
drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: 'timer_clk' not released on lines: 64.
Old smatch warnings:
drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: '*base' not released on lines: 56,64.
vim +/timer_clk +66 drivers/clocksource/dw_apb_timer_of.c
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 17 static int __init timer_get_base_and_rate(struct device_node *np,
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 18 void __iomem **base, u32 *rate)
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 19 {
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 20 struct clk *timer_clk;
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 21 struct clk *pclk;
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 22 struct reset_control *rstc;
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 23 int ret;
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 24
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 25 *base = of_iomap(np, 0);
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 26
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 27 if (!*base)
2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 28 panic("Unable to map regs for %pOFn", np);
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 29
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 30 /*
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 31 * Reset the timer if the reset control is available, wiping
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 32 * out the state the firmware may have left it
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 33 */
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 34 rstc = of_reset_control_get(np, NULL);
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 35 if (!IS_ERR(rstc)) {
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 36 reset_control_assert(rstc);
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 37 reset_control_deassert(rstc);
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 38 }
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 39
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 40 /*
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 41 * Not all implementations use a periphal clock, so don't panic
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 42 * if it's not present
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 43 */
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 44 pclk = of_clk_get_by_name(np, "pclk");
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 45 if (!IS_ERR(pclk))
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 46 if (clk_prepare_enable(pclk))
2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 47 pr_warn("pclk for %pOFn is present, but could not be activated\n",
2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 48 np);
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 49
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 50 if (!of_property_read_u32(np, "clock-freq", rate) &&
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 51 !of_property_read_u32(np, "clock-frequency", rate))
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 52 return 0;
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 53
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 54 timer_clk = of_clk_get_by_name(np, "timer");
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 55 if (IS_ERR(timer_clk))
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 56 return PTR_ERR(timer_clk);
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 57
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 58 ret = clk_prepare_enable(timer_clk);
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 59 if (ret)
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 60 return ret;
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 61
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 62 *rate = clk_get_rate(timer_clk);
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 63 if (!(*rate))
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 64 return -EINVAL;
disable timer_clk if clk_get_rate() fails?
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 65
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 @66 return 0;
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 67 }
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 27214 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: 'timer_clk' not released on lines: 64.
2021-02-22 6:21 ` Dan Carpenter
@ 2021-03-22 9:58 ` Daniel Lezcano
-1 siblings, 0 replies; 10+ messages in thread
From: Daniel Lezcano @ 2021-03-22 9:58 UTC (permalink / raw)
To: Dinh Nguyen; +Cc: Dan Carpenter, kbuild, lkp, kbuild-all, linux-kernel
Dinh,
is it possible to have a look at this issue?
Thanks
-- Daniel
On 22/02/2021 07:21, Dan Carpenter wrote:
> tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
> head: 55f62bc873477dae2c45bbbc30b86cf3e0982f3b
> commit: 5d9814df0aec56a638bbf20795abb4cfaf3cd331 clocksource/drivers/dw_apb_timer_of: Add error handling if no clock available
> config: arm64-randconfig-m031-20210221 (attached as .config)
> compiler: aarch64-linux-gcc (GCC) 9.3.0
>
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot <lkp@intel.com>
> Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
>
> New smatch warnings:
> drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: 'timer_clk' not released on lines: 64.
>
> Old smatch warnings:
> drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: '*base' not released on lines: 56,64.
>
> vim +/timer_clk +66 drivers/clocksource/dw_apb_timer_of.c
>
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 17 static int __init timer_get_base_and_rate(struct device_node *np,
> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 18 void __iomem **base, u32 *rate)
> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 19 {
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 20 struct clk *timer_clk;
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 21 struct clk *pclk;
> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 22 struct reset_control *rstc;
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 23 int ret;
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 24
> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 25 *base = of_iomap(np, 0);
> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 26
> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 27 if (!*base)
> 2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 28 panic("Unable to map regs for %pOFn", np);
> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 29
> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 30 /*
> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 31 * Reset the timer if the reset control is available, wiping
> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 32 * out the state the firmware may have left it
> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 33 */
> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 34 rstc = of_reset_control_get(np, NULL);
> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 35 if (!IS_ERR(rstc)) {
> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 36 reset_control_assert(rstc);
> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 37 reset_control_deassert(rstc);
> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 38 }
> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 39
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 40 /*
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 41 * Not all implementations use a periphal clock, so don't panic
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 42 * if it's not present
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 43 */
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 44 pclk = of_clk_get_by_name(np, "pclk");
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 45 if (!IS_ERR(pclk))
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 46 if (clk_prepare_enable(pclk))
> 2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 47 pr_warn("pclk for %pOFn is present, but could not be activated\n",
> 2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 48 np);
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 49
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 50 if (!of_property_read_u32(np, "clock-freq", rate) &&
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 51 !of_property_read_u32(np, "clock-frequency", rate))
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 52 return 0;
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 53
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 54 timer_clk = of_clk_get_by_name(np, "timer");
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 55 if (IS_ERR(timer_clk))
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 56 return PTR_ERR(timer_clk);
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 57
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 58 ret = clk_prepare_enable(timer_clk);
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 59 if (ret)
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 60 return ret;
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 61
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 62 *rate = clk_get_rate(timer_clk);
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 63 if (!(*rate))
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 64 return -EINVAL;
>
> disable timer_clk if clk_get_rate() fails?
>
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 65
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 @66 return 0;
> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 67 }
>
> ---
> 0-DAY CI Kernel Test Service, Intel Corporation
> https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
>
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: 'timer_clk' not released on lines: 64.
@ 2021-03-22 9:58 ` Daniel Lezcano
0 siblings, 0 replies; 10+ messages in thread
From: Daniel Lezcano @ 2021-03-22 9:58 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 7057 bytes --]
Dinh,
is it possible to have a look at this issue?
Thanks
-- Daniel
On 22/02/2021 07:21, Dan Carpenter wrote:
> tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
> head: 55f62bc873477dae2c45bbbc30b86cf3e0982f3b
> commit: 5d9814df0aec56a638bbf20795abb4cfaf3cd331 clocksource/drivers/dw_apb_timer_of: Add error handling if no clock available
> config: arm64-randconfig-m031-20210221 (attached as .config)
> compiler: aarch64-linux-gcc (GCC) 9.3.0
>
> If you fix the issue, kindly add following tag as appropriate
> Reported-by: kernel test robot <lkp@intel.com>
> Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
>
> New smatch warnings:
> drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: 'timer_clk' not released on lines: 64.
>
> Old smatch warnings:
> drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: '*base' not released on lines: 56,64.
>
> vim +/timer_clk +66 drivers/clocksource/dw_apb_timer_of.c
>
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 17 static int __init timer_get_base_and_rate(struct device_node *np,
> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 18 void __iomem **base, u32 *rate)
> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 19 {
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 20 struct clk *timer_clk;
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 21 struct clk *pclk;
> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 22 struct reset_control *rstc;
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 23 int ret;
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 24
> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 25 *base = of_iomap(np, 0);
> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 26
> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 27 if (!*base)
> 2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 28 panic("Unable to map regs for %pOFn", np);
> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 29
> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 30 /*
> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 31 * Reset the timer if the reset control is available, wiping
> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 32 * out the state the firmware may have left it
> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 33 */
> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 34 rstc = of_reset_control_get(np, NULL);
> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 35 if (!IS_ERR(rstc)) {
> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 36 reset_control_assert(rstc);
> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 37 reset_control_deassert(rstc);
> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 38 }
> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 39
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 40 /*
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 41 * Not all implementations use a periphal clock, so don't panic
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 42 * if it's not present
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 43 */
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 44 pclk = of_clk_get_by_name(np, "pclk");
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 45 if (!IS_ERR(pclk))
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 46 if (clk_prepare_enable(pclk))
> 2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 47 pr_warn("pclk for %pOFn is present, but could not be activated\n",
> 2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 48 np);
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 49
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 50 if (!of_property_read_u32(np, "clock-freq", rate) &&
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 51 !of_property_read_u32(np, "clock-frequency", rate))
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 52 return 0;
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 53
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 54 timer_clk = of_clk_get_by_name(np, "timer");
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 55 if (IS_ERR(timer_clk))
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 56 return PTR_ERR(timer_clk);
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 57
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 58 ret = clk_prepare_enable(timer_clk);
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 59 if (ret)
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 60 return ret;
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 61
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 62 *rate = clk_get_rate(timer_clk);
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 63 if (!(*rate))
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 64 return -EINVAL;
>
> disable timer_clk if clk_get_rate() fails?
>
> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 65
> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 @66 return 0;
> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 67 }
>
> ---
> 0-DAY CI Kernel Test Service, Intel Corporation
> https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
>
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: 'timer_clk' not released on lines: 64.
2021-03-22 9:58 ` Daniel Lezcano
@ 2021-03-22 12:21 ` Dinh Nguyen
-1 siblings, 0 replies; 10+ messages in thread
From: Dinh Nguyen @ 2021-03-22 12:21 UTC (permalink / raw)
To: Daniel Lezcano; +Cc: Dan Carpenter, kbuild, lkp, kbuild-all, linux-kernel
Hi Daniel,
2/21 4:58 AM, Daniel Lezcano wrote:
>
> Dinh,
>
> is it possible to have a look at this issue?
>
> Thanks
>
Sorry, but somehow I missed cc'ing you when I first sent the patch.
I've resent it just now.
Dinh
> On 22/02/2021 07:21, Dan Carpenter wrote:
>> tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
>> head: 55f62bc873477dae2c45bbbc30b86cf3e0982f3b
>> commit: 5d9814df0aec56a638bbf20795abb4cfaf3cd331 clocksource/drivers/dw_apb_timer_of: Add error handling if no clock available
>> config: arm64-randconfig-m031-20210221 (attached as .config)
>> compiler: aarch64-linux-gcc (GCC) 9.3.0
>>
>> If you fix the issue, kindly add following tag as appropriate
>> Reported-by: kernel test robot <lkp@intel.com>
>> Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
>>
>> New smatch warnings:
>> drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: 'timer_clk' not released on lines: 64.
>>
>> Old smatch warnings:
>> drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: '*base' not released on lines: 56,64.
>>
>> vim +/timer_clk +66 drivers/clocksource/dw_apb_timer_of.c
>>
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 17 static int __init timer_get_base_and_rate(struct device_node *np,
>> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 18 void __iomem **base, u32 *rate)
>> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 19 {
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 20 struct clk *timer_clk;
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 21 struct clk *pclk;
>> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 22 struct reset_control *rstc;
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 23 int ret;
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 24
>> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 25 *base = of_iomap(np, 0);
>> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 26
>> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 27 if (!*base)
>> 2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 28 panic("Unable to map regs for %pOFn", np);
>> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 29
>> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 30 /*
>> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 31 * Reset the timer if the reset control is available, wiping
>> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 32 * out the state the firmware may have left it
>> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 33 */
>> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 34 rstc = of_reset_control_get(np, NULL);
>> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 35 if (!IS_ERR(rstc)) {
>> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 36 reset_control_assert(rstc);
>> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 37 reset_control_deassert(rstc);
>> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 38 }
>> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 39
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 40 /*
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 41 * Not all implementations use a periphal clock, so don't panic
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 42 * if it's not present
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 43 */
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 44 pclk = of_clk_get_by_name(np, "pclk");
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 45 if (!IS_ERR(pclk))
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 46 if (clk_prepare_enable(pclk))
>> 2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 47 pr_warn("pclk for %pOFn is present, but could not be activated\n",
>> 2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 48 np);
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 49
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 50 if (!of_property_read_u32(np, "clock-freq", rate) &&
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 51 !of_property_read_u32(np, "clock-frequency", rate))
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 52 return 0;
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 53
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 54 timer_clk = of_clk_get_by_name(np, "timer");
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 55 if (IS_ERR(timer_clk))
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 56 return PTR_ERR(timer_clk);
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 57
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 58 ret = clk_prepare_enable(timer_clk);
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 59 if (ret)
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 60 return ret;
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 61
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 62 *rate = clk_get_rate(timer_clk);
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 63 if (!(*rate))
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 64 return -EINVAL;
>>
>> disable timer_clk if clk_get_rate() fails?
>>
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 65
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 @66 return 0;
>> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 67 }
>>
>> ---
>> 0-DAY CI Kernel Test Service, Intel Corporation
>> https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
>>
>
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: 'timer_clk' not released on lines: 64.
@ 2021-03-22 12:21 ` Dinh Nguyen
0 siblings, 0 replies; 10+ messages in thread
From: Dinh Nguyen @ 2021-03-22 12:21 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 7033 bytes --]
Hi Daniel,
2/21 4:58 AM, Daniel Lezcano wrote:
>
> Dinh,
>
> is it possible to have a look at this issue?
>
> Thanks
>
Sorry, but somehow I missed cc'ing you when I first sent the patch.
I've resent it just now.
Dinh
> On 22/02/2021 07:21, Dan Carpenter wrote:
>> tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
>> head: 55f62bc873477dae2c45bbbc30b86cf3e0982f3b
>> commit: 5d9814df0aec56a638bbf20795abb4cfaf3cd331 clocksource/drivers/dw_apb_timer_of: Add error handling if no clock available
>> config: arm64-randconfig-m031-20210221 (attached as .config)
>> compiler: aarch64-linux-gcc (GCC) 9.3.0
>>
>> If you fix the issue, kindly add following tag as appropriate
>> Reported-by: kernel test robot <lkp@intel.com>
>> Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
>>
>> New smatch warnings:
>> drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: 'timer_clk' not released on lines: 64.
>>
>> Old smatch warnings:
>> drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: '*base' not released on lines: 56,64.
>>
>> vim +/timer_clk +66 drivers/clocksource/dw_apb_timer_of.c
>>
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 17 static int __init timer_get_base_and_rate(struct device_node *np,
>> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 18 void __iomem **base, u32 *rate)
>> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 19 {
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 20 struct clk *timer_clk;
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 21 struct clk *pclk;
>> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 22 struct reset_control *rstc;
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 23 int ret;
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 24
>> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 25 *base = of_iomap(np, 0);
>> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 26
>> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 27 if (!*base)
>> 2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 28 panic("Unable to map regs for %pOFn", np);
>> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 29
>> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 30 /*
>> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 31 * Reset the timer if the reset control is available, wiping
>> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 32 * out the state the firmware may have left it
>> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 33 */
>> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 34 rstc = of_reset_control_get(np, NULL);
>> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 35 if (!IS_ERR(rstc)) {
>> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 36 reset_control_assert(rstc);
>> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 37 reset_control_deassert(rstc);
>> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 38 }
>> 1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 39
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 40 /*
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 41 * Not all implementations use a periphal clock, so don't panic
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 42 * if it's not present
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 43 */
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 44 pclk = of_clk_get_by_name(np, "pclk");
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 45 if (!IS_ERR(pclk))
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 46 if (clk_prepare_enable(pclk))
>> 2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 47 pr_warn("pclk for %pOFn is present, but could not be activated\n",
>> 2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 48 np);
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 49
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 50 if (!of_property_read_u32(np, "clock-freq", rate) &&
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 51 !of_property_read_u32(np, "clock-frequency", rate))
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 52 return 0;
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 53
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 54 timer_clk = of_clk_get_by_name(np, "timer");
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 55 if (IS_ERR(timer_clk))
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 56 return PTR_ERR(timer_clk);
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 57
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 58 ret = clk_prepare_enable(timer_clk);
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 59 if (ret)
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 60 return ret;
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 61
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 62 *rate = clk_get_rate(timer_clk);
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 63 if (!(*rate))
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 64 return -EINVAL;
>>
>> disable timer_clk if clk_get_rate() fails?
>>
>> a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 65
>> 5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 @66 return 0;
>> af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 67 }
>>
>> ---
>> 0-DAY CI Kernel Test Service, Intel Corporation
>> https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
>>
>
>
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: 'timer_clk' not released on lines: 64.
2021-03-22 12:21 ` Dinh Nguyen
@ 2021-03-22 12:22 ` Daniel Lezcano
-1 siblings, 0 replies; 10+ messages in thread
From: Daniel Lezcano @ 2021-03-22 12:22 UTC (permalink / raw)
To: Dinh Nguyen; +Cc: Dan Carpenter, kbuild, lkp, kbuild-all, linux-kernel
On 22/03/2021 13:21, Dinh Nguyen wrote:
> Hi Daniel,
>
> 2/21 4:58 AM, Daniel Lezcano wrote:
>>
>> Dinh,
>>
>> is it possible to have a look at this issue?
>>
>> Thanks
>>
>
> Sorry, but somehow I missed cc'ing you when I first sent the patch.
>
> I've resent it just now.
Ah, thanks!
-- D.
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: 'timer_clk' not released on lines: 64.
@ 2021-03-22 12:22 ` Daniel Lezcano
0 siblings, 0 replies; 10+ messages in thread
From: Daniel Lezcano @ 2021-03-22 12:22 UTC (permalink / raw)
To: kbuild-all
[-- Attachment #1: Type: text/plain, Size: 557 bytes --]
On 22/03/2021 13:21, Dinh Nguyen wrote:
> Hi Daniel,
>
> 2/21 4:58 AM, Daniel Lezcano wrote:
>>
>> Dinh,
>>
>> is it possible to have a look at this issue?
>>
>> Thanks
>>
>
> Sorry, but somehow I missed cc'ing you when I first sent the patch.
>
> I've resent it just now.
Ah, thanks!
-- D.
--
<http://www.linaro.org/> Linaro.org │ Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply [flat|nested] 10+ messages in thread
* drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: 'timer_clk' not released on lines: 64.
@ 2021-02-21 18:06 kernel test robot
0 siblings, 0 replies; 10+ messages in thread
From: kernel test robot @ 2021-02-21 18:06 UTC (permalink / raw)
To: kbuild
[-- Attachment #1: Type: text/plain, Size: 6903 bytes --]
CC: kbuild-all(a)lists.01.org
CC: linux-kernel(a)vger.kernel.org
TO: Dinh Nguyen <dinguyen@kernel.org>
CC: Daniel Lezcano <daniel.lezcano@linaro.org>
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master
head: 55f62bc873477dae2c45bbbc30b86cf3e0982f3b
commit: 5d9814df0aec56a638bbf20795abb4cfaf3cd331 clocksource/drivers/dw_apb_timer_of: Add error handling if no clock available
date: 3 months ago
:::::: branch date: 12 hours ago
:::::: commit date: 3 months ago
config: arm64-randconfig-m031-20210221 (attached as .config)
compiler: aarch64-linux-gcc (GCC) 9.3.0
If you fix the issue, kindly add following tag as appropriate
Reported-by: kernel test robot <lkp@intel.com>
Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
New smatch warnings:
drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: 'timer_clk' not released on lines: 64.
Old smatch warnings:
drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: '*base' not released on lines: 56,64.
vim +/timer_clk +66 drivers/clocksource/dw_apb_timer_of.c
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 16
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 17 static int __init timer_get_base_and_rate(struct device_node *np,
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 18 void __iomem **base, u32 *rate)
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 19 {
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 20 struct clk *timer_clk;
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 21 struct clk *pclk;
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 22 struct reset_control *rstc;
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 23 int ret;
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 24
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 25 *base = of_iomap(np, 0);
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 26
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 27 if (!*base)
2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 28 panic("Unable to map regs for %pOFn", np);
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 29
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 30 /*
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 31 * Reset the timer if the reset control is available, wiping
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 32 * out the state the firmware may have left it
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 33 */
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 34 rstc = of_reset_control_get(np, NULL);
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 35 if (!IS_ERR(rstc)) {
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 36 reset_control_assert(rstc);
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 37 reset_control_deassert(rstc);
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 38 }
1f174a1a2cdebc drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2018-09-17 39
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 40 /*
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 41 * Not all implementations use a periphal clock, so don't panic
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 42 * if it's not present
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 43 */
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 44 pclk = of_clk_get_by_name(np, "pclk");
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 45 if (!IS_ERR(pclk))
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 46 if (clk_prepare_enable(pclk))
2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 47 pr_warn("pclk for %pOFn is present, but could not be activated\n",
2a4849d2674b96 drivers/clocksource/dw_apb_timer_of.c Rob Herring 2018-08-27 48 np);
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 49
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 50 if (!of_property_read_u32(np, "clock-freq", rate) &&
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 51 !of_property_read_u32(np, "clock-frequency", rate))
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 52 return 0;
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 53
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 54 timer_clk = of_clk_get_by_name(np, "timer");
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 55 if (IS_ERR(timer_clk))
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 56 return PTR_ERR(timer_clk);
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 57
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 58 ret = clk_prepare_enable(timer_clk);
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 59 if (ret)
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 60 return ret;
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 61
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 62 *rate = clk_get_rate(timer_clk);
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 63 if (!(*rate))
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 64 return -EINVAL;
a8b447f2bbbba7 drivers/clocksource/dw_apb_timer_of.c Heiko Stuebner 2013-06-04 65
5d9814df0aec56 drivers/clocksource/dw_apb_timer_of.c Dinh Nguyen 2020-12-05 @66 return 0;
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 67 }
af75655c066621 arch/arm/mach-picoxcell/time.c Jamie Iles 2011-07-25 68
---
0-DAY CI Kernel Test Service, Intel Corporation
https://lists.01.org/hyperkitty/list/kbuild-all(a)lists.01.org
[-- Attachment #2: config.gz --]
[-- Type: application/gzip, Size: 27214 bytes --]
^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2021-03-22 12:22 UTC | newest]
Thread overview: 10+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-02-22 6:21 drivers/clocksource/dw_apb_timer_of.c:66 timer_get_base_and_rate() warn: 'timer_clk' not released on lines: 64 Dan Carpenter
2021-02-22 6:21 ` Dan Carpenter
2021-02-22 6:21 ` Dan Carpenter
2021-03-22 9:58 ` Daniel Lezcano
2021-03-22 9:58 ` Daniel Lezcano
2021-03-22 12:21 ` Dinh Nguyen
2021-03-22 12:21 ` Dinh Nguyen
2021-03-22 12:22 ` Daniel Lezcano
2021-03-22 12:22 ` Daniel Lezcano
-- strict thread matches above, loose matches on Subject: below --
2021-02-21 18:06 kernel test robot
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.