From: Paul Walmsley <paul@pwsan.com> To: Peter Ujfalusi <peter.ujfalusi@ti.com> Cc: Tony Lindgren <tony@atomide.com>, robh+dt@kernel.org, Tero Kristo <t-kristo@ti.com>, linux-omap@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH 10/11] ARM: DRA7: hwmod: Add data for McASP1/2/4/5/6/7/8 Date: Tue, 1 Mar 2016 17:01:25 +0000 (UTC) [thread overview] Message-ID: <alpine.DEB.2.02.1603011657260.14948@utopia.booyaka.com> (raw) In-Reply-To: <56D5C6B1.6040005@ti.com> [-- Attachment #1: Type: TEXT/PLAIN, Size: 1838 bytes --] Hi Péter, On Tue, 1 Mar 2016, Peter Ujfalusi wrote: > Hi Paul, > > On 03/01/2016 11:11 AM, Paul Walmsley wrote: > > Hi Péter > > > > A few questions: > > > > On Thu, 25 Feb 2016, Peter Ujfalusi wrote: > > > >> Add missing data for all McASP ports for the dra7 family > >> > >> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> > > > > 1. The patch doesn't set the HWMOD_OPT_CLKS_NEEDED flag for McASP1 and 2, > > but does set it for McASP4-8. Could you please confirm that this is > > intentional, and if so, why? > > All should have the HWMOD_OPT_CLKS_NEEDED as both fclk and ahclkx is treated > as functional clock and needs to be available in order to be able to access > McASP registers. > Sorry, I can only test McASP3 and somehow I overlooked this when copy-pasting > the data. OK > > 2. The patch sets HWMOD_SWSUP_SIDLE for McASP1 and 2, but doesn't set it > > for McASP4-8. Could you please confirm that this is intentional, and if > > so, why? The descriptions of the MODULEMODE fields in SPRUHZ6 look > > identical. > > I need to confirm this, but all McASP should have the same set of flags. OK. Looking at McASP3 data this morning, they probably shouldn't need HWMOD_SWSUP_SIDLE, but probably all need .modulemode = MODULEMODE_SWCTRL, > > 3. Can McASP1,2,3 bus-master onto the L3? If so, then there should be > > "dra7xx_mcasp1__l3_main_1"-style links to indicate this. > > I need to check this, but I don't think McASP1,2,3 can be bus-master onto L3. OK. When you get back, maybe doublecheck this - it looks to me from SPRUHZ6 that McASP1-3 have built-in DMA controllers. > I can resend the series next week as I'm out of office this week. That's fine. It's most likely v4.7 material at this point. - Paul
WARNING: multiple messages have this Message-ID (diff)
From: paul@pwsan.com (Paul Walmsley) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH 10/11] ARM: DRA7: hwmod: Add data for McASP1/2/4/5/6/7/8 Date: Tue, 1 Mar 2016 17:01:25 +0000 (UTC) [thread overview] Message-ID: <alpine.DEB.2.02.1603011657260.14948@utopia.booyaka.com> (raw) In-Reply-To: <56D5C6B1.6040005@ti.com> Hi P?ter, On Tue, 1 Mar 2016, Peter Ujfalusi wrote: > Hi Paul, > > On 03/01/2016 11:11 AM, Paul Walmsley wrote: > > Hi P?ter > > > > A few questions: > > > > On Thu, 25 Feb 2016, Peter Ujfalusi wrote: > > > >> Add missing data for all McASP ports for the dra7 family > >> > >> Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> > > > > 1. The patch doesn't set the HWMOD_OPT_CLKS_NEEDED flag for McASP1 and 2, > > but does set it for McASP4-8. Could you please confirm that this is > > intentional, and if so, why? > > All should have the HWMOD_OPT_CLKS_NEEDED as both fclk and ahclkx is treated > as functional clock and needs to be available in order to be able to access > McASP registers. > Sorry, I can only test McASP3 and somehow I overlooked this when copy-pasting > the data. OK > > 2. The patch sets HWMOD_SWSUP_SIDLE for McASP1 and 2, but doesn't set it > > for McASP4-8. Could you please confirm that this is intentional, and if > > so, why? The descriptions of the MODULEMODE fields in SPRUHZ6 look > > identical. > > I need to confirm this, but all McASP should have the same set of flags. OK. Looking at McASP3 data this morning, they probably shouldn't need HWMOD_SWSUP_SIDLE, but probably all need .modulemode = MODULEMODE_SWCTRL, > > 3. Can McASP1,2,3 bus-master onto the L3? If so, then there should be > > "dra7xx_mcasp1__l3_main_1"-style links to indicate this. > > I need to check this, but I don't think McASP1,2,3 can be bus-master onto L3. OK. When you get back, maybe doublecheck this - it looks to me from SPRUHZ6 that McASP1-3 have built-in DMA controllers. > I can resend the series next week as I'm out of office this week. That's fine. It's most likely v4.7 material at this point. - Paul
next prev parent reply other threads:[~2016-03-01 17:01 UTC|newest] Thread overview: 52+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-02-25 14:50 [PATCH 00/11] ARM: DTS/clk: DRA7 family: enable eDMA and audio updates Peter Ujfalusi 2016-02-25 14:50 ` Peter Ujfalusi 2016-02-25 14:50 ` Peter Ujfalusi 2016-02-25 14:50 ` [PATCH 01/11] ARM: DTS: dra7: Move the sDMA crossbar node under l4_cfg/scm Peter Ujfalusi 2016-02-25 14:50 ` Peter Ujfalusi 2016-02-25 14:50 ` Peter Ujfalusi 2016-02-25 14:50 ` [PATCH 02/11] ARM: DRA7: hwmod: Add data for eDMA tpcc, tptc0, tptc1 Peter Ujfalusi 2016-02-25 14:50 ` Peter Ujfalusi 2016-02-25 14:50 ` Peter Ujfalusi 2016-03-01 8:55 ` Paul Walmsley 2016-03-01 8:55 ` Paul Walmsley 2016-03-01 8:55 ` Paul Walmsley 2016-02-25 14:50 ` [PATCH 03/11] ARM: DTS: dra7: Enable eDMA Peter Ujfalusi 2016-02-25 14:50 ` Peter Ujfalusi 2016-02-25 14:50 ` Peter Ujfalusi 2016-02-25 14:50 ` [PATCH 04/11] ARM: DTS: dra7: Use eDMA and add DAT port address for McASP3 Peter Ujfalusi 2016-02-25 14:50 ` Peter Ujfalusi 2016-02-25 14:50 ` Peter Ujfalusi 2016-02-25 14:50 ` [PATCH 05/11] ARM: DTS: dra7-evm: Enable AFIFO use " Peter Ujfalusi 2016-02-25 14:50 ` Peter Ujfalusi 2016-02-25 14:50 ` Peter Ujfalusi 2016-02-25 14:50 ` [PATCH 06/11] ARM: DTS: dra72-evm: " Peter Ujfalusi 2016-02-25 14:50 ` Peter Ujfalusi 2016-02-25 14:50 ` Peter Ujfalusi 2016-02-25 14:50 ` [PATCH 07/11] ARM: DTS: am57xx-beagle-x15: Move clkout2 source selection to codec node Peter Ujfalusi 2016-02-25 14:50 ` Peter Ujfalusi 2016-02-25 14:50 ` Peter Ujfalusi 2016-02-25 14:50 ` [PATCH 08/11] ARM: DTS: am57xx-beagle-x15: Enable AFIFO use for McASP3 Peter Ujfalusi 2016-02-25 14:50 ` Peter Ujfalusi 2016-02-25 14:50 ` Peter Ujfalusi 2016-02-25 14:50 ` [PATCH 09/11] ARM: clk: dra7xx: Correct mcasp8_ahclkx_mux name Peter Ujfalusi 2016-02-25 14:50 ` Peter Ujfalusi 2016-02-25 14:50 ` Peter Ujfalusi 2016-02-25 14:50 ` [PATCH 10/11] ARM: DRA7: hwmod: Add data for McASP1/2/4/5/6/7/8 Peter Ujfalusi 2016-02-25 14:50 ` Peter Ujfalusi 2016-02-25 14:50 ` Peter Ujfalusi 2016-03-01 9:11 ` Paul Walmsley 2016-03-01 9:11 ` Paul Walmsley 2016-03-01 16:43 ` Peter Ujfalusi 2016-03-01 16:43 ` Peter Ujfalusi 2016-03-01 16:43 ` Peter Ujfalusi 2016-03-01 17:01 ` Paul Walmsley [this message] 2016-03-01 17:01 ` Paul Walmsley 2016-03-03 11:13 ` Peter Ujfalusi 2016-03-03 11:13 ` Peter Ujfalusi 2016-03-03 11:13 ` Peter Ujfalusi 2016-03-03 15:38 ` Paul Walmsley 2016-03-03 15:38 ` Paul Walmsley 2016-03-03 15:38 ` Paul Walmsley 2016-02-25 14:50 ` [PATCH 11/11] ARM: DTS: dra7: Add nodes " Peter Ujfalusi 2016-02-25 14:50 ` Peter Ujfalusi 2016-02-25 14:50 ` Peter Ujfalusi
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