[U-Boot] [PATCH RFT 0/3] spi-nor: spi-nor-ids: Fix 4 Byte addressing for n25q256 and n25q512*

[Vignesh Raghavendra <vigneshr@ti.com>]

On 24/09/19 2:13 PM, Simon Goldschmidt wrote:
> HI Vignesh,
> 
> On Tue, Sep 24, 2019 at 9:59 AM Vignesh Raghavendra <vigneshr@ti.com> wrote:
>>
>> Hi Simon,
>>
>> On 24/09/19 12:32 PM, Simon Goldschmidt wrote:
>>> Hi Vignesh,
>>>
>>> On Tue, Sep 24, 2019 at 7:55 AM Vignesh Raghavendra <vigneshr@ti.com> wrote:
>>>>
>>>> This series removes SPI_NOR_4B_OPCODES flags from legacy variants of
>>>> n25q256* and n25q512* and adds entries for newer variants of those
>>>> flashes that support 4 Byte opcodes.
>>>>
>>>> I don't have the flash devices. So its only compile tested.
>>>>
>>>> Ashish, Simon,
>>>>
>>>> I would greatly appreciate if you could test these patches and make sure
>>>> 4 Byte opcodes are being used. (Probably by enabling/adding prints to
>>>> cmd->opcode in spi_mem_exec_op() in drivers/spi/spi-mem.c
>>>
>>> As written in my last mail, I currently cannot get SFDP to work on my board:
>>> I keep getting 0xffdddfdf instead of 0x50444653 (SFDP_SIGNATURE).
>>>
>>
>> Did it ever work on your board ie did you test it when you were testing
>> my patches porting SPI NOR framework from kernel?
> 
> I tested that series on the EBV Socrates (socfpga_socrates), while this is our
> custom board. It is similar, but the flash chips are different. So
> unfortunately, I don't know if it ever worked...
> 
> I'll try to run this series on socfpga_socrates soon.
> 
>>
>> What's the controller driver? Cadence QSPI?
> 
> Yes.

What does the DT snippet for flash node looks like?
I think cadence QSPI is broken for SFDP if it has:

	spi-rx-bus-width = <4>;

Driver does:

       if (rx_width & SPI_RX_QUAD)
                /* Instruction and address at DQ0, data at DQ0-3. */
                rd_reg |= CQSPI_INST_TYPE_QUAD << CQSPI_REG_RD_INSTR_TYPE_DATA_LSB;

So, driver tries to execute SFDP command in 1-1-4 mode which is wrong. 
For now try setting spi-rx-bus-width to 1 and see if SFDP works (of course this not the fix)

I have patches[1] to convert this driver to implement spi-mem framework which should help in fixing this issues.
Will post them probably@the start of merge window after some more testing. If you have time, please give it a try

[1] https://github.com/r-vignesh/u-boot.git branch: cqspi

Regards
Vignesh


> 
> Regards,
> Simon
> 
>>
>> Regards
>> Vignesh
>>
>>> Any idea for a reason of that? That device I have here seems to be equipped
>>> with an MT25QL256ABA, but that should not be an issue, I think.
>>>
>>> Regards,
>>> Simon
>>>
>>>>
>>>> Euginey,
>>>>
>>>> Could you test this series on top of latest u-boot master and confirm
>>>> that your test cases still work?
>>>>
>>>> Regards
>>>> Vignesh
>>>>
>>>> Vignesh Raghavendra (3):
>>>>   spi-nor: spi-nor-ids: Disable SPI_NOR_4B_OPCODES for n25q512* and
>>>>     n25q256*
>>>>   spi-nor: spi-nor-ids: Rename mt25qu512a entry
>>>>   spi-nor: spi-nor-ids: Add entries for newer variants of n25q256* and
>>>>     n25q512*
>>>>
>>>>  drivers/mtd/spi/spi-nor-ids.c | 13 ++++++++-----
>>>>  1 file changed, 8 insertions(+), 5 deletions(-)
>>>>
>>>> --
>>>> 2.23.0
>>>>
>>
>> --
>> Regards
>> Vignesh

-- 
Regards
Vignesh