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From: Vignesh R <vigneshr@ti.com>
To: "Bean Huo (beanhuo)" <beanhuo@micron.com>,
	Boris Brezillon <bbrezillon@kernel.org>,
	"Tudor.Ambarus@microchip.com" <Tudor.Ambarus@microchip.com>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Marek Vasut <marek.vasut@gmail.com>
Subject: Re: [EXT] [PATCH v6 2/2] mtd: spi-nor: cadence-quadspi: Add support for Octal SPI controller
Date: Thu, 21 Feb 2019 18:41:21 +0530	[thread overview]
Message-ID: <b459f797-d24c-5501-76a0-057ec1df594d@ti.com> (raw)
In-Reply-To: <BYAPR08MB453362F4253ADA149D05315FDB7E0@BYAPR08MB4533.namprd08.prod.outlook.com>



On 21/02/19 4:11 PM, Bean Huo (beanhuo) wrote:
> Hi, Vignesh
> 
>>
>> Cadence OSPI controller IP supports Octal IO (x8 IO lines), It also has an
>> integrated PHY. IP register layout is very similar to existing QSPI IP except for
>> additional bits to support Octal and Octal DDR mode. Therefore, extend
>> current driver to support Octal mode. Only Octal SDR read (1-1-8)mode is
>> supported for now.
> 
> Does this your Cadence OSPI controller support 8-8-8 IO mode, if yes,
> Why not directly enable 8-8-8 mode? 
> 

Yes.. IP also supports 8-8-8 DTR mode. But supporting those modes
require enabling, configuring and calibrating OSPI PHY module within the
IP.
I am planning to do that, after moving driver over to spi-mem layer.


>> Tested with mt35xu512aba Octal flash on TI's AM654 EVM.
>>
>> Signed-off-by: Vignesh R <vigneshr@ti.com>
>> ______________________________________________________
>> Linux MTD discussion mailing list
>> http://lists.infradead.org/mailman/listinfo/linux-mtd/
> 
> ______________________________________________________
> Linux MTD discussion mailing list
> http://lists.infradead.org/mailman/listinfo/linux-mtd/
> 

-- 
Regards
Vignesh

WARNING: multiple messages have this Message-ID (diff)
From: Vignesh R <vigneshr@ti.com>
To: "Bean Huo (beanhuo)" <beanhuo@micron.com>,
	Boris Brezillon <bbrezillon@kernel.org>,
	"Tudor.Ambarus@microchip.com" <Tudor.Ambarus@microchip.com>
Cc: "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>,
	Rob Herring <robh+dt@kernel.org>,
	"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
	"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
	Marek Vasut <marek.vasut@gmail.com>
Subject: Re: [EXT] [PATCH v6 2/2] mtd: spi-nor: cadence-quadspi: Add support for Octal SPI controller
Date: Thu, 21 Feb 2019 18:41:21 +0530	[thread overview]
Message-ID: <b459f797-d24c-5501-76a0-057ec1df594d@ti.com> (raw)
In-Reply-To: <BYAPR08MB453362F4253ADA149D05315FDB7E0@BYAPR08MB4533.namprd08.prod.outlook.com>



On 21/02/19 4:11 PM, Bean Huo (beanhuo) wrote:
> Hi, Vignesh
> 
>>
>> Cadence OSPI controller IP supports Octal IO (x8 IO lines), It also has an
>> integrated PHY. IP register layout is very similar to existing QSPI IP except for
>> additional bits to support Octal and Octal DDR mode. Therefore, extend
>> current driver to support Octal mode. Only Octal SDR read (1-1-8)mode is
>> supported for now.
> 
> Does this your Cadence OSPI controller support 8-8-8 IO mode, if yes,
> Why not directly enable 8-8-8 mode? 
> 

Yes.. IP also supports 8-8-8 DTR mode. But supporting those modes
require enabling, configuring and calibrating OSPI PHY module within the
IP.
I am planning to do that, after moving driver over to spi-mem layer.


>> Tested with mt35xu512aba Octal flash on TI's AM654 EVM.
>>
>> Signed-off-by: Vignesh R <vigneshr@ti.com>
>> ______________________________________________________
>> Linux MTD discussion mailing list
>> http://lists.infradead.org/mailman/listinfo/linux-mtd/
> 
> ______________________________________________________
> Linux MTD discussion mailing list
> http://lists.infradead.org/mailman/listinfo/linux-mtd/
> 

-- 
Regards
Vignesh

______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

  parent reply	other threads:[~2019-02-21 13:11 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-12  8:38 [PATCH v6 0/2] cadence-quadspi: Add Octal mode support Vignesh R
2019-02-12  8:38 ` Vignesh R
2019-02-12  8:38 ` Vignesh R
2019-02-12  8:38 ` [PATCH v6 1/2] dt-bindings: cadence-quadspi: Add new compatible for AM654 SoC Vignesh R
2019-02-12  8:38   ` Vignesh R
2019-02-12  8:38   ` Vignesh R
2019-02-14 13:00   ` [v6, " Boris Brezillon
2019-02-14 13:00     ` Boris Brezillon
2019-02-12  8:38 ` [PATCH v6 2/2] mtd: spi-nor: cadence-quadspi: Add support for Octal SPI controller Vignesh R
2019-02-12  8:38   ` Vignesh R
2019-02-12  8:38   ` Vignesh R
2019-02-12  9:12   ` Tudor.Ambarus
2019-02-12  9:12     ` Tudor.Ambarus
2019-02-12  9:12     ` Tudor.Ambarus
2019-02-14 13:00   ` [v6, " Boris Brezillon
2019-02-14 13:00     ` Boris Brezillon
2019-02-21 10:41   ` [EXT] [PATCH v6 " Bean Huo (beanhuo)
2019-02-21 10:41     ` Bean Huo (beanhuo)
2019-02-21 10:50     ` Boris Brezillon
2019-02-21 10:50       ` Boris Brezillon
2019-02-21 13:11     ` Vignesh R [this message]
2019-02-21 13:11       ` Vignesh R

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