Re: [PATCH v5 09/19] arch_topology: Use the last level cache information from the cacheinfo

From: <Conor.Dooley@microchip.com>
To: <sudeep.holla@arm.com>, <linux-kernel@vger.kernel.org>
Cc: <gregkh@linuxfoundation.org>, <atishp@atishpatra.org>,
	<atishp@rivosinc.com>, <vincent.guittot@linaro.org>,
	<dietmar.eggemann@arm.com>, <wangqing@vivo.com>,
	<robh+dt@kernel.org>, <rafael@kernel.org>,
	<ionela.voinescu@arm.com>, <pierre.gondois@arm.com>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-riscv@lists.infradead.org>, <gshan@redhat.com>,
	<Valentina.FernandezAlanis@microchip.com>
Subject: Re: [PATCH v5 09/19] arch_topology: Use the last level cache information from the cacheinfo
Date: Wed, 29 Jun 2022 17:49:20 +0000	[thread overview]
Message-ID: <bb124e47-f866-e39e-0f76-dc468ce384c6@microchip.com> (raw)
In-Reply-To: <20220627165047.336669-10-sudeep.holla@arm.com>

On 27/06/2022 17:50, Sudeep Holla wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the content is safe
> 
> The cacheinfo is now initialised early along with the CPU topology
> initialisation. Instead of relying on the LLC ID information parsed
> separately only with ACPI PPTT elsewhere, migrate to use the similar
> information from the cacheinfo.
> 
> This is generic for both DT and ACPI systems. The ACPI LLC ID information
> parsed separately can now be removed from arch specific code.

Hey Sudeep,
I bisected broken boot on PolarFire SoC to this patch in next-20220629 :/
I suspect the issue is a missing "next-level-cache" in the the dt:
arch/riscv/boot/dts/microchip/mpfs.dtsi

Adding next-level-cache = <&cctrllr> fixes the boot.
Not sure what the resolution here is, old devicetrees are meant to keep
booting, right?

Thanks,
Conor.

> 
> Link: https://lore.kernel.org/r/20220621192034.3332546-10-sudeep.holla@arm.com

btw, why is this link in the patch? Why is a link to v4 relevant?
Links to both v4 and v5 exist in your for-linux-next branch.

Log:
git bisect start
# bad: [c4ef528bd006febc7de444d9775b28706d924f78] Add linux-next specific files for 20220629
git bisect bad c4ef528bd006febc7de444d9775b28706d924f78
# good: [b13baccc3850ca8b8cccbf8ed9912dbaa0fdf7f3] Linux 5.19-rc2
git bisect good b13baccc3850ca8b8cccbf8ed9912dbaa0fdf7f3
# bad: [95c758a8899c4e8825a35a62a6f31667991217f9] Merge branch 'drm-next' of git://git.freedesktop.org/git/drm/drm.git
git bisect bad 95c758a8899c4e8825a35a62a6f31667991217f9
# bad: [5cbb9aeefe0070b627cd5c5528e6e63701561d57] Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux.git
git bisect bad 5cbb9aeefe0070b627cd5c5528e6e63701561d57
# good: [2e6556bae3e453cf27f3fb9c6144080e2a61707e] Merge branch 'libnvdimm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/nvdimm/nvdimm.git
git bisect good 2e6556bae3e453cf27f3fb9c6144080e2a61707e
# good: [17efe76af33f6af09a821acce2e2e4e84819d381] Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap.git
git bisect good 17efe76af33f6af09a821acce2e2e4e84819d381
# good: [5aeeaf40d31288e8efa6ff2cbd952b13de077aa9] Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip.git
git bisect good 5aeeaf40d31288e8efa6ff2cbd952b13de077aa9
# bad: [f64dfa36b325d107d8aca9727410343bd86d37dc] Merge branch 'stm32-next' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32.git
git bisect bad f64dfa36b325d107d8aca9727410343bd86d37dc
# good: [89459a2aef8832f044c8fbbec54b46cec05156c8] Merge branch 'next/dt' into for-next
git bisect good 89459a2aef8832f044c8fbbec54b46cec05156c8
# bad: [24cdefc96973ff1a1f6702470ad91ab019e5fedd] Merge branch 'arch_topology' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into for-linux-next
git bisect bad 24cdefc96973ff1a1f6702470ad91ab019e5fedd
# bad: [0d71f236f0a1067aba7660d056a9061b5877bf52] arch_topology: Avoid parsing through all the CPUs once a outlier CPU is found
git bisect bad 0d71f236f0a1067aba7660d056a9061b5877bf52
# good: [be6ab2e822888b8d9983d670fdabc09d753fd24f] cacheinfo: Use cache identifiers to check if the caches are shared if available
git bisect good be6ab2e822888b8d9983d670fdabc09d753fd24f
# bad: [854a3115f9ec0b889015c6854fbc0c1d69a46e4a] arm64: topology: Remove redundant setting of llc_id in CPU topology
git bisect bad 854a3115f9ec0b889015c6854fbc0c1d69a46e4a
# bad: [3b23bb2573e65b11be8f4b89023296dee7f06c0b] arch_topology: Use the last level cache information from the cacheinfo
git bisect bad 3b23bb2573e65b11be8f4b89023296dee7f06c0b
# good: [2f7b757eb69df296554bd39b0b2b2f4da678c736] arch_topology: Add support to parse and detect cache attributes
git bisect good 2f7b757eb69df296554bd39b0b2b2f4da678c736
# first bad commit: [3b23bb2573e65b11be8f4b89023296dee7f06c0b] arch_topology: Use the last level cache information from the cacheinfo