From: Robin Murphy <robin.murphy@arm.com>
To: Christoph Hellwig <hch@lst.de>
Cc: Will Deacon <will@kernel.org>,
heikki.krogerus@linux.intel.com,
thomas.hellstrom@linux.intel.com, peterz@infradead.org,
benh@kernel.crashing.org, joonas.lahtinen@linux.intel.com,
dri-devel@lists.freedesktop.org, chris@chris-wilson.co.uk,
grant.likely@arm.com, paulus@samba.org,
Frank Rowand <frowand.list@gmail.com>,
mingo@kernel.org, Stefano Stabellini <sstabellini@kernel.org>,
Saravana Kannan <saravanak@google.com>,
mpe@ellerman.id.au,
"Rafael J . Wysocki" <rafael.j.wysocki@intel.com>,
Bartosz Golaszewski <bgolaszewski@baylibre.com>,
bskeggs@redhat.com, linux-pci@vger.kernel.org,
xen-devel@lists.xenproject.org,
Thierry Reding <treding@nvidia.com>,
intel-gfx@lists.freedesktop.org, matthew.auld@intel.com,
linux-devicetree <devicetree@vger.kernel.org>,
Jianxiong Gao <jxgao@google.com>, Daniel Vetter <daniel@ffwll.ch>,
Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
maarten.lankhorst@linux.intel.com, airlied@linux.ie,
Dan Williams <dan.j.williams@intel.com>,
linuxppc-dev@lists.ozlabs.org, jani.nikula@linux.intel.com,
Nathan Chancellor <nathan@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
rodrigo.vivi@intel.com, Bjorn Helgaas <bhelgaas@google.com>,
Claire Chang <tientzu@chromium.org>,
boris.ostrovsky@oracle.com,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
jgross@suse.com, Nicolas Boichat <drinkcat@chromium.org>,
Greg KH <gregkh@linuxfoundation.org>,
Randy Dunlap <rdunlap@infradead.org>,
Qian Cai <quic_qiancai@quicinc.com>,
lkml <linux-kernel@vger.kernel.org>,
"list@263.net:IOMMU DRIVERS" <iommu@lists.linux-foundation.org>,
Jim Quinlan <james.quinlan@broadcom.com>,
xypron.glpk@gmx.de, Tom Lendacky <thomas.lendacky@amd.com>,
bauerman@linux.ibm.com
Subject: Re: [PATCH v15 06/12] swiotlb: Use is_swiotlb_force_bounce for swiotlb data bouncing
Date: Tue, 6 Jul 2021 16:39:11 +0100 [thread overview]
Message-ID: <bb32d5a6-2b34-4524-e171-3e9f5f4d3a94@arm.com> (raw)
In-Reply-To: <20210706140513.GA26498@lst.de>
On 2021-07-06 15:05, Christoph Hellwig wrote:
> On Tue, Jul 06, 2021 at 03:01:04PM +0100, Robin Murphy wrote:
>> FWIW I was pondering the question of whether to do something along those
>> lines or just scrap the default assignment entirely, so since I hadn't got
>> round to saying that I've gone ahead and hacked up the alternative
>> (similarly untested) for comparison :)
>>
>> TBH I'm still not sure which one I prefer...
>
> Claire did implement something like your suggestion originally, but
> I don't really like it as it doesn't scale for adding multiple global
> pools, e.g. for the 64-bit addressable one for the various encrypted
> secure guest schemes.
Ah yes, that had slipped my mind, and it's a fair point indeed. Since
we're not concerned with a minimal fix for backports anyway I'm more
than happy to focus on Will's approach. Another thing is that that looks
to take us a quiet step closer to the possibility of dynamically
resizing a SWIOTLB pool, which is something that some of the hypervisor
protection schemes looking to build on top of this series may want to
explore at some point.
Robin.
WARNING: multiple messages have this Message-ID (diff)
From: Robin Murphy <robin.murphy@arm.com>
To: Christoph Hellwig <hch@lst.de>
Cc: Jim Quinlan <james.quinlan@broadcom.com>,
heikki.krogerus@linux.intel.com,
linux-devicetree <devicetree@vger.kernel.org>,
peterz@infradead.org, joonas.lahtinen@linux.intel.com,
dri-devel@lists.freedesktop.org, chris@chris-wilson.co.uk,
grant.likely@arm.com, paulus@samba.org,
Frank Rowand <frowand.list@gmail.com>,
mingo@kernel.org, Jianxiong Gao <jxgao@google.com>,
Stefano Stabellini <sstabellini@kernel.org>,
Saravana Kannan <saravanak@google.com>,
"Rafael J . Wysocki" <rafael.j.wysocki@intel.com>,
Bartosz Golaszewski <bgolaszewski@baylibre.com>,
bskeggs@redhat.com, linux-pci@vger.kernel.org,
xen-devel@lists.xenproject.org,
Thierry Reding <treding@nvidia.com>,
matthew.auld@intel.com, Nicolas Boichat <drinkcat@chromium.org>,
thomas.hellstrom@linux.intel.com, jgross@suse.com,
Will Deacon <will@kernel.org>,
Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
intel-gfx@lists.freedesktop.org,
maarten.lankhorst@linux.intel.com, jani.nikula@linux.intel.com,
Nathan Chancellor <nathan@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
rodrigo.vivi@intel.com, Bjorn Helgaas <bhelgaas@google.com>,
Claire Chang <tientzu@chromium.org>,
Dan Williams <dan.j.williams@intel.com>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
boris.ostrovsky@oracle.com, airlied@linux.ie,
Greg KH <gregkh@linuxfoundation.org>,
Randy Dunlap <rdunlap@infradead.org>,
Qian Cai <quic_qiancai@quicinc.com>,
lkml <linux-kernel@vger.kernel.org>,
"list@263.net:IOMMU DRIVERS" <iommu@lists.linux-foundation.org>,
Daniel Vetter <daniel@ffwll.ch>,
xypron.glpk@gmx.de, Tom Lendacky <thomas.lendacky@amd.com>,
linuxppc-dev@lists.ozlabs.org, bauerman@linux.ibm.com
Subject: Re: [PATCH v15 06/12] swiotlb: Use is_swiotlb_force_bounce for swiotlb data bouncing
Date: Tue, 6 Jul 2021 16:39:11 +0100 [thread overview]
Message-ID: <bb32d5a6-2b34-4524-e171-3e9f5f4d3a94@arm.com> (raw)
In-Reply-To: <20210706140513.GA26498@lst.de>
On 2021-07-06 15:05, Christoph Hellwig wrote:
> On Tue, Jul 06, 2021 at 03:01:04PM +0100, Robin Murphy wrote:
>> FWIW I was pondering the question of whether to do something along those
>> lines or just scrap the default assignment entirely, so since I hadn't got
>> round to saying that I've gone ahead and hacked up the alternative
>> (similarly untested) for comparison :)
>>
>> TBH I'm still not sure which one I prefer...
>
> Claire did implement something like your suggestion originally, but
> I don't really like it as it doesn't scale for adding multiple global
> pools, e.g. for the 64-bit addressable one for the various encrypted
> secure guest schemes.
Ah yes, that had slipped my mind, and it's a fair point indeed. Since
we're not concerned with a minimal fix for backports anyway I'm more
than happy to focus on Will's approach. Another thing is that that looks
to take us a quiet step closer to the possibility of dynamically
resizing a SWIOTLB pool, which is something that some of the hypervisor
protection schemes looking to build on top of this series may want to
explore at some point.
Robin.
WARNING: multiple messages have this Message-ID (diff)
From: Robin Murphy <robin.murphy@arm.com>
To: Christoph Hellwig <hch@lst.de>
Cc: Jim Quinlan <james.quinlan@broadcom.com>,
heikki.krogerus@linux.intel.com,
linux-devicetree <devicetree@vger.kernel.org>,
peterz@infradead.org, benh@kernel.crashing.org,
joonas.lahtinen@linux.intel.com, dri-devel@lists.freedesktop.org,
chris@chris-wilson.co.uk, grant.likely@arm.com, paulus@samba.org,
Frank Rowand <frowand.list@gmail.com>,
mingo@kernel.org, Jianxiong Gao <jxgao@google.com>,
Stefano Stabellini <sstabellini@kernel.org>,
Saravana Kannan <saravanak@google.com>,
mpe@ellerman.id.au,
"Rafael J . Wysocki" <rafael.j.wysocki@intel.com>,
Bartosz Golaszewski <bgolaszewski@baylibre.com>,
bskeggs@redhat.com, linux-pci@vger.kernel.org,
xen-devel@lists.xenproject.org,
Thierry Reding <treding@nvidia.com>,
matthew.auld@intel.com, Nicolas Boichat <drinkcat@chromium.org>,
thomas.hellstrom@linux.intel.com, jgross@suse.com,
Will Deacon <will@kernel.org>,
Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
intel-gfx@lists.freedesktop.org,
maarten.lankhorst@linux.intel.com, jani.nikula@linux.intel.com,
Nathan Chancellor <nathan@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
rodrigo.vivi@intel.com, Bjorn Helgaas <bhelgaas@google.com>,
Claire Chang <tientzu@chromium.org>,
Dan Williams <dan.j.williams@intel.com>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
boris.ostrovsky@oracle.com, airlied@linux.ie,
Greg KH <gregkh@linuxfoundation.org>,
Randy Dunlap <rdunlap@infradead.org>,
Qian Cai <quic_qiancai@quicinc.com>,
lkml <linux-kernel@vger.kernel.org>,
"list@263.net:IOMMU DRIVERS" <iommu@lists.linux-foundation.org>,
Daniel Vetter <daniel@ffwll.ch>,
xypron.glpk@gmx.de, Tom Lendacky <thomas.lendacky@amd.com>,
linuxppc-dev@lists.ozlabs.org, bauerman@linux.ibm.com
Subject: Re: [PATCH v15 06/12] swiotlb: Use is_swiotlb_force_bounce for swiotlb data bouncing
Date: Tue, 6 Jul 2021 16:39:11 +0100 [thread overview]
Message-ID: <bb32d5a6-2b34-4524-e171-3e9f5f4d3a94@arm.com> (raw)
In-Reply-To: <20210706140513.GA26498@lst.de>
On 2021-07-06 15:05, Christoph Hellwig wrote:
> On Tue, Jul 06, 2021 at 03:01:04PM +0100, Robin Murphy wrote:
>> FWIW I was pondering the question of whether to do something along those
>> lines or just scrap the default assignment entirely, so since I hadn't got
>> round to saying that I've gone ahead and hacked up the alternative
>> (similarly untested) for comparison :)
>>
>> TBH I'm still not sure which one I prefer...
>
> Claire did implement something like your suggestion originally, but
> I don't really like it as it doesn't scale for adding multiple global
> pools, e.g. for the 64-bit addressable one for the various encrypted
> secure guest schemes.
Ah yes, that had slipped my mind, and it's a fair point indeed. Since
we're not concerned with a minimal fix for backports anyway I'm more
than happy to focus on Will's approach. Another thing is that that looks
to take us a quiet step closer to the possibility of dynamically
resizing a SWIOTLB pool, which is something that some of the hypervisor
protection schemes looking to build on top of this series may want to
explore at some point.
Robin.
_______________________________________________
iommu mailing list
iommu@lists.linux-foundation.org
https://lists.linuxfoundation.org/mailman/listinfo/iommu
WARNING: multiple messages have this Message-ID (diff)
From: Robin Murphy <robin.murphy@arm.com>
To: Christoph Hellwig <hch@lst.de>
Cc: Jim Quinlan <james.quinlan@broadcom.com>,
heikki.krogerus@linux.intel.com,
linux-devicetree <devicetree@vger.kernel.org>,
peterz@infradead.org, dri-devel@lists.freedesktop.org,
chris@chris-wilson.co.uk, grant.likely@arm.com, paulus@samba.org,
Frank Rowand <frowand.list@gmail.com>,
mingo@kernel.org, Jianxiong Gao <jxgao@google.com>,
Stefano Stabellini <sstabellini@kernel.org>,
Saravana Kannan <saravanak@google.com>,
mpe@ellerman.id.au,
"Rafael J . Wysocki" <rafael.j.wysocki@intel.com>,
Bartosz Golaszewski <bgolaszewski@baylibre.com>,
bskeggs@redhat.com, linux-pci@vger.kernel.org,
xen-devel@lists.xenproject.org,
Thierry Reding <treding@nvidia.com>,
matthew.auld@intel.com, Nicolas Boichat <drinkcat@chromium.org>,
thomas.hellstrom@linux.intel.com, jgross@suse.com,
Will Deacon <will@kernel.org>,
Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
intel-gfx@lists.freedesktop.org,
Nathan Chancellor <nathan@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
rodrigo.vivi@intel.com, Bjorn Helgaas <bhelgaas@google.com>,
Claire Chang <tientzu@chromium.org>,
Dan Williams <dan.j.williams@intel.com>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
boris.ostrovsky@oracle.com, airlied@linux.ie,
Greg KH <gregkh@linuxfoundation.org>,
Randy Dunlap <rdunlap@infradead.org>,
Qian Cai <quic_qiancai@quicinc.com>,
lkml <linux-kernel@vger.kernel.org>,
"list@263.net:IOMMU DRIVERS" <iommu@lists.linux-foundation.org>,
xypron.glpk@gmx.de, Tom Lendacky <thomas.lendacky@amd.com>,
linuxppc-dev@lists.ozlabs.org, bauerman@linux.ibm.com
Subject: Re: [PATCH v15 06/12] swiotlb: Use is_swiotlb_force_bounce for swiotlb data bouncing
Date: Tue, 6 Jul 2021 16:39:11 +0100 [thread overview]
Message-ID: <bb32d5a6-2b34-4524-e171-3e9f5f4d3a94@arm.com> (raw)
In-Reply-To: <20210706140513.GA26498@lst.de>
On 2021-07-06 15:05, Christoph Hellwig wrote:
> On Tue, Jul 06, 2021 at 03:01:04PM +0100, Robin Murphy wrote:
>> FWIW I was pondering the question of whether to do something along those
>> lines or just scrap the default assignment entirely, so since I hadn't got
>> round to saying that I've gone ahead and hacked up the alternative
>> (similarly untested) for comparison :)
>>
>> TBH I'm still not sure which one I prefer...
>
> Claire did implement something like your suggestion originally, but
> I don't really like it as it doesn't scale for adding multiple global
> pools, e.g. for the 64-bit addressable one for the various encrypted
> secure guest schemes.
Ah yes, that had slipped my mind, and it's a fair point indeed. Since
we're not concerned with a minimal fix for backports anyway I'm more
than happy to focus on Will's approach. Another thing is that that looks
to take us a quiet step closer to the possibility of dynamically
resizing a SWIOTLB pool, which is something that some of the hypervisor
protection schemes looking to build on top of this series may want to
explore at some point.
Robin.
WARNING: multiple messages have this Message-ID (diff)
From: Robin Murphy <robin.murphy@arm.com>
To: Christoph Hellwig <hch@lst.de>
Cc: Jim Quinlan <james.quinlan@broadcom.com>,
heikki.krogerus@linux.intel.com,
linux-devicetree <devicetree@vger.kernel.org>,
peterz@infradead.org, benh@kernel.crashing.org,
dri-devel@lists.freedesktop.org, chris@chris-wilson.co.uk,
grant.likely@arm.com, paulus@samba.org,
Frank Rowand <frowand.list@gmail.com>,
mingo@kernel.org, Jianxiong Gao <jxgao@google.com>,
Stefano Stabellini <sstabellini@kernel.org>,
Saravana Kannan <saravanak@google.com>,
mpe@ellerman.id.au,
"Rafael J . Wysocki" <rafael.j.wysocki@intel.com>,
Bartosz Golaszewski <bgolaszewski@baylibre.com>,
bskeggs@redhat.com, linux-pci@vger.kernel.org,
xen-devel@lists.xenproject.org,
Thierry Reding <treding@nvidia.com>,
matthew.auld@intel.com, Nicolas Boichat <drinkcat@chromium.org>,
thomas.hellstrom@linux.intel.com, jgross@suse.com,
Will Deacon <will@kernel.org>,
Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>,
intel-gfx@lists.freedesktop.org,
Nathan Chancellor <nathan@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Bjorn Helgaas <bhelgaas@google.com>,
Claire Chang <tientzu@chromium.org>,
Dan Williams <dan.j.williams@intel.com>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
boris.ostrovsky@oracle.com, airlied@linux.ie,
Greg KH <gregkh@linuxfoundation.org>,
Randy Dunlap <rdunlap@infradead.org>,
Qian Cai <quic_qiancai@quicinc.com>,
lkml <linux-kernel@vger.kernel.org>,
"list@263.net:IOMMU DRIVERS" <iommu@lists.linux-foundation.org>,
xypron.glpk@gmx.de, Tom Lendacky <thomas.lendacky@amd.com>,
linuxppc-dev@lists.ozlabs.org, bauerman@linux.ibm.com
Subject: Re: [Intel-gfx] [PATCH v15 06/12] swiotlb: Use is_swiotlb_force_bounce for swiotlb data bouncing
Date: Tue, 6 Jul 2021 16:39:11 +0100 [thread overview]
Message-ID: <bb32d5a6-2b34-4524-e171-3e9f5f4d3a94@arm.com> (raw)
In-Reply-To: <20210706140513.GA26498@lst.de>
On 2021-07-06 15:05, Christoph Hellwig wrote:
> On Tue, Jul 06, 2021 at 03:01:04PM +0100, Robin Murphy wrote:
>> FWIW I was pondering the question of whether to do something along those
>> lines or just scrap the default assignment entirely, so since I hadn't got
>> round to saying that I've gone ahead and hacked up the alternative
>> (similarly untested) for comparison :)
>>
>> TBH I'm still not sure which one I prefer...
>
> Claire did implement something like your suggestion originally, but
> I don't really like it as it doesn't scale for adding multiple global
> pools, e.g. for the 64-bit addressable one for the various encrypted
> secure guest schemes.
Ah yes, that had slipped my mind, and it's a fair point indeed. Since
we're not concerned with a minimal fix for backports anyway I'm more
than happy to focus on Will's approach. Another thing is that that looks
to take us a quiet step closer to the possibility of dynamically
resizing a SWIOTLB pool, which is something that some of the hypervisor
protection schemes looking to build on top of this series may want to
explore at some point.
Robin.
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2021-07-06 15:39 UTC|newest]
Thread overview: 245+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-06-24 15:55 [PATCH v15 00/12] Restricted DMA Claire Chang
2021-06-24 15:55 ` [Intel-gfx] " Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` [PATCH v15 01/12] swiotlb: Refactor swiotlb init functions Claire Chang
2021-06-24 15:55 ` [Intel-gfx] " Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` [PATCH v15 02/12] swiotlb: Refactor swiotlb_create_debugfs Claire Chang
2021-06-24 15:55 ` [Intel-gfx] " Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` [PATCH v15 03/12] swiotlb: Set dev->dma_io_tlb_mem to the swiotlb pool used Claire Chang
2021-06-24 15:55 ` [Intel-gfx] " Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` [PATCH v15 04/12] swiotlb: Update is_swiotlb_buffer to add a struct device argument Claire Chang
2021-06-24 15:55 ` [Intel-gfx] " Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` [PATCH v15 05/12] swiotlb: Update is_swiotlb_active " Claire Chang
2021-06-24 15:55 ` [Intel-gfx] " Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` [PATCH v15 06/12] swiotlb: Use is_swiotlb_force_bounce for swiotlb data bouncing Claire Chang
2021-06-24 15:55 ` [Intel-gfx] " Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-30 1:43 ` Nathan Chancellor
2021-06-30 1:43 ` [Intel-gfx] " Nathan Chancellor
2021-06-30 1:43 ` Nathan Chancellor
2021-06-30 1:43 ` Nathan Chancellor
2021-06-30 1:43 ` Nathan Chancellor
2021-06-30 9:17 ` Claire Chang
2021-06-30 9:17 ` Claire Chang
2021-06-30 9:17 ` [Intel-gfx] " Claire Chang
2021-06-30 9:17 ` Claire Chang
2021-06-30 9:17 ` Claire Chang
2021-06-30 9:17 ` Claire Chang
2021-06-30 11:43 ` Will Deacon
2021-06-30 11:43 ` [Intel-gfx] " Will Deacon
2021-06-30 11:43 ` Will Deacon
2021-06-30 11:43 ` Will Deacon
2021-06-30 11:43 ` Will Deacon
2021-06-30 15:56 ` Nathan Chancellor
2021-06-30 15:56 ` [Intel-gfx] " Nathan Chancellor
2021-06-30 15:56 ` Nathan Chancellor
2021-06-30 15:56 ` Nathan Chancellor
2021-06-30 15:56 ` Nathan Chancellor
2021-07-01 7:40 ` Will Deacon
2021-07-01 7:40 ` [Intel-gfx] " Will Deacon
2021-07-01 7:40 ` Will Deacon
2021-07-01 7:40 ` Will Deacon
2021-07-01 7:40 ` Will Deacon
2021-07-01 7:52 ` Nathan Chancellor
2021-07-01 7:52 ` [Intel-gfx] " Nathan Chancellor
2021-07-01 7:52 ` Nathan Chancellor
2021-07-01 7:52 ` Nathan Chancellor
2021-07-01 7:52 ` Nathan Chancellor
2021-07-02 13:58 ` Will Deacon
2021-07-02 13:58 ` [Intel-gfx] " Will Deacon
2021-07-02 13:58 ` Will Deacon
2021-07-02 13:58 ` Will Deacon
2021-07-02 13:58 ` Will Deacon
2021-07-02 15:13 ` Robin Murphy
2021-07-02 15:13 ` [Intel-gfx] " Robin Murphy
2021-07-02 15:13 ` Robin Murphy
2021-07-02 15:13 ` Robin Murphy
2021-07-02 15:13 ` Robin Murphy
2021-07-03 5:55 ` Nathan Chancellor
2021-07-03 5:55 ` [Intel-gfx] " Nathan Chancellor
2021-07-03 5:55 ` Nathan Chancellor
2021-07-03 5:55 ` Nathan Chancellor
2021-07-03 5:55 ` Nathan Chancellor
2021-07-05 7:29 ` Claire Chang
2021-07-05 7:29 ` Claire Chang
2021-07-05 7:29 ` [Intel-gfx] " Claire Chang
2021-07-05 7:29 ` Claire Chang
2021-07-05 7:29 ` Claire Chang
2021-07-05 7:29 ` Claire Chang
2021-07-05 18:25 ` Nathan Chancellor
2021-07-05 18:25 ` [Intel-gfx] " Nathan Chancellor
2021-07-05 18:25 ` Nathan Chancellor
2021-07-05 18:25 ` Nathan Chancellor
2021-07-05 18:25 ` Nathan Chancellor
2021-07-05 19:03 ` Will Deacon
2021-07-05 19:03 ` [Intel-gfx] " Will Deacon
2021-07-05 19:03 ` Will Deacon
2021-07-05 19:03 ` Will Deacon
2021-07-05 19:03 ` Will Deacon
2021-07-06 4:48 ` Christoph Hellwig
2021-07-06 4:48 ` [Intel-gfx] " Christoph Hellwig
2021-07-06 4:48 ` Christoph Hellwig
2021-07-06 4:48 ` Christoph Hellwig
2021-07-06 13:24 ` Will Deacon
2021-07-06 13:24 ` [Intel-gfx] " Will Deacon
2021-07-06 13:24 ` Will Deacon
2021-07-06 13:24 ` Will Deacon
2021-07-06 13:24 ` Will Deacon
2021-07-06 14:01 ` Robin Murphy
2021-07-06 14:01 ` [Intel-gfx] " Robin Murphy
2021-07-06 14:01 ` Robin Murphy
2021-07-06 14:01 ` Robin Murphy
2021-07-06 14:01 ` Robin Murphy
2021-07-06 14:05 ` Christoph Hellwig
2021-07-06 14:05 ` [Intel-gfx] " Christoph Hellwig
2021-07-06 14:05 ` Christoph Hellwig
2021-07-06 14:05 ` Christoph Hellwig
2021-07-06 14:46 ` Konrad Rzeszutek Wilk
2021-07-06 14:46 ` [Intel-gfx] " Konrad Rzeszutek Wilk
2021-07-06 14:46 ` Konrad Rzeszutek Wilk
2021-07-06 14:46 ` Konrad Rzeszutek Wilk
2021-07-06 14:46 ` Konrad Rzeszutek Wilk
2021-07-06 16:57 ` Will Deacon
2021-07-06 16:57 ` [Intel-gfx] " Will Deacon
2021-07-06 16:57 ` Will Deacon
2021-07-06 16:57 ` Will Deacon
2021-07-06 16:57 ` Will Deacon
2021-07-06 16:59 ` Konrad Rzeszutek Wilk
2021-07-06 16:59 ` [Intel-gfx] " Konrad Rzeszutek Wilk
2021-07-06 16:59 ` Konrad Rzeszutek Wilk
2021-07-06 16:59 ` Konrad Rzeszutek Wilk
2021-07-06 16:59 ` Konrad Rzeszutek Wilk
2021-07-12 13:56 ` Will Deacon
2021-07-12 13:56 ` [Intel-gfx] " Will Deacon
2021-07-12 13:56 ` Will Deacon
2021-07-12 13:56 ` Will Deacon
2021-07-12 13:56 ` Will Deacon
2021-07-14 0:06 ` Konrad Rzeszutek Wilk
2021-07-14 0:06 ` [Intel-gfx] " Konrad Rzeszutek Wilk
2021-07-14 0:06 ` Konrad Rzeszutek Wilk
2021-07-14 0:06 ` Konrad Rzeszutek Wilk
2021-07-14 0:06 ` Konrad Rzeszutek Wilk
2021-07-06 15:39 ` Robin Murphy [this message]
2021-07-06 15:39 ` [Intel-gfx] " Robin Murphy
2021-07-06 15:39 ` Robin Murphy
2021-07-06 15:39 ` Robin Murphy
2021-07-06 15:39 ` Robin Murphy
2021-07-06 17:06 ` Will Deacon
2021-07-06 17:06 ` [Intel-gfx] " Will Deacon
2021-07-06 17:06 ` Will Deacon
2021-07-06 17:06 ` Will Deacon
2021-07-06 17:06 ` Will Deacon
2021-07-06 19:14 ` Nathan Chancellor
2021-07-06 19:14 ` [Intel-gfx] " Nathan Chancellor
2021-07-06 19:14 ` Nathan Chancellor
2021-07-06 19:14 ` Nathan Chancellor
2021-07-06 19:14 ` Nathan Chancellor
2021-07-08 16:44 ` Will Deacon
2021-07-08 16:44 ` [Intel-gfx] " Will Deacon
2021-07-08 16:44 ` Will Deacon
2021-07-08 16:44 ` Will Deacon
2021-07-08 16:44 ` Will Deacon
2021-06-24 15:55 ` [PATCH v15 07/12] swiotlb: Move alloc_size to swiotlb_find_slots Claire Chang
2021-06-24 15:55 ` [Intel-gfx] " Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` [PATCH v15 08/12] swiotlb: Refactor swiotlb_tbl_unmap_single Claire Chang
2021-06-24 15:55 ` [Intel-gfx] " Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` [PATCH v15 09/12] swiotlb: Add restricted DMA alloc/free support Claire Chang
2021-06-24 15:55 ` [Intel-gfx] " Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` [PATCH v15 10/12] swiotlb: Add restricted DMA pool initialization Claire Chang
2021-06-24 15:55 ` [Intel-gfx] " Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-08-24 14:26 ` Guenter Roeck
2021-08-24 14:26 ` Guenter Roeck
2021-08-24 14:26 ` [Intel-gfx] " Guenter Roeck
2021-08-24 14:26 ` Guenter Roeck
2021-08-27 3:50 ` Claire Chang
2021-08-27 3:50 ` Claire Chang
2021-08-27 3:50 ` [Intel-gfx] " Claire Chang
2021-08-27 3:50 ` Claire Chang
2021-08-27 3:50 ` Claire Chang
2021-08-27 3:50 ` Claire Chang
2021-08-27 6:58 ` Andy Shevchenko
2021-08-27 6:58 ` Andy Shevchenko
2021-08-27 6:58 ` [Intel-gfx] " Andy Shevchenko
2021-08-27 6:58 ` Andy Shevchenko
2021-08-27 6:58 ` Andy Shevchenko
2021-06-24 15:55 ` [PATCH v15 11/12] dt-bindings: of: Add restricted DMA pool Claire Chang
2021-06-24 15:55 ` [Intel-gfx] " Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` [PATCH v15 12/12] of: Add plumbing for " Claire Chang
2021-06-24 15:55 ` [Intel-gfx] " Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-06-24 15:55 ` Claire Chang
2021-07-02 3:08 ` Guenter Roeck
2021-07-02 3:08 ` [Intel-gfx] " Guenter Roeck
2021-07-02 3:08 ` Guenter Roeck
2021-07-02 3:08 ` Guenter Roeck
2021-07-02 3:08 ` Guenter Roeck
2021-07-02 11:39 ` Robin Murphy
2021-07-02 11:39 ` [Intel-gfx] " Robin Murphy
2021-07-02 11:39 ` Robin Murphy
2021-07-02 11:39 ` Robin Murphy
2021-07-02 11:39 ` Robin Murphy
2021-07-02 13:18 ` Will Deacon
2021-07-02 13:18 ` [Intel-gfx] " Will Deacon
2021-07-02 13:18 ` Will Deacon
2021-07-02 13:18 ` Will Deacon
2021-07-02 13:18 ` Will Deacon
2021-07-02 13:48 ` Guenter Roeck
2021-07-02 13:48 ` [Intel-gfx] " Guenter Roeck
2021-07-02 13:48 ` Guenter Roeck
2021-07-02 13:48 ` Guenter Roeck
2021-07-02 13:48 ` Guenter Roeck
2021-06-24 16:42 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Restricted DMA Patchwork
2021-06-24 19:19 ` [PATCH v15 00/12] " Konrad Rzeszutek Wilk
2021-06-24 19:19 ` [Intel-gfx] " Konrad Rzeszutek Wilk
2021-06-24 19:19 ` Konrad Rzeszutek Wilk
2021-06-24 19:19 ` Konrad Rzeszutek Wilk
2021-06-24 19:19 ` Konrad Rzeszutek Wilk
2021-06-25 0:41 ` Claire Chang
2021-06-25 0:41 ` Claire Chang
2021-06-25 0:41 ` [Intel-gfx] " Claire Chang
2021-06-25 0:41 ` Claire Chang
2021-06-25 0:41 ` Claire Chang
2021-06-25 0:41 ` Claire Chang
2021-06-25 12:30 ` Will Deacon
2021-06-25 12:30 ` [Intel-gfx] " Will Deacon
2021-06-25 12:30 ` Will Deacon
2021-06-25 12:30 ` Will Deacon
2021-06-25 12:30 ` Will Deacon
2021-07-02 15:48 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Restricted DMA (rev2) Patchwork
2021-07-05 7:57 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Restricted DMA (rev3) Patchwork
2021-07-06 18:57 ` [Intel-gfx] ✗ Fi.CI.BUILD: failure for Restricted DMA (rev5) Patchwork
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