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* [U-Boot] [PATCH v2 1/2] mvebu: neta: align DMA buffers
@ 2018-05-30  5:52 Baruch Siach
  2018-05-30  5:52 ` [U-Boot] [PATCH v2 2/2] net: ping,arp: Fix cache alignment issues Baruch Siach
                   ` (2 more replies)
  0 siblings, 3 replies; 5+ messages in thread
From: Baruch Siach @ 2018-05-30  5:52 UTC (permalink / raw)
  To: u-boot

From: Jon Nettleton <jon@solid-run.com>

This makes sure the DMA buffers are properly aligned for the
hardware.

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
v2:
  * Change BUG_ON to WARN_ON (Stefan Roese)

  * Add Stefan's review tag
---
 drivers/net/mvneta.c | 18 ++++++++++++------
 1 file changed, 12 insertions(+), 6 deletions(-)

diff --git a/drivers/net/mvneta.c b/drivers/net/mvneta.c
index 7036b517b445..45e5eda95522 100644
--- a/drivers/net/mvneta.c
+++ b/drivers/net/mvneta.c
@@ -1025,6 +1025,8 @@ static int mvneta_rxq_init(struct mvneta_port *pp,
 	if (rxq->descs == NULL)
 		return -ENOMEM;
 
+	WARN_ON(rxq->descs != PTR_ALIGN(rxq->descs, ARCH_DMA_MINALIGN));
+
 	rxq->last_desc = rxq->size - 1;
 
 	/* Set Rx descriptors queue starting address */
@@ -1061,6 +1063,8 @@ static int mvneta_txq_init(struct mvneta_port *pp,
 	if (txq->descs == NULL)
 		return -ENOMEM;
 
+	WARN_ON(txq->descs != PTR_ALIGN(txq->descs, ARCH_DMA_MINALIGN));
+
 	txq->last_desc = txq->size - 1;
 
 	/* Set maximum bandwidth for enabled TXQs */
@@ -1694,18 +1698,20 @@ static int mvneta_probe(struct udevice *dev)
 	 * be active. Make this area DMA safe by disabling the D-cache
 	 */
 	if (!buffer_loc.tx_descs) {
+		u32 size;
+
 		/* Align buffer area for descs and rx_buffers to 1MiB */
 		bd_space = memalign(1 << MMU_SECTION_SHIFT, BD_SPACE);
 		mmu_set_region_dcache_behaviour((phys_addr_t)bd_space, BD_SPACE,
 						DCACHE_OFF);
 		buffer_loc.tx_descs = (struct mvneta_tx_desc *)bd_space;
+		size = roundup(MVNETA_MAX_TXD * sizeof(struct mvneta_tx_desc),
+				ARCH_DMA_MINALIGN);
 		buffer_loc.rx_descs = (struct mvneta_rx_desc *)
-			((phys_addr_t)bd_space +
-			 MVNETA_MAX_TXD * sizeof(struct mvneta_tx_desc));
-		buffer_loc.rx_buffers = (phys_addr_t)
-			(bd_space +
-			 MVNETA_MAX_TXD * sizeof(struct mvneta_tx_desc) +
-			 MVNETA_MAX_RXD * sizeof(struct mvneta_rx_desc));
+			((phys_addr_t)bd_space + size);
+		size += roundup(MVNETA_MAX_RXD * sizeof(struct mvneta_rx_desc),
+				ARCH_DMA_MINALIGN);
+		buffer_loc.rx_buffers = (phys_addr_t)(bd_space + size);
 	}
 
 	pp->base = (void __iomem *)pdata->iobase;
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [U-Boot] [PATCH v2 2/2] net: ping,arp: Fix cache alignment issues
  2018-05-30  5:52 [U-Boot] [PATCH v2 1/2] mvebu: neta: align DMA buffers Baruch Siach
@ 2018-05-30  5:52 ` Baruch Siach
  2018-06-08 20:55   ` [U-Boot] [PATCH v2 2/2] net: ping, arp: " Joe Hershberger
  2018-06-08 20:56 ` [U-Boot] [PATCH v2 1/2] mvebu: neta: align DMA buffers Joe Hershberger
  2018-06-13 19:02 ` [U-Boot] " Joe Hershberger
  2 siblings, 1 reply; 5+ messages in thread
From: Baruch Siach @ 2018-05-30  5:52 UTC (permalink / raw)
  To: u-boot

From: Jon Nettleton <jon@solid-run.com>

Both ping_receive and arp_receive would transmit a received packet
back out using its original point.  This causes problems with
certain network cards that add a custom header to the packet.
Specifically the mvneta driver for the Armada series boards has
a 2 byte Marvell header that is bypassed and passed along to
the system, but that 2 byte offset now causes a misalignment if
it is attempted to be sent back out.

Rather than changing the driver to memcpy all the received packets
to cache aligned buffers we instead change the two offending
network commands to copy the packet into a cache aligned net_tx_packet
before sending it back out.

This fixes occasional messages like:

  CACHE: Misaligned operation at range [3fc01082, 3fc010c2]

Reviewed-by: Stefan Roese <sr@denx.de>
Signed-off-by: Jon Nettleton <jon@solid-run.com>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
v2: Add Stefan's review tag
---
 net/arp.c  | 3 ++-
 net/ping.c | 3 ++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/net/arp.c b/net/arp.c
index 990b771c9211..b8a71684cd76 100644
--- a/net/arp.c
+++ b/net/arp.c
@@ -182,7 +182,8 @@ void arp_receive(struct ethernet_hdr *et, struct ip_udp_hdr *ip, int len)
 		    (net_read_ip(&arp->ar_spa).s_addr & net_netmask.s_addr))
 			udelay(5000);
 #endif
-		net_send_packet((uchar *)et, eth_hdr_size + ARP_HDR_SIZE);
+		memcpy(net_tx_packet, et, eth_hdr_size + ARP_HDR_SIZE);
+		net_send_packet(net_tx_packet, eth_hdr_size + ARP_HDR_SIZE);
 		return;
 
 	case ARPOP_REPLY:		/* arp reply */
diff --git a/net/ping.c b/net/ping.c
index 5464f2f785fe..3e5461a36a02 100644
--- a/net/ping.c
+++ b/net/ping.c
@@ -107,7 +107,8 @@ void ping_receive(struct ethernet_hdr *et, struct ip_udp_hdr *ip, int len)
 		icmph->type = ICMP_ECHO_REPLY;
 		icmph->checksum = 0;
 		icmph->checksum = compute_ip_checksum(icmph, len - IP_HDR_SIZE);
-		net_send_packet((uchar *)et, eth_hdr_size + len);
+		memcpy(net_tx_packet, et, eth_hdr_size + len);
+		net_send_packet(net_tx_packet, eth_hdr_size + len);
 		return;
 /*	default:
 		return;*/
-- 
2.17.0

^ permalink raw reply related	[flat|nested] 5+ messages in thread

* [U-Boot] [PATCH v2 2/2] net: ping, arp: Fix cache alignment issues
  2018-05-30  5:52 ` [U-Boot] [PATCH v2 2/2] net: ping,arp: Fix cache alignment issues Baruch Siach
@ 2018-06-08 20:55   ` Joe Hershberger
  0 siblings, 0 replies; 5+ messages in thread
From: Joe Hershberger @ 2018-06-08 20:55 UTC (permalink / raw)
  To: u-boot

On Wed, May 30, 2018 at 12:52 AM, Baruch Siach <baruch@tkos.co.il> wrote:
> From: Jon Nettleton <jon@solid-run.com>
>
> Both ping_receive and arp_receive would transmit a received packet
> back out using its original point.  This causes problems with
> certain network cards that add a custom header to the packet.
> Specifically the mvneta driver for the Armada series boards has
> a 2 byte Marvell header that is bypassed and passed along to
> the system, but that 2 byte offset now causes a misalignment if
> it is attempted to be sent back out.
>
> Rather than changing the driver to memcpy all the received packets
> to cache aligned buffers we instead change the two offending
> network commands to copy the packet into a cache aligned net_tx_packet
> before sending it back out.

It seems reasonable to make these match the rest of the network commands.

> This fixes occasional messages like:
>
>   CACHE: Misaligned operation at range [3fc01082, 3fc010c2]
>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Signed-off-by: Jon Nettleton <jon@solid-run.com>
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> ---

Acked-by: Joe Hershberger <joe.hershberger@ni.com>

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [U-Boot] [PATCH v2 1/2] mvebu: neta: align DMA buffers
  2018-05-30  5:52 [U-Boot] [PATCH v2 1/2] mvebu: neta: align DMA buffers Baruch Siach
  2018-05-30  5:52 ` [U-Boot] [PATCH v2 2/2] net: ping,arp: Fix cache alignment issues Baruch Siach
@ 2018-06-08 20:56 ` Joe Hershberger
  2018-06-13 19:02 ` [U-Boot] " Joe Hershberger
  2 siblings, 0 replies; 5+ messages in thread
From: Joe Hershberger @ 2018-06-08 20:56 UTC (permalink / raw)
  To: u-boot

On Wed, May 30, 2018 at 12:52 AM, Baruch Siach <baruch@tkos.co.il> wrote:
> From: Jon Nettleton <jon@solid-run.com>
>
> This makes sure the DMA buffers are properly aligned for the
> hardware.
>
> Reviewed-by: Stefan Roese <sr@denx.de>
> Signed-off-by: Jon Nettleton <jon@solid-run.com>
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>

Acked-by: Joe Hershberger <joe.hershberger@ni.com>

^ permalink raw reply	[flat|nested] 5+ messages in thread

* [U-Boot] mvebu: neta: align DMA buffers
  2018-05-30  5:52 [U-Boot] [PATCH v2 1/2] mvebu: neta: align DMA buffers Baruch Siach
  2018-05-30  5:52 ` [U-Boot] [PATCH v2 2/2] net: ping,arp: Fix cache alignment issues Baruch Siach
  2018-06-08 20:56 ` [U-Boot] [PATCH v2 1/2] mvebu: neta: align DMA buffers Joe Hershberger
@ 2018-06-13 19:02 ` Joe Hershberger
  2 siblings, 0 replies; 5+ messages in thread
From: Joe Hershberger @ 2018-06-13 19:02 UTC (permalink / raw)
  To: u-boot

Hi Baruch,

https://patchwork.ozlabs.org/patch/922540/ was applied to http://git.denx.de/?p=u-boot/u-boot-net.git

Thanks!
-Joe

^ permalink raw reply	[flat|nested] 5+ messages in thread

end of thread, other threads:[~2018-06-13 19:02 UTC | newest]

Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-05-30  5:52 [U-Boot] [PATCH v2 1/2] mvebu: neta: align DMA buffers Baruch Siach
2018-05-30  5:52 ` [U-Boot] [PATCH v2 2/2] net: ping,arp: Fix cache alignment issues Baruch Siach
2018-06-08 20:55   ` [U-Boot] [PATCH v2 2/2] net: ping, arp: " Joe Hershberger
2018-06-08 20:56 ` [U-Boot] [PATCH v2 1/2] mvebu: neta: align DMA buffers Joe Hershberger
2018-06-13 19:02 ` [U-Boot] " Joe Hershberger

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