From: Jani Nikula <jani.nikula@intel.com> To: intel-gfx@lists.freedesktop.org Cc: jani.nikula@intel.com Subject: [PATCH v3 09/13] drm/i915/dsi: use afe_clk() instead of intel_dsi_bitrate() Date: Tue, 26 Nov 2019 15:42:44 +0200 [thread overview] Message-ID: <bf3b0fb17595eb483597f2dd6d14f861656eba01.1574775655.git.jani.nikula@intel.com> (raw) In-Reply-To: <cover.1574775655.git.jani.nikula@intel.com> We'll be expanding afe_clk() to take DSC into account. Switch to using it where DSC matters. Which is really everywhere that intel_dsi_bitrate() is currently used in ICL DSI code. The functional difference is that we round the result closest instead of down. Cc: Vandita Kulkarni <vandita.kulkarni@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/display/icl_dsi.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index de3743233dcb..d576f29cef75 100644 --- a/drivers/gpu/drm/i915/display/icl_dsi.c +++ b/drivers/gpu/drm/i915/display/icl_dsi.c @@ -539,7 +539,7 @@ static void gen11_dsi_setup_dphy_timings(struct intel_encoder *encoder) * leave all fields at HW default values. */ if (IS_GEN(dev_priv, 11)) { - if (intel_dsi_bitrate(intel_dsi) <= 800000) { + if (afe_clk(encoder) <= 800000) { for_each_dsi_port(port, intel_dsi->ports) { tmp = I915_READ(DPHY_TA_TIMING_PARAM(port)); tmp &= ~TA_SURE_MASK; @@ -649,7 +649,7 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder, tmp |= EOTP_DISABLED; /* enable link calibration if freq > 1.5Gbps */ - if (intel_dsi_bitrate(intel_dsi) >= 1500 * 1000) { + if (afe_clk(encoder) >= 1500 * 1000) { tmp &= ~LINK_CALIBRATION_MASK; tmp |= CALIBRATION_ENABLED_INITIAL_ONLY; } @@ -930,7 +930,7 @@ static void gen11_dsi_setup_timeouts(struct intel_encoder *encoder) * TIME_NS = (BYTE_CLK_COUNT * 8 * 10^6)/ Bitrate * ESCAPE_CLK_COUNT = TIME_NS/ESC_CLK_NS */ - divisor = intel_dsi_tlpx_ns(intel_dsi) * intel_dsi_bitrate(intel_dsi) * 1000; + divisor = intel_dsi_tlpx_ns(intel_dsi) * afe_clk(encoder) * 1000; mul = 8 * 1000000; hs_tx_timeout = DIV_ROUND_UP(intel_dsi->hs_tx_timeout * mul, divisor); @@ -1300,7 +1300,7 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder, pipe_config->pipe_bpp = 18; pipe_config->clock_set = true; - pipe_config->port_clock = intel_dsi_bitrate(intel_dsi) / 5; + pipe_config->port_clock = afe_clk(encoder) / 5; return 0; } -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Jani Nikula <jani.nikula@intel.com> To: intel-gfx@lists.freedesktop.org Cc: jani.nikula@intel.com Subject: [Intel-gfx] [PATCH v3 09/13] drm/i915/dsi: use afe_clk() instead of intel_dsi_bitrate() Date: Tue, 26 Nov 2019 15:42:44 +0200 [thread overview] Message-ID: <bf3b0fb17595eb483597f2dd6d14f861656eba01.1574775655.git.jani.nikula@intel.com> (raw) Message-ID: <20191126134244.zrxBXJCWXTQZJ8QktNblnQ8KZ7jsBkcYmIxR5qwSGKo@z> (raw) In-Reply-To: <cover.1574775655.git.jani.nikula@intel.com> We'll be expanding afe_clk() to take DSC into account. Switch to using it where DSC matters. Which is really everywhere that intel_dsi_bitrate() is currently used in ICL DSI code. The functional difference is that we round the result closest instead of down. Cc: Vandita Kulkarni <vandita.kulkarni@intel.com> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Jani Nikula <jani.nikula@intel.com> --- drivers/gpu/drm/i915/display/icl_dsi.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c index de3743233dcb..d576f29cef75 100644 --- a/drivers/gpu/drm/i915/display/icl_dsi.c +++ b/drivers/gpu/drm/i915/display/icl_dsi.c @@ -539,7 +539,7 @@ static void gen11_dsi_setup_dphy_timings(struct intel_encoder *encoder) * leave all fields at HW default values. */ if (IS_GEN(dev_priv, 11)) { - if (intel_dsi_bitrate(intel_dsi) <= 800000) { + if (afe_clk(encoder) <= 800000) { for_each_dsi_port(port, intel_dsi->ports) { tmp = I915_READ(DPHY_TA_TIMING_PARAM(port)); tmp &= ~TA_SURE_MASK; @@ -649,7 +649,7 @@ gen11_dsi_configure_transcoder(struct intel_encoder *encoder, tmp |= EOTP_DISABLED; /* enable link calibration if freq > 1.5Gbps */ - if (intel_dsi_bitrate(intel_dsi) >= 1500 * 1000) { + if (afe_clk(encoder) >= 1500 * 1000) { tmp &= ~LINK_CALIBRATION_MASK; tmp |= CALIBRATION_ENABLED_INITIAL_ONLY; } @@ -930,7 +930,7 @@ static void gen11_dsi_setup_timeouts(struct intel_encoder *encoder) * TIME_NS = (BYTE_CLK_COUNT * 8 * 10^6)/ Bitrate * ESCAPE_CLK_COUNT = TIME_NS/ESC_CLK_NS */ - divisor = intel_dsi_tlpx_ns(intel_dsi) * intel_dsi_bitrate(intel_dsi) * 1000; + divisor = intel_dsi_tlpx_ns(intel_dsi) * afe_clk(encoder) * 1000; mul = 8 * 1000000; hs_tx_timeout = DIV_ROUND_UP(intel_dsi->hs_tx_timeout * mul, divisor); @@ -1300,7 +1300,7 @@ static int gen11_dsi_compute_config(struct intel_encoder *encoder, pipe_config->pipe_bpp = 18; pipe_config->clock_set = true; - pipe_config->port_clock = intel_dsi_bitrate(intel_dsi) / 5; + pipe_config->port_clock = afe_clk(encoder) / 5; return 0; } -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2019-11-26 13:43 UTC|newest] Thread overview: 56+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-11-26 13:42 [PATCH v3 00/13] drm/i915/dsi: enable DSC Jani Nikula 2019-11-26 13:42 ` [Intel-gfx] " Jani Nikula 2019-11-26 13:42 ` [PATCH v3 01/13] drm/i915/bios: pass devdata to parse_ddi_port Jani Nikula 2019-11-26 13:42 ` [Intel-gfx] " Jani Nikula 2019-12-04 7:52 ` Kulkarni, Vandita 2019-11-26 13:42 ` [PATCH v3 02/13] drm/i915/bios: parse compression parameters block Jani Nikula 2019-11-26 13:42 ` [Intel-gfx] " Jani Nikula 2019-12-04 8:07 ` Kulkarni, Vandita 2019-11-26 13:42 ` [PATCH v3 03/13] drm/i915/bios: add support for querying DSC details for encoder Jani Nikula 2019-11-26 13:42 ` [Intel-gfx] " Jani Nikula 2019-12-05 4:42 ` Kulkarni, Vandita 2019-11-26 13:42 ` [PATCH v3 04/13] drm/i915/dsc: move DP specific compute params to intel_dp.c Jani Nikula 2019-11-26 13:42 ` [Intel-gfx] " Jani Nikula 2019-12-05 5:07 ` Kulkarni, Vandita 2019-11-26 13:42 ` [PATCH v3 05/13] drm/i915/dsc: move slice height calculation to encoder Jani Nikula 2019-11-26 13:42 ` [Intel-gfx] " Jani Nikula 2019-12-05 5:28 ` Kulkarni, Vandita 2019-11-26 13:42 ` [PATCH v3 06/13] drm/i915/dsc: add support for computing and writing PPS for DSI encoders Jani Nikula 2019-11-26 13:42 ` [Intel-gfx] " Jani Nikula 2019-12-05 5:44 ` Kulkarni, Vandita 2019-12-09 15:43 ` Jani Nikula 2019-11-26 13:42 ` [PATCH v3 07/13] drm/i915/dsi: set pipe_bpp on ICL configure config Jani Nikula 2019-11-26 13:42 ` [Intel-gfx] " Jani Nikula 2019-12-05 10:15 ` Kulkarni, Vandita 2019-12-09 15:46 ` Jani Nikula 2019-11-26 13:42 ` [PATCH v3 08/13] drm/i915/dsi: abstract afe_clk calculation Jani Nikula 2019-11-26 13:42 ` [Intel-gfx] " Jani Nikula 2019-12-05 8:25 ` Kulkarni, Vandita 2019-11-26 13:42 ` Jani Nikula [this message] 2019-11-26 13:42 ` [Intel-gfx] [PATCH v3 09/13] drm/i915/dsi: use afe_clk() instead of intel_dsi_bitrate() Jani Nikula 2019-12-05 13:06 ` Kulkarni, Vandita 2019-11-26 13:42 ` [PATCH v3 10/13] drm/i915/dsi: take compression into account in afe_clk() Jani Nikula 2019-11-26 13:42 ` [Intel-gfx] " Jani Nikula 2019-12-05 14:36 ` Kulkarni, Vandita 2019-11-26 13:42 ` [PATCH v3 11/13] drm/i915/dsi: use compressed pixel format with DSC Jani Nikula 2019-11-26 13:42 ` [Intel-gfx] " Jani Nikula 2019-12-05 14:44 ` Kulkarni, Vandita 2019-11-26 13:42 ` [PATCH v3 12/13] drm/i915/dsi: account for DSC in horizontal timings Jani Nikula 2019-11-26 13:42 ` [Intel-gfx] " Jani Nikula 2019-12-05 14:52 ` Kulkarni, Vandita 2019-11-26 13:42 ` [PATCH v3 13/13] drm/i915/dsi: add support for DSC Jani Nikula 2019-11-26 13:42 ` [Intel-gfx] " Jani Nikula 2019-12-05 6:14 ` Kulkarni, Vandita 2019-12-09 16:02 ` Jani Nikula 2019-11-26 18:22 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dsi: enable DSC (rev3) Patchwork 2019-11-26 18:22 ` [Intel-gfx] " Patchwork 2019-11-26 18:52 ` ✗ Fi.CI.BAT: failure " Patchwork 2019-11-26 18:52 ` [Intel-gfx] " Patchwork 2019-11-27 14:07 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dsi: enable DSC (rev4) Patchwork 2019-11-27 14:07 ` [Intel-gfx] " Patchwork 2019-11-27 14:30 ` ✓ Fi.CI.BAT: success " Patchwork 2019-11-27 14:30 ` [Intel-gfx] " Patchwork 2019-11-28 14:21 ` ✗ Fi.CI.IGT: failure " Patchwork 2019-11-28 14:21 ` [Intel-gfx] " Patchwork 2019-12-05 15:24 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dsi: enable DSC (rev5) Patchwork 2019-12-05 16:20 ` [Intel-gfx] ✗ Fi.CI.BAT: failure " Patchwork
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