Re: [PATCH v13 08/10] arm64: dts: qcom: sc8280xp: Add multiport controller node for SC8280

From: Krishna Kurapati PSSNV <quic_kriskura@quicinc.com>
To: Johan Hovold <johan@kernel.org>
Cc: Thinh Nguyen <Thinh.Nguyen@synopsys.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	"Andy Gross" <agross@kernel.org>,
	Bjorn Andersson <andersson@kernel.org>,
	"Konrad Dybcio" <konrad.dybcio@linaro.org>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Felipe Balbi <balbi@kernel.org>,
	Wesley Cheng <quic_wcheng@quicinc.com>,
	<linux-usb@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
	<linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<quic_pkondeti@quicinc.com>, <quic_ppratap@quicinc.com>,
	<quic_jackp@quicinc.com>, <ahalaney@redhat.com>,
	<quic_shazhuss@quicinc.com>
Subject: Re: [PATCH v13 08/10] arm64: dts: qcom: sc8280xp: Add multiport controller node for SC8280
Date: Mon, 23 Oct 2023 23:04:38 +0530	[thread overview]
Message-ID: <c50e9266-2308-4fd5-b102-f604bf4ce2e8@quicinc.com> (raw)
In-Reply-To: <ZTaauQewazaaFonF@hovoldconsulting.com>

On 10/23/2023 9:39 PM, Johan Hovold wrote:
> On Sat, Oct 07, 2023 at 09:18:04PM +0530, Krishna Kurapati wrote:
>> Add USB and DWC3 node for tertiary port of SC8280 along with multiport
>> IRQ's and phy's. This will be used as a base for SA8295P and SA8295-Ride
>> platforms.
>>
>> Signed-off-by: Krishna Kurapati <quic_kriskura@quicinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 84 ++++++++++++++++++++++++++
>>   1 file changed, 84 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
>> index cad59af7ccef..5f64f75b07db 100644
>> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
>> @@ -3330,6 +3330,90 @@ system-cache-controller@9200000 {
>>   			interrupts = <GIC_SPI 582 IRQ_TYPE_LEVEL_HIGH>;
>>   		};
>>   
>> +		usb_2: usb@a4f8800 {
>> +			compatible = "qcom,sc8280xp-dwc3-mp", "qcom,dwc3";
> 
> So you went with a dedicated compatible even though you are now
> inferring the number of ports from the interrupts property.
> 
> Should we drop that compatible again or is there any other reason to
> keep a separate one?
>  >> +			interrupts-extended = <&pdc 127 IRQ_TYPE_EDGE_RISING>,
>> +					      <&pdc 126 IRQ_TYPE_EDGE_RISING>,
>> +					      <&pdc 129 IRQ_TYPE_EDGE_RISING>,
>> +					      <&pdc 128 IRQ_TYPE_EDGE_RISING>,
>> +					      <&pdc 131 IRQ_TYPE_EDGE_RISING>,
>> +					      <&pdc 130 IRQ_TYPE_EDGE_RISING>,
>> +					      <&pdc 133 IRQ_TYPE_EDGE_RISING>,
>> +					      <&pdc 132 IRQ_TYPE_EDGE_RISING>,
>> +					      <&pdc 16 IRQ_TYPE_LEVEL_HIGH>,
>> +					      <&pdc 17 IRQ_TYPE_LEVEL_HIGH>,
>> +					      <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
>> +					      <&intc GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
>> +					      <&intc GIC_SPI 857 IRQ_TYPE_LEVEL_HIGH>,
>> +					      <&intc GIC_SPI 856 IRQ_TYPE_LEVEL_HIGH>;
>> +
>> +			interrupt-names = "dp_hs_phy_1", "dm_hs_phy_1",
>> +					  "dp_hs_phy_2", "dm_hs_phy_2",
>> +					  "dp_hs_phy_3", "dm_hs_phy_3",
>> +					  "dp_hs_phy_4", "dm_hs_phy_4",
>> +					  "ss_phy_1", "ss_phy_2",
>> +					  "pwr_event_1",
>> +					  "pwr_event_2",
>> +					  "pwr_event_3",
>> +					  "pwr_event_4";
> 
> The interrupt order does not match the binding, where the power event
> interrupts come first.
> 
> And we probably also want the hs_phy_irqs here after fixing the
> incomplete binding.

You want to update the driver code for this as well ? I have no problem 
in adding it in DT and binding but not in driver.

> 
>> +			usb_2_dwc3: usb@a400000 {
>> +				compatible = "snps,dwc3";
>> +				reg = <0 0x0a400000 0 0xcd00>;
>> +				interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
> 
> I'd also like to know what that second dwc3 interrupt is for and whether
> it should be defined here as well.

Second interrupts is for HW acceleration I believe for which support is 
not there currently.

Regards,
Krishna,