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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Emil Renner Berthing <emil.renner.berthing@canonical.com>,
	Hal Feng <hal.feng@starfivetech.com>
Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	linux-clk@vger.kernel.org, Conor Dooley <conor@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 09/14] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator
Date: Mon, 21 Nov 2022 09:47:40 +0100	[thread overview]
Message-ID: <c75d1799-d7f7-d461-b412-27c084357c99@linaro.org> (raw)
In-Reply-To: <CAJM55Z_Gq22NiVYHawvjsehL8j3agvp_b2RCgabdTki+ovWa8Q@mail.gmail.com>

On 18/11/2022 17:50, Emil Renner Berthing wrote:
> On Fri, 18 Nov 2022 at 02:06, Hal Feng <hal.feng@starfivetech.com> wrote:
>>
>> From: Emil Renner Berthing <kernel@esmil.dk>
>>
>> Add bindings for the system clock and reset generator (SYSCRG) on the
>> JH7110 RISC-V SoC by StarFive Ltd.
>>
>> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
>> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
>> ---
>>  .../clock/starfive,jh7110-syscrg.yaml         | 80 +++++++++++++++++++
>>  MAINTAINERS                                   |  2 +-
>>  2 files changed, 81 insertions(+), 1 deletion(-)
>>  create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml b/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml
>> new file mode 100644
>> index 000000000000..a8cafbc0afe2
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml
>> @@ -0,0 +1,80 @@
>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/clock/starfive,jh7110-syscrg.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: StarFive JH7110 System Clock and Reset Generator
>> +
>> +maintainers:
>> +  - Emil Renner Berthing <kernel@esmil.dk>
>> +
>> +properties:
>> +  compatible:
>> +    const: starfive,jh7110-syscrg
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  clocks:
>> +    items:
>> +      - description: Main Oscillator (24 MHz)
>> +      - description: RMII reference clock
>> +      - description: RGMII RX clock
>> +      - description: I2S TX bit clock
>> +      - description: I2S TX left/right clock
>> +      - description: I2S RX bit clock
>> +      - description: I2S RX left/right clock
>> +      - description: TDM
>> +      - description: mclk
> 
> Maybe you could ask your colleagues for a better description of these clocks.

And drop "clock" from previous descriptions. All these are clocks, so no
need to repeat it.

Best regards,
Krzysztof


WARNING: multiple messages have this Message-ID (diff)
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Emil Renner Berthing <emil.renner.berthing@canonical.com>,
	Hal Feng <hal.feng@starfivetech.com>
Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	linux-clk@vger.kernel.org, Conor Dooley <conor@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Stephen Boyd <sboyd@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 09/14] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator
Date: Mon, 21 Nov 2022 09:47:40 +0100	[thread overview]
Message-ID: <c75d1799-d7f7-d461-b412-27c084357c99@linaro.org> (raw)
In-Reply-To: <CAJM55Z_Gq22NiVYHawvjsehL8j3agvp_b2RCgabdTki+ovWa8Q@mail.gmail.com>

On 18/11/2022 17:50, Emil Renner Berthing wrote:
> On Fri, 18 Nov 2022 at 02:06, Hal Feng <hal.feng@starfivetech.com> wrote:
>>
>> From: Emil Renner Berthing <kernel@esmil.dk>
>>
>> Add bindings for the system clock and reset generator (SYSCRG) on the
>> JH7110 RISC-V SoC by StarFive Ltd.
>>
>> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
>> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
>> ---
>>  .../clock/starfive,jh7110-syscrg.yaml         | 80 +++++++++++++++++++
>>  MAINTAINERS                                   |  2 +-
>>  2 files changed, 81 insertions(+), 1 deletion(-)
>>  create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml b/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml
>> new file mode 100644
>> index 000000000000..a8cafbc0afe2
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml
>> @@ -0,0 +1,80 @@
>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/clock/starfive,jh7110-syscrg.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: StarFive JH7110 System Clock and Reset Generator
>> +
>> +maintainers:
>> +  - Emil Renner Berthing <kernel@esmil.dk>
>> +
>> +properties:
>> +  compatible:
>> +    const: starfive,jh7110-syscrg
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  clocks:
>> +    items:
>> +      - description: Main Oscillator (24 MHz)
>> +      - description: RMII reference clock
>> +      - description: RGMII RX clock
>> +      - description: I2S TX bit clock
>> +      - description: I2S TX left/right clock
>> +      - description: I2S RX bit clock
>> +      - description: I2S RX left/right clock
>> +      - description: TDM
>> +      - description: mclk
> 
> Maybe you could ask your colleagues for a better description of these clocks.

And drop "clock" from previous descriptions. All these are clocks, so no
need to repeat it.

Best regards,
Krzysztof


_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2022-11-21  8:47 UTC|newest]

Thread overview: 112+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-18  1:06 [PATCH v2 00/14] Basic clock and reset support for StarFive JH7110 RISC-V SoC Hal Feng
2022-11-18  1:06 ` Hal Feng
2022-11-18  1:06 ` [PATCH v2 01/14] clk: starfive: Factor out common JH7100 and JH7110 code Hal Feng
2022-11-18  1:06   ` Hal Feng
2022-11-18 16:22   ` Emil Renner Berthing
2022-11-18 16:22     ` Emil Renner Berthing
2022-11-21  6:25     ` Hal Feng
2022-11-21  6:25       ` Hal Feng
2022-11-18  1:06 ` [PATCH v2 02/14] clk: starfive: Rename "jh7100" to "jh71x0" for the common code Hal Feng
2022-11-18  1:06   ` Hal Feng
2022-11-18 16:26   ` Emil Renner Berthing
2022-11-18 16:26     ` Emil Renner Berthing
2022-11-21  7:16     ` Hal Feng
2022-11-21  7:16       ` Hal Feng
2022-11-21 11:32       ` Emil Renner Berthing
2022-11-21 11:32         ` Emil Renner Berthing
2022-11-21 13:13         ` Hal Feng
2022-11-21 13:13           ` Hal Feng
2022-11-18  1:06 ` [PATCH v2 03/14] reset: Create subdirectory for StarFive drivers Hal Feng
2022-11-18  1:06   ` Hal Feng
2022-11-18 16:29   ` Emil Renner Berthing
2022-11-18 16:29     ` Emil Renner Berthing
2022-11-18  1:06 ` [PATCH v2 04/14] reset: starfive: Factor out common JH71X0 reset code Hal Feng
2022-11-18  1:06   ` Hal Feng
2022-11-18 16:39   ` Emil Renner Berthing
2022-11-18 16:39     ` Emil Renner Berthing
2022-11-21  9:23     ` Hal Feng
2022-11-21  9:23       ` Hal Feng
2022-11-21 11:26       ` Emil Renner Berthing
2022-11-21 11:26         ` Emil Renner Berthing
2022-11-18  1:06 ` [PATCH v2 05/14] reset: starfive: Rename "jh7100" to "jh71x0" for the common code Hal Feng
2022-11-18  1:06   ` Hal Feng
2022-11-18  1:06 ` [PATCH v2 06/14] reset: starfive: jh71x0: Use 32bit I/O on 32bit registers Hal Feng
2022-11-18  1:06   ` Hal Feng
2022-11-18  1:06 ` [PATCH v2 07/14] dt-bindings: clock: Add StarFive JH7110 system and always-on clock definitions Hal Feng
2022-11-18  1:06   ` Hal Feng
2022-11-21  8:45   ` Krzysztof Kozlowski
2022-11-21  8:45     ` Krzysztof Kozlowski
2022-11-22  1:02     ` Hal Feng
2022-11-22  1:02       ` Hal Feng
2022-11-22  7:41       ` Krzysztof Kozlowski
2022-11-22  7:41         ` Krzysztof Kozlowski
2022-11-22  8:04         ` Hal Feng
2022-11-22  8:04           ` Hal Feng
2022-11-23  9:34           ` Krzysztof Kozlowski
2022-11-23  9:34             ` Krzysztof Kozlowski
2022-11-18  1:06 ` [PATCH v2 08/14] dt-bindings: reset: Add StarFive JH7110 system and always-on reset definitions Hal Feng
2022-11-18  1:06   ` Hal Feng
2022-11-18 16:47   ` Emil Renner Berthing
2022-11-18 16:47     ` Emil Renner Berthing
2022-11-22  1:20     ` Hal Feng
2022-11-22  1:20       ` Hal Feng
2022-11-21  8:45   ` Krzysztof Kozlowski
2022-11-21  8:45     ` Krzysztof Kozlowski
2022-11-21  8:50   ` Krzysztof Kozlowski
2022-11-21  8:50     ` Krzysztof Kozlowski
2022-11-22  1:26     ` Hal Feng
2022-11-22  1:26       ` Hal Feng
2022-11-18  1:06 ` [PATCH v2 09/14] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator Hal Feng
2022-11-18  1:06   ` Hal Feng
2022-11-18 16:50   ` Emil Renner Berthing
2022-11-18 16:50     ` Emil Renner Berthing
2022-11-21  8:47     ` Krzysztof Kozlowski [this message]
2022-11-21  8:47       ` Krzysztof Kozlowski
2022-11-22  1:45     ` Hal Feng
2022-11-22  1:45       ` Hal Feng
2022-11-21  8:47   ` Krzysztof Kozlowski
2022-11-21  8:47     ` Krzysztof Kozlowski
2022-11-25  6:41     ` Hal Feng
2022-11-25  6:41       ` Hal Feng
2022-11-30  9:47       ` Hal Feng
2022-11-30  9:47         ` Hal Feng
2022-11-30 11:48         ` Krzysztof Kozlowski
2022-11-30 11:48           ` Krzysztof Kozlowski
2022-11-30 15:12           ` Hal Feng
2022-11-30 15:12             ` Hal Feng
2022-11-30 15:19             ` Krzysztof Kozlowski
2022-11-30 15:19               ` Krzysztof Kozlowski
2022-11-30 18:05               ` Hal Feng
2022-11-30 18:05                 ` Hal Feng
2022-12-01 10:21                 ` Krzysztof Kozlowski
2022-12-01 10:21                   ` Krzysztof Kozlowski
2022-12-02  2:06                   ` Hal Feng
2022-12-02  2:06                     ` Hal Feng
2022-11-18  1:06 ` [PATCH v2 10/14] dt-bindings: clock: Add StarFive JH7110 always-on " Hal Feng
2022-11-18  1:06   ` Hal Feng
2022-11-21  8:49   ` Krzysztof Kozlowski
2022-11-21  8:49     ` Krzysztof Kozlowski
2022-11-21 11:38     ` Emil Renner Berthing
2022-11-21 11:38       ` Emil Renner Berthing
2022-11-21 13:24       ` Krzysztof Kozlowski
2022-11-21 13:24         ` Krzysztof Kozlowski
2022-11-18  1:06 ` [PATCH v2 11/14] clk: starfive: Add StarFive JH7110 system clock driver Hal Feng
2022-11-18  1:06   ` Hal Feng
2022-11-18 17:03   ` Emil Renner Berthing
2022-11-18 17:03     ` Emil Renner Berthing
2022-11-25  2:33     ` Hal Feng
2022-11-25  2:33       ` Hal Feng
2022-11-18  1:06 ` [PATCH v2 12/14] clk: starfive: Add StarFive JH7110 always-on " Hal Feng
2022-11-18  1:06   ` Hal Feng
2022-11-18  1:06 ` [PATCH v2 13/14] reset: starfive: Add StarFive JH7110 reset driver Hal Feng
2022-11-18  1:06   ` Hal Feng
2022-11-18 17:14   ` Emil Renner Berthing
2022-11-18 17:14     ` Emil Renner Berthing
2022-11-22  5:55     ` Hal Feng
2022-11-22  5:55       ` Hal Feng
2022-11-18  1:06 ` [PATCH v2 14/14] clk: starfive: jh71x0: Don't register aux devices if JH7110 reset is disabled Hal Feng
2022-11-18  1:06   ` Hal Feng
2022-11-18 17:18   ` Emil Renner Berthing
2022-11-18 17:18     ` Emil Renner Berthing
2022-11-22  6:12     ` Hal Feng
2022-11-22  6:12       ` Hal Feng

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