From: Gayatri Kammela <gayatri.kammela@intel.com> To: platform-driver-x86@vger.kernel.org Cc: mgross@linux.intel.com, hdegoede@redhat.com, irenic.rajneesh@gmail.com, andriy.shevchenko@linux.intel.com, vicamo.yang@canonical.com, srinivas.pandruvada@intel.com, david.e.box@intel.com, linux-kernel@vger.kernel.org, tamar.mashiah@intel.com, gregkh@linuxfoundation.org, rajatja@google.com, "David E. Box" <david.e.box@linux.intel.com> Subject: [PATCH v2 5/5] platform/x86/intel: intel_pmc_core: Add GBE Package C10 fix for Alder Lake PCH Date: Wed, 7 Jul 2021 19:07:25 -0700 [thread overview] Message-ID: <cea5cf09ddecface98712e5db877a70e8c41d581.1625709047.git.gayatri.kammela@intel.com> (raw) In-Reply-To: <cover.1625709047.git.gayatri.kammela@intel.com> From: "David E. Box" <david.e.box@linux.intel.com> Alder PCH uses the same Gigabit Ethernet (GBE) device as Tiger Lake PCH which cannot achieve PC10 without ignoring the PMC GBE LTR. Add this work around for Alder Lake PCH as well. Cc: Srinivas Pandruvada <srinivas.pandruvada@intel.com> Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: You-Sheng Yang <vicamo.yang@canonical.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: David E. Box <david.e.box@linux.intel.com> --- drivers/platform/x86/intel/pmc/intel_pmc_core.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/platform/x86/intel/pmc/intel_pmc_core.c b/drivers/platform/x86/intel/pmc/intel_pmc_core.c index 27346ff5a924..84b58b557a49 100644 --- a/drivers/platform/x86/intel/pmc/intel_pmc_core.c +++ b/drivers/platform/x86/intel/pmc/intel_pmc_core.c @@ -1983,10 +1983,10 @@ static int pmc_core_probe(struct platform_device *pdev) pmc_core_get_tgl_lpm_reqs(pdev); /* - * On TGL, due to a hardware limitation, the GBE LTR blocks PC10 when - * a cable is attached. Tell the PMC to ignore it. + * On TGL and ADL, due to a hardware limitation, the GBE LTR blocks PC10 + * when a cable is attached. Tell the PMC to ignore it. */ - if (pmcdev->map == &tgl_reg_map) { + if (pmcdev->map == &tgl_reg_map || pmcdev->map == &adl_reg_map) { dev_dbg(&pdev->dev, "ignoring GBE LTR\n"); pmc_core_send_ltr_ignore(pmcdev, 3); } -- 2.25.1
next prev parent reply other threads:[~2021-07-08 2:10 UTC|newest] Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-07-08 2:07 [PATCH v2 0/5] Add Alder Lake PCH-S support to PMC core driver Gayatri Kammela 2021-07-08 2:07 ` [PATCH v2 1/5] platform/x86/intel: intel_pmc_core: Move intel_pmc_core* files to pmc subfolder Gayatri Kammela 2021-07-08 7:56 ` Andy Shevchenko 2021-07-09 17:39 ` Kammela, Gayatri 2021-07-08 2:07 ` [PATCH v2 2/5] platform/x86/intel: intel_pmc_core: Add Alderlake support to pmc_core driver Gayatri Kammela 2021-07-08 2:07 ` [PATCH v2 3/5] platform/x86/intel: intel_pmc_core: Add Latency Tolerance Reporting (LTR) support to Alder Lake Gayatri Kammela 2021-07-08 2:07 ` [PATCH v2 4/5] platform/x86/intel: intel_pmc_core: Add Alder Lake low power mode support for pmc_core Gayatri Kammela 2021-07-08 2:07 ` Gayatri Kammela [this message] 2021-07-08 17:32 ` [PATCH v2 0/5] Add Alder Lake PCH-S support to PMC core driver Rajneesh Bhardwaj 2021-07-09 17:40 ` Kammela, Gayatri 2021-07-09 18:30 ` Limonciello, Mario 2021-07-09 23:01 ` Kammela, Gayatri
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