[Qemu-devel] [PATCH v3 0/5] Add a valid_cpu_types property

[Qemu-devel] [PATCH v3 0/5] Add a valid_cpu_types property

[Alistair Francis]

There are numorous QEMU machines that only have a single or a handful of
valid CPU options. To simplyfy the management of specificying which CPU
is/isn't valid let's create a property that can be set in the machine
init. We can then check to see if the user supplied CPU is in that list
or not.

I have added the valid_cpu_types for some ARM machines only at the
moment.

Here is what specifying the CPUs looks like now:

$ aarch64-softmmu/qemu-system-aarch64 -M netduino2 -kernel ./u-boot.elf -nographic -cpu "cortex-m3" -S
QEMU 2.10.50 monitor - type 'help' for more information
(qemu) info cpus
* CPU #0: thread_id=24175
(qemu) q

$ aarch64-softmmu/qemu-system-aarch64 -M netduino2 -kernel ./u-boot.elf -nographic -cpu "cortex-m4" -S
QEMU 2.10.50 monitor - type 'help' for more information
(qemu) q

$ aarch64-softmmu/qemu-system-aarch64 -M netduino2 -kernel ./u-boot.elf -nographic -cpu "cortex-m5" -S
qemu-system-aarch64: unable to find CPU model 'cortex-m5'

$ aarch64-softmmu/qemu-system-aarch64 -M netduino2 -kernel ./u-boot.elf -nographic -cpu "cortex-a9" -S
qemu-system-aarch64: Invalid CPU type: cortex-a9-arm-cpu
The valid types are: cortex-m3-arm-cpu, cortex-m4-arm-cpu

V3:
 - Make the varialbes static
V2:
 - Rebase
 - Reorder patches
 - Add a Raspberry Pi 2 CPU fix
V1:
 - Small fixes to prepare a series instead of RFC
 - Add commit messages for the commits
 - Expand the machine support to ARM machines
RFC v2:
 - Rebase on Igor's work
 - Use more QEMUisms inside the code
 - List the supported machines in a NULL terminated array

Alistair Francis (5):
  netduino2: Specify the valid CPUs
  bcm2836: Use the Cortex-A7 instead of Cortex-A15
  raspi: Specify the valid CPUs
  xlnx-zcu102: Specify the valid CPUs
  xilinx_zynq: Specify the valid CPUs

 hw/arm/bcm2836.c     |  2 +-
 hw/arm/netduino2.c   | 10 +++++++++-
 hw/arm/raspi.c       |  7 +++++++
 hw/arm/xilinx_zynq.c |  6 ++++++
 hw/arm/xlnx-zcu102.c | 17 +++++++++++++++++
 5 files changed, 40 insertions(+), 2 deletions(-)

-- 
2.11.0

[Qemu-devel] [PATCH v3 1/5] netduino2: Specify the valid CPUs

[Alistair Francis]

List all possible valid CPU options.

Although the board only ever has a Cortex-M3 we mark the Cortex-M4 as
supported because the Netduino2 Plus supports the Cortex-M4 and the
Netduino2 Plus is similar to the Netduino2.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---

V3:
 - Add static property
V2:
 - Fixup allignment
RFC v2:
 - Use a NULL terminated list
 - Add the Cortex-M4 for testing


 hw/arm/netduino2.c | 10 +++++++++-
 1 file changed, 9 insertions(+), 1 deletion(-)

diff --git a/hw/arm/netduino2.c b/hw/arm/netduino2.c
index f936017d4a..111a1d0aba 100644
--- a/hw/arm/netduino2.c
+++ b/hw/arm/netduino2.c
@@ -34,18 +34,26 @@ static void netduino2_init(MachineState *machine)
     DeviceState *dev;
 
     dev = qdev_create(NULL, TYPE_STM32F205_SOC);
-    qdev_prop_set_string(dev, "cpu-type", ARM_CPU_TYPE_NAME("cortex-m3"));
+    qdev_prop_set_string(dev, "cpu-type", machine->cpu_type);
     object_property_set_bool(OBJECT(dev), true, "realized", &error_fatal);
 
     armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename,
                        FLASH_SIZE);
 }
 
+static const char *netduino_valid_cpus[] = {
+                                            ARM_CPU_TYPE_NAME("cortex-m3"),
+                                            ARM_CPU_TYPE_NAME("cortex-m4"),
+                                            NULL
+                                           };
+
 static void netduino2_machine_init(MachineClass *mc)
 {
     mc->desc = "Netduino 2 Machine";
     mc->init = netduino2_init;
     mc->ignore_memory_transaction_failures = true;
+    mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3");
+    mc->valid_cpu_types = netduino_valid_cpus;
 }
 
 DEFINE_MACHINE("netduino2", netduino2_machine_init)
-- 
2.11.0

[Qemu-devel] [PATCH v3 2/5] bcm2836: Use the Cortex-A7 instead of Cortex-A15

[Alistair Francis]

The BCM2836 uses a Cortex-A7 not a Cortex-A15. Update the device to use
the correct CPU.
https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2836/QA7_rev3.4.pdf

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
---
V3:
 - Use ARM_CPU_TYPE_NAME() macro
V2:
 - Fix the BCM2836 CPU

 hw/arm/bcm2836.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
index 8c43291112..c477772484 100644
--- a/hw/arm/bcm2836.c
+++ b/hw/arm/bcm2836.c
@@ -30,7 +30,7 @@ static void bcm2836_init(Object *obj)
 
     for (n = 0; n < BCM2836_NCPUS; n++) {
         object_initialize(&s->cpus[n], sizeof(s->cpus[n]),
-                          "cortex-a15-" TYPE_ARM_CPU);
+                          ARM_CPU_TYPE_NAME("cortex-a7"));
         object_property_add_child(obj, "cpu[*]", OBJECT(&s->cpus[n]),
                                   &error_abort);
     }
-- 
2.11.0

[Qemu-devel] [PATCH v3 3/5] raspi: Specify the valid CPUs

[Alistair Francis]

List all possible valid CPU options.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---

V3:
 - Add static property
V2:
 - Fix the indentation

 hw/arm/raspi.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
index 5941c9f751..d64e8026ce 100644
--- a/hw/arm/raspi.c
+++ b/hw/arm/raspi.c
@@ -158,6 +158,11 @@ static void raspi2_init(MachineState *machine)
     setup_boot(machine, 2, machine->ram_size - vcram_size);
 }
 
+static const char *raspi2_valid_cpus[] = {
+                                            ARM_CPU_TYPE_NAME("cortex-a7"),
+                                            NULL
+                                         };
+
 static void raspi2_machine_init(MachineClass *mc)
 {
     mc->desc = "Raspberry Pi 2";
@@ -169,5 +174,7 @@ static void raspi2_machine_init(MachineClass *mc)
     mc->max_cpus = BCM2836_NCPUS;
     mc->default_ram_size = 1024 * 1024 * 1024;
     mc->ignore_memory_transaction_failures = true;
+    mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a7");
+    mc->valid_cpu_types = raspi2_valid_cpus;
 };
 DEFINE_MACHINE("raspi2", raspi2_machine_init)
-- 
2.11.0

[Qemu-devel] [PATCH v3 4/5] xlnx-zcu102: Specify the valid CPUs

[Alistair Francis]

List all possible valid CPU options.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
---

An implementation for single CPU machines is still being discussed. A
solution proposed by Eduardo is this:

1) Change the default on TYPE_MACHINE to:
     mc->valid_cpu_types = { TYPE_CPU, NULL };

   This will keep the existing behavior for all boards.

2) mc->valid_cpu_types=NULL be interpreted as "no CPU model
   except the default is accepted" or "-cpu is not accepted" in
   machine_run_board_init() (I prefer the former, but both
   options would be correct)

3) Boards like xlnx_zynqmp could then just do this:

   static void xxx_class_init(...) {
       mc->default_cpu_type = MY_CPU_TYPE;
       /* Reason: XXX_init() is hardcoded to MY_CPU_TYPE */
       mc->valid_cpu_types = NULL;
   }

V3:
 - Make variable static
V2:
 - Don't use the users -cpu
 - Fixup allignment

 hw/arm/xlnx-zcu102.c | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c
index 519a16ed98..d5a5425356 100644
--- a/hw/arm/xlnx-zcu102.c
+++ b/hw/arm/xlnx-zcu102.c
@@ -160,6 +160,11 @@ static void xlnx_zynqmp_init(XlnxZCU102 *s, MachineState *machine)
     arm_load_kernel(s->soc.boot_cpu_ptr, &xlnx_zcu102_binfo);
 }
 
+static const char *xlnx_zynqmp_valid_cpus[] = {
+                                            ARM_CPU_TYPE_NAME("cortex-a53"),
+                                            NULL
+                                              };
+
 static void xlnx_ep108_init(MachineState *machine)
 {
     XlnxZCU102 *s = EP108_MACHINE(machine);
@@ -185,6 +190,12 @@ static void xlnx_ep108_machine_class_init(ObjectClass *oc, void *data)
     mc->block_default_type = IF_IDE;
     mc->units_per_default_bus = 1;
     mc->ignore_memory_transaction_failures = true;
+    mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a53");
+    /* The ZynqMP SoC is always a Cortex-A53. We add this here to give
+     * users a sane error if they specify a different CPU, but we never
+     * use their CPU choice.
+     */
+    mc->valid_cpu_types = xlnx_zynqmp_valid_cpus;
 }
 
 static const TypeInfo xlnx_ep108_machine_init_typeinfo = {
@@ -240,6 +251,12 @@ static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data)
     mc->block_default_type = IF_IDE;
     mc->units_per_default_bus = 1;
     mc->ignore_memory_transaction_failures = true;
+    mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a53");
+    /* The ZynqMP SoC is always a Cortex-A53. We add this here to give
+     * users a sane error if they specify a different CPU, but we never
+     * use their CPU choice.
+     */
+    mc->valid_cpu_types = xlnx_zynqmp_valid_cpus;
 }
 
 static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
-- 
2.11.0

[Qemu-devel] [PATCH v3 5/5] xilinx_zynq: Specify the valid CPUs

[Alistair Francis]

List all possible valid CPU options.

Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---

V3:
 - Make variable static
V2:
 - Fixup alignment

 hw/arm/xilinx_zynq.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 1836a4ed45..1f257b0ef9 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -313,6 +313,11 @@ static void zynq_init(MachineState *machine)
     arm_load_kernel(ARM_CPU(first_cpu), &zynq_binfo);
 }
 
+static const char *xlnx_zynq_7000_valid_cpus[] = {
+                                                ARM_CPU_TYPE_NAME("cortex-a9"),
+                                                NULL
+                                                 };
+
 static void zynq_machine_init(MachineClass *mc)
 {
     mc->desc = "Xilinx Zynq Platform Baseboard for Cortex-A9";
@@ -321,6 +326,7 @@ static void zynq_machine_init(MachineClass *mc)
     mc->no_sdcard = 1;
     mc->ignore_memory_transaction_failures = true;
     mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9");
+    mc->valid_cpu_types = xlnx_zynq_7000_valid_cpus;
 }
 
 DEFINE_MACHINE("xilinx-zynq-a9", zynq_machine_init)
-- 
2.11.0

Re: [Qemu-devel] [PATCH v3 2/5] bcm2836: Use the Cortex-A7 instead of Cortex-A15

[Philippe Mathieu-Daudé]

On Tue, Oct 17, 2017 at 7:31 PM, Alistair Francis
<alistair.francis@xilinx.com> wrote:
> The BCM2836 uses a Cortex-A7 not a Cortex-A15. Update the device to use
> the correct CPU.
> https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2836/QA7_rev3.4.pdf
>
> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> ---
> V3:
>  - Use ARM_CPU_TYPE_NAME() macro
> V2:
>  - Fix the BCM2836 CPU
>
>  hw/arm/bcm2836.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
> index 8c43291112..c477772484 100644
> --- a/hw/arm/bcm2836.c
> +++ b/hw/arm/bcm2836.c
> @@ -30,7 +30,7 @@ static void bcm2836_init(Object *obj)
>
>      for (n = 0; n < BCM2836_NCPUS; n++) {
>          object_initialize(&s->cpus[n], sizeof(s->cpus[n]),
> -                          "cortex-a15-" TYPE_ARM_CPU);
> +                          ARM_CPU_TYPE_NAME("cortex-a7"));
>          object_property_add_child(obj, "cpu[*]", OBJECT(&s->cpus[n]),
>                                    &error_abort);
>      }
> --
> 2.11.0
>
>

Re: [Qemu-devel] [PATCH v3 2/5] bcm2836: Use the Cortex-A7 instead of Cortex-A15

[Igor Mammedov]

On Tue, 17 Oct 2017 15:31:14 -0700
Alistair Francis <alistair.francis@xilinx.com> wrote:

> The BCM2836 uses a Cortex-A7 not a Cortex-A15. Update the device to use
> the correct CPU.
> https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2836/QA7_rev3.4.pdf
> 
> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>

> ---
> V3:
>  - Use ARM_CPU_TYPE_NAME() macro
> V2:
>  - Fix the BCM2836 CPU
> 
>  hw/arm/bcm2836.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/hw/arm/bcm2836.c b/hw/arm/bcm2836.c
> index 8c43291112..c477772484 100644
> --- a/hw/arm/bcm2836.c
> +++ b/hw/arm/bcm2836.c
> @@ -30,7 +30,7 @@ static void bcm2836_init(Object *obj)
>  
>      for (n = 0; n < BCM2836_NCPUS; n++) {
>          object_initialize(&s->cpus[n], sizeof(s->cpus[n]),
> -                          "cortex-a15-" TYPE_ARM_CPU);
> +                          ARM_CPU_TYPE_NAME("cortex-a7"));
>          object_property_add_child(obj, "cpu[*]", OBJECT(&s->cpus[n]),
>                                    &error_abort);
>      }

Re: [Qemu-devel] [PATCH v3 4/5] xlnx-zcu102: Specify the valid CPUs

[Eduardo Habkost]

On Tue, Oct 17, 2017 at 03:31:19PM -0700, Alistair Francis wrote:
> List all possible valid CPU options.
> 
> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>

Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>

> ---
> 
> An implementation for single CPU machines is still being discussed. A
> solution proposed by Eduardo is this:
> 
> 1) Change the default on TYPE_MACHINE to:
>      mc->valid_cpu_types = { TYPE_CPU, NULL };
> 
>    This will keep the existing behavior for all boards.
> 
> 2) mc->valid_cpu_types=NULL be interpreted as "no CPU model
>    except the default is accepted" or "-cpu is not accepted" in
>    machine_run_board_init() (I prefer the former, but both
>    options would be correct)
> 
> 3) Boards like xlnx_zynqmp could then just do this:
> 
>    static void xxx_class_init(...) {
>        mc->default_cpu_type = MY_CPU_TYPE;
>        /* Reason: XXX_init() is hardcoded to MY_CPU_TYPE */
>        mc->valid_cpu_types = NULL;
>    }
> 
> V3:
>  - Make variable static
> V2:
>  - Don't use the users -cpu
>  - Fixup allignment
> 
>  hw/arm/xlnx-zcu102.c | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c
> index 519a16ed98..d5a5425356 100644
> --- a/hw/arm/xlnx-zcu102.c
> +++ b/hw/arm/xlnx-zcu102.c
> @@ -160,6 +160,11 @@ static void xlnx_zynqmp_init(XlnxZCU102 *s, MachineState *machine)
>      arm_load_kernel(s->soc.boot_cpu_ptr, &xlnx_zcu102_binfo);
>  }
>  
> +static const char *xlnx_zynqmp_valid_cpus[] = {
> +                                            ARM_CPU_TYPE_NAME("cortex-a53"),
> +                                            NULL
> +                                              };
> +
>  static void xlnx_ep108_init(MachineState *machine)
>  {
>      XlnxZCU102 *s = EP108_MACHINE(machine);
> @@ -185,6 +190,12 @@ static void xlnx_ep108_machine_class_init(ObjectClass *oc, void *data)
>      mc->block_default_type = IF_IDE;
>      mc->units_per_default_bus = 1;
>      mc->ignore_memory_transaction_failures = true;
> +    mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a53");
> +    /* The ZynqMP SoC is always a Cortex-A53. We add this here to give
> +     * users a sane error if they specify a different CPU, but we never
> +     * use their CPU choice.
> +     */
> +    mc->valid_cpu_types = xlnx_zynqmp_valid_cpus;
>  }
>  
>  static const TypeInfo xlnx_ep108_machine_init_typeinfo = {
> @@ -240,6 +251,12 @@ static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data)
>      mc->block_default_type = IF_IDE;
>      mc->units_per_default_bus = 1;
>      mc->ignore_memory_transaction_failures = true;
> +    mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a53");
> +    /* The ZynqMP SoC is always a Cortex-A53. We add this here to give
> +     * users a sane error if they specify a different CPU, but we never
> +     * use their CPU choice.
> +     */
> +    mc->valid_cpu_types = xlnx_zynqmp_valid_cpus;
>  }
>  
>  static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
> -- 
> 2.11.0
> 

-- 
Eduardo

Re: [Qemu-devel] [PATCH v3 0/5] Add a valid_cpu_types property

[Alistair Francis]

On Wed, Oct 18, 2017 at 12:31 AM, Alistair Francis
<alistair.francis@xilinx.com> wrote:
> There are numorous QEMU machines that only have a single or a handful of
> valid CPU options. To simplyfy the management of specificying which CPU
> is/isn't valid let's create a property that can be set in the machine
> init. We can then check to see if the user supplied CPU is in that list
> or not.
>
> I have added the valid_cpu_types for some ARM machines only at the
> moment.
>
> Here is what specifying the CPUs looks like now:
>
> $ aarch64-softmmu/qemu-system-aarch64 -M netduino2 -kernel ./u-boot.elf -nographic -cpu "cortex-m3" -S
> QEMU 2.10.50 monitor - type 'help' for more information
> (qemu) info cpus
> * CPU #0: thread_id=24175
> (qemu) q
>
> $ aarch64-softmmu/qemu-system-aarch64 -M netduino2 -kernel ./u-boot.elf -nographic -cpu "cortex-m4" -S
> QEMU 2.10.50 monitor - type 'help' for more information
> (qemu) q
>
> $ aarch64-softmmu/qemu-system-aarch64 -M netduino2 -kernel ./u-boot.elf -nographic -cpu "cortex-m5" -S
> qemu-system-aarch64: unable to find CPU model 'cortex-m5'
>
> $ aarch64-softmmu/qemu-system-aarch64 -M netduino2 -kernel ./u-boot.elf -nographic -cpu "cortex-a9" -S
> qemu-system-aarch64: Invalid CPU type: cortex-a9-arm-cpu
> The valid types are: cortex-m3-arm-cpu, cortex-m4-arm-cpu

It looks like all the patches have been reviewed now. Can this go
through your tree Peter?

Thanks,
Alistair

>
> V3:
>  - Make the varialbes static
> V2:
>  - Rebase
>  - Reorder patches
>  - Add a Raspberry Pi 2 CPU fix
> V1:
>  - Small fixes to prepare a series instead of RFC
>  - Add commit messages for the commits
>  - Expand the machine support to ARM machines
> RFC v2:
>  - Rebase on Igor's work
>  - Use more QEMUisms inside the code
>  - List the supported machines in a NULL terminated array
>
> Alistair Francis (5):
>   netduino2: Specify the valid CPUs
>   bcm2836: Use the Cortex-A7 instead of Cortex-A15
>   raspi: Specify the valid CPUs
>   xlnx-zcu102: Specify the valid CPUs
>   xilinx_zynq: Specify the valid CPUs
>
>  hw/arm/bcm2836.c     |  2 +-
>  hw/arm/netduino2.c   | 10 +++++++++-
>  hw/arm/raspi.c       |  7 +++++++
>  hw/arm/xilinx_zynq.c |  6 ++++++
>  hw/arm/xlnx-zcu102.c | 17 +++++++++++++++++
>  5 files changed, 40 insertions(+), 2 deletions(-)
>
> --
> 2.11.0
>

Re: [Qemu-devel] [PATCH v3 4/5] xlnx-zcu102: Specify the valid CPUs

[Philippe Mathieu-Daudé]

On 10/17/2017 07:31 PM, Alistair Francis wrote:
> List all possible valid CPU options.
> 
> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
> ---
> 
> An implementation for single CPU machines is still being discussed. A
> solution proposed by Eduardo is this:
> 
> 1) Change the default on TYPE_MACHINE to:
>      mc->valid_cpu_types = { TYPE_CPU, NULL };
> 
>    This will keep the existing behavior for all boards.
> 
> 2) mc->valid_cpu_types=NULL be interpreted as "no CPU model
>    except the default is accepted" or "-cpu is not accepted" in
>    machine_run_board_init() (I prefer the former, but both
>    options would be correct)
> 
> 3) Boards like xlnx_zynqmp could then just do this:
> 
>    static void xxx_class_init(...) {
>        mc->default_cpu_type = MY_CPU_TYPE;
>        /* Reason: XXX_init() is hardcoded to MY_CPU_TYPE */
>        mc->valid_cpu_types = NULL;
>    }
> 
> V3:
>  - Make variable static
> V2:
>  - Don't use the users -cpu
>  - Fixup allignment
> 
>  hw/arm/xlnx-zcu102.c | 17 +++++++++++++++++
>  1 file changed, 17 insertions(+)
> 
> diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c
> index 519a16ed98..d5a5425356 100644
> --- a/hw/arm/xlnx-zcu102.c
> +++ b/hw/arm/xlnx-zcu102.c
> @@ -160,6 +160,11 @@ static void xlnx_zynqmp_init(XlnxZCU102 *s, MachineState *machine)
>      arm_load_kernel(s->soc.boot_cpu_ptr, &xlnx_zcu102_binfo);
>  }
>  
> +static const char *xlnx_zynqmp_valid_cpus[] = {
> +                                            ARM_CPU_TYPE_NAME("cortex-a53"),
> +                                            NULL
> +                                              };

Why so many spaces? :) Maybe Peter can clean it when applying.

static const char *xlnx_zynqmp_valid_cpus[] = {
    ARM_CPU_TYPE_NAME("cortex-a53"),
    NULL
};

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>

> +
>  static void xlnx_ep108_init(MachineState *machine)
>  {
>      XlnxZCU102 *s = EP108_MACHINE(machine);
> @@ -185,6 +190,12 @@ static void xlnx_ep108_machine_class_init(ObjectClass *oc, void *data)
>      mc->block_default_type = IF_IDE;
>      mc->units_per_default_bus = 1;
>      mc->ignore_memory_transaction_failures = true;
> +    mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a53");
> +    /* The ZynqMP SoC is always a Cortex-A53. We add this here to give
> +     * users a sane error if they specify a different CPU, but we never
> +     * use their CPU choice.
> +     */
> +    mc->valid_cpu_types = xlnx_zynqmp_valid_cpus;
>  }
>  
>  static const TypeInfo xlnx_ep108_machine_init_typeinfo = {
> @@ -240,6 +251,12 @@ static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data)
>      mc->block_default_type = IF_IDE;
>      mc->units_per_default_bus = 1;
>      mc->ignore_memory_transaction_failures = true;
> +    mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a53");
> +    /* The ZynqMP SoC is always a Cortex-A53. We add this here to give
> +     * users a sane error if they specify a different CPU, but we never
> +     * use their CPU choice.
> +     */
> +    mc->valid_cpu_types = xlnx_zynqmp_valid_cpus;
>  }
>  
>  static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
> 

Re: [Qemu-devel] [PATCH v3 4/5] xlnx-zcu102: Specify the valid CPUs

[Alistair Francis]

On Mon, Oct 23, 2017 at 1:14 PM, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> On 10/17/2017 07:31 PM, Alistair Francis wrote:
>> List all possible valid CPU options.
>>
>> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
>> ---
>>
>> An implementation for single CPU machines is still being discussed. A
>> solution proposed by Eduardo is this:
>>
>> 1) Change the default on TYPE_MACHINE to:
>>      mc->valid_cpu_types = { TYPE_CPU, NULL };
>>
>>    This will keep the existing behavior for all boards.
>>
>> 2) mc->valid_cpu_types=NULL be interpreted as "no CPU model
>>    except the default is accepted" or "-cpu is not accepted" in
>>    machine_run_board_init() (I prefer the former, but both
>>    options would be correct)
>>
>> 3) Boards like xlnx_zynqmp could then just do this:
>>
>>    static void xxx_class_init(...) {
>>        mc->default_cpu_type = MY_CPU_TYPE;
>>        /* Reason: XXX_init() is hardcoded to MY_CPU_TYPE */
>>        mc->valid_cpu_types = NULL;
>>    }
>>
>> V3:
>>  - Make variable static
>> V2:
>>  - Don't use the users -cpu
>>  - Fixup allignment
>>
>>  hw/arm/xlnx-zcu102.c | 17 +++++++++++++++++
>>  1 file changed, 17 insertions(+)
>>
>> diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c
>> index 519a16ed98..d5a5425356 100644
>> --- a/hw/arm/xlnx-zcu102.c
>> +++ b/hw/arm/xlnx-zcu102.c
>> @@ -160,6 +160,11 @@ static void xlnx_zynqmp_init(XlnxZCU102 *s, MachineState *machine)
>>      arm_load_kernel(s->soc.boot_cpu_ptr, &xlnx_zcu102_binfo);
>>  }
>>
>> +static const char *xlnx_zynqmp_valid_cpus[] = {
>> +                                            ARM_CPU_TYPE_NAME("cortex-a53"),
>> +                                            NULL
>> +                                              };
>
> Why so many spaces? :) Maybe Peter can clean it when applying.
>
> static const char *xlnx_zynqmp_valid_cpus[] = {
>     ARM_CPU_TYPE_NAME("cortex-a53"),
>     NULL
> };

The spaces are there to keep the elements under the array (while being
less then 80 characters).

Alistair

>
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>
>> +
>>  static void xlnx_ep108_init(MachineState *machine)
>>  {
>>      XlnxZCU102 *s = EP108_MACHINE(machine);
>> @@ -185,6 +190,12 @@ static void xlnx_ep108_machine_class_init(ObjectClass *oc, void *data)
>>      mc->block_default_type = IF_IDE;
>>      mc->units_per_default_bus = 1;
>>      mc->ignore_memory_transaction_failures = true;
>> +    mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a53");
>> +    /* The ZynqMP SoC is always a Cortex-A53. We add this here to give
>> +     * users a sane error if they specify a different CPU, but we never
>> +     * use their CPU choice.
>> +     */
>> +    mc->valid_cpu_types = xlnx_zynqmp_valid_cpus;
>>  }
>>
>>  static const TypeInfo xlnx_ep108_machine_init_typeinfo = {
>> @@ -240,6 +251,12 @@ static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data)
>>      mc->block_default_type = IF_IDE;
>>      mc->units_per_default_bus = 1;
>>      mc->ignore_memory_transaction_failures = true;
>> +    mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a53");
>> +    /* The ZynqMP SoC is always a Cortex-A53. We add this here to give
>> +     * users a sane error if they specify a different CPU, but we never
>> +     * use their CPU choice.
>> +     */
>> +    mc->valid_cpu_types = xlnx_zynqmp_valid_cpus;
>>  }
>>
>>  static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
>>

Re: [Qemu-devel] [PATCH v3 0/5] Add a valid_cpu_types property

[Alistair Francis]

On Mon, Oct 23, 2017 at 12:26 AM, Alistair Francis <alistair23@gmail.com> wrote:
> On Wed, Oct 18, 2017 at 12:31 AM, Alistair Francis
> <alistair.francis@xilinx.com> wrote:
>> There are numorous QEMU machines that only have a single or a handful of
>> valid CPU options. To simplyfy the management of specificying which CPU
>> is/isn't valid let's create a property that can be set in the machine
>> init. We can then check to see if the user supplied CPU is in that list
>> or not.
>>
>> I have added the valid_cpu_types for some ARM machines only at the
>> moment.
>>
>> Here is what specifying the CPUs looks like now:
>>
>> $ aarch64-softmmu/qemu-system-aarch64 -M netduino2 -kernel ./u-boot.elf -nographic -cpu "cortex-m3" -S
>> QEMU 2.10.50 monitor - type 'help' for more information
>> (qemu) info cpus
>> * CPU #0: thread_id=24175
>> (qemu) q
>>
>> $ aarch64-softmmu/qemu-system-aarch64 -M netduino2 -kernel ./u-boot.elf -nographic -cpu "cortex-m4" -S
>> QEMU 2.10.50 monitor - type 'help' for more information
>> (qemu) q
>>
>> $ aarch64-softmmu/qemu-system-aarch64 -M netduino2 -kernel ./u-boot.elf -nographic -cpu "cortex-m5" -S
>> qemu-system-aarch64: unable to find CPU model 'cortex-m5'
>>
>> $ aarch64-softmmu/qemu-system-aarch64 -M netduino2 -kernel ./u-boot.elf -nographic -cpu "cortex-a9" -S
>> qemu-system-aarch64: Invalid CPU type: cortex-a9-arm-cpu
>> The valid types are: cortex-m3-arm-cpu, cortex-m4-arm-cpu
>
> It looks like all the patches have been reviewed now. Can this go
> through your tree Peter?

Ping!

I'm happy to send a pull request if that helps. I have a slick signed key now :)

Alistair

>
> Thanks,
> Alistair
>
>>
>> V3:
>>  - Make the varialbes static
>> V2:
>>  - Rebase
>>  - Reorder patches
>>  - Add a Raspberry Pi 2 CPU fix
>> V1:
>>  - Small fixes to prepare a series instead of RFC
>>  - Add commit messages for the commits
>>  - Expand the machine support to ARM machines
>> RFC v2:
>>  - Rebase on Igor's work
>>  - Use more QEMUisms inside the code
>>  - List the supported machines in a NULL terminated array
>>
>> Alistair Francis (5):
>>   netduino2: Specify the valid CPUs
>>   bcm2836: Use the Cortex-A7 instead of Cortex-A15
>>   raspi: Specify the valid CPUs
>>   xlnx-zcu102: Specify the valid CPUs
>>   xilinx_zynq: Specify the valid CPUs
>>
>>  hw/arm/bcm2836.c     |  2 +-
>>  hw/arm/netduino2.c   | 10 +++++++++-
>>  hw/arm/raspi.c       |  7 +++++++
>>  hw/arm/xilinx_zynq.c |  6 ++++++
>>  hw/arm/xlnx-zcu102.c | 17 +++++++++++++++++
>>  5 files changed, 40 insertions(+), 2 deletions(-)
>>
>> --
>> 2.11.0
>>

Re: [Qemu-devel] [PATCH v3 0/5] Add a valid_cpu_types property

[Alistair Francis]

On Tue, Nov 7, 2017 at 3:30 PM, Alistair Francis
<alistair.francis@xilinx.com> wrote:
> On Mon, Oct 23, 2017 at 12:26 AM, Alistair Francis <alistair23@gmail.com> wrote:
>> On Wed, Oct 18, 2017 at 12:31 AM, Alistair Francis
>> <alistair.francis@xilinx.com> wrote:
>>> There are numorous QEMU machines that only have a single or a handful of
>>> valid CPU options. To simplyfy the management of specificying which CPU
>>> is/isn't valid let's create a property that can be set in the machine
>>> init. We can then check to see if the user supplied CPU is in that list
>>> or not.
>>>
>>> I have added the valid_cpu_types for some ARM machines only at the
>>> moment.
>>>
>>> Here is what specifying the CPUs looks like now:
>>>
>>> $ aarch64-softmmu/qemu-system-aarch64 -M netduino2 -kernel ./u-boot.elf -nographic -cpu "cortex-m3" -S
>>> QEMU 2.10.50 monitor - type 'help' for more information
>>> (qemu) info cpus
>>> * CPU #0: thread_id=24175
>>> (qemu) q
>>>
>>> $ aarch64-softmmu/qemu-system-aarch64 -M netduino2 -kernel ./u-boot.elf -nographic -cpu "cortex-m4" -S
>>> QEMU 2.10.50 monitor - type 'help' for more information
>>> (qemu) q
>>>
>>> $ aarch64-softmmu/qemu-system-aarch64 -M netduino2 -kernel ./u-boot.elf -nographic -cpu "cortex-m5" -S
>>> qemu-system-aarch64: unable to find CPU model 'cortex-m5'
>>>
>>> $ aarch64-softmmu/qemu-system-aarch64 -M netduino2 -kernel ./u-boot.elf -nographic -cpu "cortex-a9" -S
>>> qemu-system-aarch64: Invalid CPU type: cortex-a9-arm-cpu
>>> The valid types are: cortex-m3-arm-cpu, cortex-m4-arm-cpu
>>
>> It looks like all the patches have been reviewed now. Can this go
>> through your tree Peter?
>
> Ping!

Ping^2

Can this go through target-arm.next for 2.12?

Alistair

>
> I'm happy to send a pull request if that helps. I have a slick signed key now :)
>
> Alistair
>
>>
>> Thanks,
>> Alistair
>>
>>>
>>> V3:
>>>  - Make the varialbes static
>>> V2:
>>>  - Rebase
>>>  - Reorder patches
>>>  - Add a Raspberry Pi 2 CPU fix
>>> V1:
>>>  - Small fixes to prepare a series instead of RFC
>>>  - Add commit messages for the commits
>>>  - Expand the machine support to ARM machines
>>> RFC v2:
>>>  - Rebase on Igor's work
>>>  - Use more QEMUisms inside the code
>>>  - List the supported machines in a NULL terminated array
>>>
>>> Alistair Francis (5):
>>>   netduino2: Specify the valid CPUs
>>>   bcm2836: Use the Cortex-A7 instead of Cortex-A15
>>>   raspi: Specify the valid CPUs
>>>   xlnx-zcu102: Specify the valid CPUs
>>>   xilinx_zynq: Specify the valid CPUs
>>>
>>>  hw/arm/bcm2836.c     |  2 +-
>>>  hw/arm/netduino2.c   | 10 +++++++++-
>>>  hw/arm/raspi.c       |  7 +++++++
>>>  hw/arm/xilinx_zynq.c |  6 ++++++
>>>  hw/arm/xlnx-zcu102.c | 17 +++++++++++++++++
>>>  5 files changed, 40 insertions(+), 2 deletions(-)
>>>
>>> --
>>> 2.11.0
>>>

Re: [Qemu-devel] [PATCH v3 4/5] xlnx-zcu102: Specify the valid CPUs

[Igor Mammedov]

On Thu, 26 Oct 2017 11:59:16 +0200
Alistair Francis <alistair.francis@xilinx.com> wrote:

> On Mon, Oct 23, 2017 at 1:14 PM, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> > On 10/17/2017 07:31 PM, Alistair Francis wrote:  
> >> List all possible valid CPU options.
> >>
> >> Signed-off-by: Alistair Francis <alistair.francis@xilinx.com>
> >> ---
> >>
> >> An implementation for single CPU machines is still being discussed. A
> >> solution proposed by Eduardo is this:
> >>
> >> 1) Change the default on TYPE_MACHINE to:
> >>      mc->valid_cpu_types = { TYPE_CPU, NULL };
> >>
> >>    This will keep the existing behavior for all boards.
> >>
> >> 2) mc->valid_cpu_types=NULL be interpreted as "no CPU model
> >>    except the default is accepted" or "-cpu is not accepted" in
> >>    machine_run_board_init() (I prefer the former, but both
> >>    options would be correct)
> >>
> >> 3) Boards like xlnx_zynqmp could then just do this:
> >>
> >>    static void xxx_class_init(...) {
> >>        mc->default_cpu_type = MY_CPU_TYPE;
> >>        /* Reason: XXX_init() is hardcoded to MY_CPU_TYPE */
> >>        mc->valid_cpu_types = NULL;
> >>    }
> >>
> >> V3:
> >>  - Make variable static
> >> V2:
> >>  - Don't use the users -cpu
> >>  - Fixup allignment
> >>
> >>  hw/arm/xlnx-zcu102.c | 17 +++++++++++++++++
> >>  1 file changed, 17 insertions(+)
> >>
> >> diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c
> >> index 519a16ed98..d5a5425356 100644
> >> --- a/hw/arm/xlnx-zcu102.c
> >> +++ b/hw/arm/xlnx-zcu102.c
> >> @@ -160,6 +160,11 @@ static void xlnx_zynqmp_init(XlnxZCU102 *s, MachineState *machine)
> >>      arm_load_kernel(s->soc.boot_cpu_ptr, &xlnx_zcu102_binfo);
> >>  }
> >>
> >> +static const char *xlnx_zynqmp_valid_cpus[] = {
> >> +                                            ARM_CPU_TYPE_NAME("cortex-a53"),
> >> +                                            NULL
> >> +                                              };  
> >
> > Why so many spaces? :) Maybe Peter can clean it when applying.
> >
> > static const char *xlnx_zynqmp_valid_cpus[] = {
> >     ARM_CPU_TYPE_NAME("cortex-a53"),
> >     NULL
> > };
+1 to what Philippe is suggesting, this is common pattern in QEMU code.

> The spaces are there to keep the elements under the array (while being
> less then 80 characters).
it's not aligned on 4SP from the beginning or 4SP after {}
so it's not exactly matching codding style and catches eye.
Also in case one would need to add an extra cpu there with
longer name beyond 80chr, one would need to move the rest
elements to new alignment.

the same applies for 4-5/5,
I'd would repost fixed up series.

> 
> Alistair
> 
> >
> > Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> >  
> >> +
> >>  static void xlnx_ep108_init(MachineState *machine)
> >>  {
> >>      XlnxZCU102 *s = EP108_MACHINE(machine);
> >> @@ -185,6 +190,12 @@ static void xlnx_ep108_machine_class_init(ObjectClass *oc, void *data)
> >>      mc->block_default_type = IF_IDE;
> >>      mc->units_per_default_bus = 1;
> >>      mc->ignore_memory_transaction_failures = true;
> >> +    mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a53");
> >> +    /* The ZynqMP SoC is always a Cortex-A53. We add this here to give
> >> +     * users a sane error if they specify a different CPU, but we never
> >> +     * use their CPU choice.
> >> +     */
> >> +    mc->valid_cpu_types = xlnx_zynqmp_valid_cpus;
> >>  }
> >>
> >>  static const TypeInfo xlnx_ep108_machine_init_typeinfo = {
> >> @@ -240,6 +251,12 @@ static void xlnx_zcu102_machine_class_init(ObjectClass *oc, void *data)
> >>      mc->block_default_type = IF_IDE;
> >>      mc->units_per_default_bus = 1;
> >>      mc->ignore_memory_transaction_failures = true;
> >> +    mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a53");
> >> +    /* The ZynqMP SoC is always a Cortex-A53. We add this here to give
> >> +     * users a sane error if they specify a different CPU, but we never
> >> +     * use their CPU choice.
> >> +     */
> >> +    mc->valid_cpu_types = xlnx_zynqmp_valid_cpus;
> >>  }
> >>
> >>  static const TypeInfo xlnx_zcu102_machine_init_typeinfo = {
> >>