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From: James Hogan <james.hogan@imgtec.com>
To: <linux-mips@linux-mips.org>
Cc: "James Hogan" <james.hogan@imgtec.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Radim Krčmář" <rkrcmar@redhat.com>,
	"Ralf Baechle" <ralf@linux-mips.org>,
	kvm@vger.kernel.org, stable@vger.kernel.org
Subject: [PATCH 0/2] KVM: MIPS/Emulate: TLBWR & TLBR fixes for T&E
Date: Tue, 14 Mar 2017 17:00:06 +0000	[thread overview]
Message-ID: <cover.57583f73c169e83d499329fbda19909b816c0024.1489510483.git-series.james.hogan@imgtec.com> (raw)

These two patches fix TLBWR and TLBR instruction emulation for Trap &
Emulate guests, so that wired entries are properly preserved and so that
the entries can be read back by the guest itself.

Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Cc: stable@vger.kernel.org

James Hogan (2):
  KVM: MIPS/Emulate: Fix TLBWR with wired for T&E
  KVM: MIPS/Emulate: Properly implement TLBR for T&E

 arch/mips/kvm/emulate.c | 103 ++++++++++++++++++++++-------------------
 1 file changed, 56 insertions(+), 47 deletions(-)

-- 
git-series 0.8.10

WARNING: multiple messages have this Message-ID (diff)
From: James Hogan <james.hogan@imgtec.com>
To: linux-mips@linux-mips.org
Cc: "James Hogan" <james.hogan@imgtec.com>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Radim Krčmář" <rkrcmar@redhat.com>,
	"Ralf Baechle" <ralf@linux-mips.org>,
	kvm@vger.kernel.org, stable@vger.kernel.org
Subject: [PATCH 0/2] KVM: MIPS/Emulate: TLBWR & TLBR fixes for T&E
Date: Tue, 14 Mar 2017 17:00:06 +0000	[thread overview]
Message-ID: <cover.57583f73c169e83d499329fbda19909b816c0024.1489510483.git-series.james.hogan@imgtec.com> (raw)
Message-ID: <20170314170006.fjYp-JiM9weUn-UpHWUjiy_I7vGSS9dfMr20k9CGNBU@z> (raw)

These two patches fix TLBWR and TLBR instruction emulation for Trap &
Emulate guests, so that wired entries are properly preserved and so that
the entries can be read back by the guest itself.

Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Radim Krčmář" <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Cc: stable@vger.kernel.org

James Hogan (2):
  KVM: MIPS/Emulate: Fix TLBWR with wired for T&E
  KVM: MIPS/Emulate: Properly implement TLBR for T&E

 arch/mips/kvm/emulate.c | 103 ++++++++++++++++++++++-------------------
 1 file changed, 56 insertions(+), 47 deletions(-)

-- 
git-series 0.8.10

             reply	other threads:[~2017-03-14 17:00 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-14 17:00 James Hogan [this message]
2017-03-14 17:00 ` [PATCH 0/2] KVM: MIPS/Emulate: TLBWR & TLBR fixes for T&E James Hogan
2017-03-14 17:00 ` [PATCH 1/2] KVM: MIPS/Emulate: Fix TLBWR with wired " James Hogan
2017-03-14 17:00   ` James Hogan
2017-03-21 19:50   ` Ralf Baechle
2017-03-14 17:00 ` [PATCH 2/2] KVM: MIPS/Emulate: Properly implement TLBR " James Hogan
2017-03-14 17:00   ` James Hogan
2017-03-21 19:55   ` Ralf Baechle

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