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* [PATCH 1/2] arm64: dts: clearfog-gt-8k: fix USB regulator gpio polarity
@ 2018-10-16 10:50 ` Baruch Siach
  0 siblings, 0 replies; 8+ messages in thread
From: Baruch Siach @ 2018-10-16 10:50 UTC (permalink / raw)
  To: Jason Cooper, Andrew Lunn, Gregory Clement, Sebastian Hesselbarth
  Cc: linux-arm-kernel, Russell King, Ori Shemtov, Florian Fainelli,
	netdev, Linus Walleij, Baruch Siach

The fixed regulator driver ignores the gpio flags, so this change has
no practical effect in the current implementation. Fix it anyway to
correct the hardware description.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
 arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
index aea9c220ae6a..af1310c53bc8 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
@@ -42,7 +42,7 @@
 
 	v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 {
 		compatible = "regulator-fixed";
-		gpio = <&cp0_gpio2 15 GPIO_ACTIVE_HIGH>;
+		gpio = <&cp0_gpio2 15 GPIO_ACTIVE_LOW>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&cp0_xhci_vbus_pins>;
 		regulator-name = "v_5v0_usb3_hst_vbus";
-- 
2.19.1

^ permalink raw reply related	[flat|nested] 8+ messages in thread
* [PATCH 1/2] arm64: dts: clearfog-gt-8k: fix USB regulator gpio polarity
@ 2018-10-16 10:50 ` Baruch Siach
  0 siblings, 0 replies; 8+ messages in thread
From: Baruch Siach @ 2018-10-16 10:50 UTC (permalink / raw)
  To: linux-arm-kernel

The fixed regulator driver ignores the gpio flags, so this change has
no practical effect in the current implementation. Fix it anyway to
correct the hardware description.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
 arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
index aea9c220ae6a..af1310c53bc8 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
@@ -42,7 +42,7 @@
 
 	v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 {
 		compatible = "regulator-fixed";
-		gpio = <&cp0_gpio2 15 GPIO_ACTIVE_HIGH>;
+		gpio = <&cp0_gpio2 15 GPIO_ACTIVE_LOW>;
 		pinctrl-names = "default";
 		pinctrl-0 = <&cp0_xhci_vbus_pins>;
 		regulator-name = "v_5v0_usb3_hst_vbus";
-- 
2.19.1

^ permalink raw reply related	[flat|nested] 8+ messages in thread
* [PATCH 2/2] arm64: dts: clearfog-gt-8k: 1G eth PHY reset signal
  2018-10-16 10:50 ` Baruch Siach
@ 2018-10-16 10:50   ` Baruch Siach
  -1 siblings, 0 replies; 8+ messages in thread
From: Baruch Siach @ 2018-10-16 10:50 UTC (permalink / raw)
  To: Jason Cooper, Andrew Lunn, Gregory Clement, Sebastian Hesselbarth
  Cc: linux-arm-kernel, Russell King, Ori Shemtov, Florian Fainelli,
	netdev, Linus Walleij, Baruch Siach

This reset signal controls the Marvell 1512 1G PHY.

Note that current implementation queries the PHY over the MDIO bus
(get_phy_device() call from of_mdiobus_register_phy()) before reset
signal deassert. If the PHY reset signal is asserted at boot time, PHY
registration fails. So current code relies on the bootloader to deassert
the reset signal.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
 arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
index af1310c53bc8..73df0ef5e0c4 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
@@ -337,6 +337,10 @@
 		 */
 		marvell,reg-init = <3 16 0 0x1017>;
 		reg = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&cp0_copper_eth_phy_reset>;
+		reset-gpios = <&cp1_gpio1 11 GPIO_ACTIVE_LOW>;
+		reset-assert-us = <10000>;
 	};
 
 	switch0: switch0@4 {
-- 
2.19.1

^ permalink raw reply related	[flat|nested] 8+ messages in thread
* [PATCH 2/2] arm64: dts: clearfog-gt-8k: 1G eth PHY reset signal
@ 2018-10-16 10:50   ` Baruch Siach
  0 siblings, 0 replies; 8+ messages in thread
From: Baruch Siach @ 2018-10-16 10:50 UTC (permalink / raw)
  To: linux-arm-kernel

This reset signal controls the Marvell 1512 1G PHY.

Note that current implementation queries the PHY over the MDIO bus
(get_phy_device() call from of_mdiobus_register_phy()) before reset
signal deassert. If the PHY reset signal is asserted at boot time, PHY
registration fails. So current code relies on the bootloader to deassert
the reset signal.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
 arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
index af1310c53bc8..73df0ef5e0c4 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
@@ -337,6 +337,10 @@
 		 */
 		marvell,reg-init = <3 16 0 0x1017>;
 		reg = <0>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&cp0_copper_eth_phy_reset>;
+		reset-gpios = <&cp1_gpio1 11 GPIO_ACTIVE_LOW>;
+		reset-assert-us = <10000>;
 	};
 
 	switch0: switch0 at 4 {
-- 
2.19.1

^ permalink raw reply related	[flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] arm64: dts: clearfog-gt-8k: fix USB regulator gpio polarity
  2018-10-16 10:50 ` Baruch Siach
@ 2018-11-30 17:45   ` Gregory CLEMENT
  -1 siblings, 0 replies; 8+ messages in thread
From: Gregory CLEMENT @ 2018-11-30 17:45 UTC (permalink / raw)
  To: Baruch Siach
  Cc: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth,
	linux-arm-kernel, Russell King, Ori Shemtov, Florian Fainelli,
	netdev, Linus Walleij

Hi Baruch,
 
 On mar., oct. 16 2018, Baruch Siach <baruch@tkos.co.il> wrote:

> The fixed regulator driver ignores the gpio flags, so this change has
> no practical effect in the current implementation. Fix it anyway to
> correct the hardware description.
>

Applied on mvebu/dt64

Thanks,

Gregory

> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> ---
>  arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
> index aea9c220ae6a..af1310c53bc8 100644
> --- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
> +++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
> @@ -42,7 +42,7 @@
>  
>  	v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 {
>  		compatible = "regulator-fixed";
> -		gpio = <&cp0_gpio2 15 GPIO_ACTIVE_HIGH>;
> +		gpio = <&cp0_gpio2 15 GPIO_ACTIVE_LOW>;
>  		pinctrl-names = "default";
>  		pinctrl-0 = <&cp0_xhci_vbus_pins>;
>  		regulator-name = "v_5v0_usb3_hst_vbus";
> -- 
> 2.19.1
>

-- 
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com

^ permalink raw reply	[flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] arm64: dts: clearfog-gt-8k: fix USB regulator gpio polarity
@ 2018-11-30 17:45   ` Gregory CLEMENT
  0 siblings, 0 replies; 8+ messages in thread
From: Gregory CLEMENT @ 2018-11-30 17:45 UTC (permalink / raw)
  To: Baruch Siach
  Cc: Andrew Lunn, Florian Fainelli, Jason Cooper, netdev,
	Linus Walleij, Russell King, Ori Shemtov, linux-arm-kernel,
	Sebastian Hesselbarth

Hi Baruch,
 
 On mar., oct. 16 2018, Baruch Siach <baruch@tkos.co.il> wrote:

> The fixed regulator driver ignores the gpio flags, so this change has
> no practical effect in the current implementation. Fix it anyway to
> correct the hardware description.
>

Applied on mvebu/dt64

Thanks,

Gregory

> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> ---
>  arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
> index aea9c220ae6a..af1310c53bc8 100644
> --- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
> +++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
> @@ -42,7 +42,7 @@
>  
>  	v_5v0_usb3_hst_vbus: regulator-usb3-vbus0 {
>  		compatible = "regulator-fixed";
> -		gpio = <&cp0_gpio2 15 GPIO_ACTIVE_HIGH>;
> +		gpio = <&cp0_gpio2 15 GPIO_ACTIVE_LOW>;
>  		pinctrl-names = "default";
>  		pinctrl-0 = <&cp0_xhci_vbus_pins>;
>  		regulator-name = "v_5v0_usb3_hst_vbus";
> -- 
> 2.19.1
>

-- 
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] arm64: dts: clearfog-gt-8k: 1G eth PHY reset signal
  2018-10-16 10:50   ` Baruch Siach
@ 2018-11-30 17:45     ` Gregory CLEMENT
  -1 siblings, 0 replies; 8+ messages in thread
From: Gregory CLEMENT @ 2018-11-30 17:45 UTC (permalink / raw)
  To: Baruch Siach
  Cc: Jason Cooper, Andrew Lunn, Sebastian Hesselbarth,
	linux-arm-kernel, Russell King, Ori Shemtov, Florian Fainelli,
	netdev, Linus Walleij

Hi Baruch,
 
 On mar., oct. 16 2018, Baruch Siach <baruch@tkos.co.il> wrote:

> This reset signal controls the Marvell 1512 1G PHY.
>
> Note that current implementation queries the PHY over the MDIO bus
> (get_phy_device() call from of_mdiobus_register_phy()) before reset
> signal deassert. If the PHY reset signal is asserted at boot time, PHY
> registration fails. So current code relies on the bootloader to deassert
> the reset signal.

Applied on mvebu/dt64

Thanks,

Gregory

>
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> ---
>  arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
> index af1310c53bc8..73df0ef5e0c4 100644
> --- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
> +++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
> @@ -337,6 +337,10 @@
>  		 */
>  		marvell,reg-init = <3 16 0 0x1017>;
>  		reg = <0>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&cp0_copper_eth_phy_reset>;
> +		reset-gpios = <&cp1_gpio1 11 GPIO_ACTIVE_LOW>;
> +		reset-assert-us = <10000>;
>  	};
>  
>  	switch0: switch0@4 {
> -- 
> 2.19.1
>

-- 
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com

^ permalink raw reply	[flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] arm64: dts: clearfog-gt-8k: 1G eth PHY reset signal
@ 2018-11-30 17:45     ` Gregory CLEMENT
  0 siblings, 0 replies; 8+ messages in thread
From: Gregory CLEMENT @ 2018-11-30 17:45 UTC (permalink / raw)
  To: Baruch Siach
  Cc: Andrew Lunn, Florian Fainelli, Jason Cooper, netdev,
	Linus Walleij, Russell King, Ori Shemtov, linux-arm-kernel,
	Sebastian Hesselbarth

Hi Baruch,
 
 On mar., oct. 16 2018, Baruch Siach <baruch@tkos.co.il> wrote:

> This reset signal controls the Marvell 1512 1G PHY.
>
> Note that current implementation queries the PHY over the MDIO bus
> (get_phy_device() call from of_mdiobus_register_phy()) before reset
> signal deassert. If the PHY reset signal is asserted at boot time, PHY
> registration fails. So current code relies on the bootloader to deassert
> the reset signal.

Applied on mvebu/dt64

Thanks,

Gregory

>
> Signed-off-by: Baruch Siach <baruch@tkos.co.il>
> ---
>  arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
> index af1310c53bc8..73df0ef5e0c4 100644
> --- a/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
> +++ b/arch/arm64/boot/dts/marvell/armada-8040-clearfog-gt-8k.dts
> @@ -337,6 +337,10 @@
>  		 */
>  		marvell,reg-init = <3 16 0 0x1017>;
>  		reg = <0>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&cp0_copper_eth_phy_reset>;
> +		reset-gpios = <&cp1_gpio1 11 GPIO_ACTIVE_LOW>;
> +		reset-assert-us = <10000>;
>  	};
>  
>  	switch0: switch0@4 {
> -- 
> 2.19.1
>

-- 
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com

_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

^ permalink raw reply	[flat|nested] 8+ messages in thread
end of thread, other threads:[~2018-12-01  4:55 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2018-10-16 10:50 [PATCH 1/2] arm64: dts: clearfog-gt-8k: fix USB regulator gpio polarity Baruch Siach
2018-10-16 10:50 ` Baruch Siach
2018-10-16 10:50 ` [PATCH 2/2] arm64: dts: clearfog-gt-8k: 1G eth PHY reset signal Baruch Siach
2018-10-16 10:50   ` Baruch Siach
2018-11-30 17:45   ` Gregory CLEMENT
2018-11-30 17:45     ` Gregory CLEMENT
2018-11-30 17:45 ` [PATCH 1/2] arm64: dts: clearfog-gt-8k: fix USB regulator gpio polarity Gregory CLEMENT
2018-11-30 17:45   ` Gregory CLEMENT

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