From: Simon Horman <horms+renesas@verge.net.au>
To: linux-renesas-soc@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org,
Magnus Damm <magnus.damm@gmail.com>,
Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>,
Simon Horman <horms+renesas@verge.net.au>
Subject: [PATCH 53/54] arm64: dts: renesas: r8a77970: use CPG core clock macros
Date: Thu, 7 Dec 2017 10:53:56 +0100 [thread overview]
Message-ID: <e221dab085d89bbd49ed6713b07201a5262aad7f.1512640145.git.horms+renesas@verge.net.au> (raw)
In-Reply-To: <cover.1512640145.git.horms+renesas@verge.net.au>
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Now that the commit ecadea00f588 ("dt-bindings: clock: Add R8A77970 CPG
core clock definitions") has hit Linus' tree, we can replace the bare
numbers (we had to use to avoid a cross tree dependency) with these macro
definitions...
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index 636b57a2edde..7bb224595c95 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -9,7 +9,7 @@
* kind, whether express or implied.
*/
-#include <dt-bindings/clock/renesas-cpg-mssr.h>
+#include <dt-bindings/clock/r8a77970-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/power/r8a77970-sysc.h>
@@ -32,7 +32,7 @@
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0>;
- clocks = <&cpg CPG_CORE 0>;
+ clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>;
power-domains = <&sysc 5>;
next-level-cache = <&L2_CA53>;
enable-method = "psci";
@@ -262,7 +262,7 @@
reg = <0 0xe6540000 0 96>;
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 520>,
- <&cpg CPG_CORE 9>,
+ <&cpg CPG_CORE R8A77970_CLK_S2D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x31>, <&dmac1 0x30>,
@@ -280,7 +280,7 @@
reg = <0 0xe6550000 0 96>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 519>,
- <&cpg CPG_CORE 9>,
+ <&cpg CPG_CORE R8A77970_CLK_S2D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x33>, <&dmac1 0x32>,
@@ -298,7 +298,7 @@
reg = <0 0xe6560000 0 96>;
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 518>,
- <&cpg CPG_CORE 9>,
+ <&cpg CPG_CORE R8A77970_CLK_S2D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x35>, <&dmac1 0x34>,
@@ -315,7 +315,7 @@
reg = <0 0xe66a0000 0 96>;
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 517>,
- <&cpg CPG_CORE 9>,
+ <&cpg CPG_CORE R8A77970_CLK_S2D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x37>, <&dmac1 0x36>,
@@ -333,7 +333,7 @@
reg = <0 0xe6e60000 0 64>;
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 207>,
- <&cpg CPG_CORE 9>,
+ <&cpg CPG_CORE R8A77970_CLK_S2D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x51>, <&dmac1 0x50>,
@@ -351,7 +351,7 @@
reg = <0 0xe6e68000 0 64>;
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 206>,
- <&cpg CPG_CORE 9>,
+ <&cpg CPG_CORE R8A77970_CLK_S2D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x53>, <&dmac1 0x52>,
@@ -369,7 +369,7 @@
reg = <0 0xe6c50000 0 64>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 204>,
- <&cpg CPG_CORE 9>,
+ <&cpg CPG_CORE R8A77970_CLK_S2D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x57>, <&dmac1 0x56>,
@@ -386,7 +386,7 @@
reg = <0 0xe6c40000 0 64>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 203>,
- <&cpg CPG_CORE 9>,
+ <&cpg CPG_CORE R8A77970_CLK_S2D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x59>, <&dmac1 0x58>,
--
2.11.0
WARNING: multiple messages have this Message-ID (diff)
From: horms+renesas@verge.net.au (Simon Horman)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 53/54] arm64: dts: renesas: r8a77970: use CPG core clock macros
Date: Thu, 7 Dec 2017 10:53:56 +0100 [thread overview]
Message-ID: <e221dab085d89bbd49ed6713b07201a5262aad7f.1512640145.git.horms+renesas@verge.net.au> (raw)
In-Reply-To: <cover.1512640145.git.horms+renesas@verge.net.au>
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Now that the commit ecadea00f588 ("dt-bindings: clock: Add R8A77970 CPG
core clock definitions") has hit Linus' tree, we can replace the bare
numbers (we had to use to avoid a cross tree dependency) with these macro
definitions...
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
---
arch/arm64/boot/dts/renesas/r8a77970.dtsi | 20 ++++++++++----------
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
index 636b57a2edde..7bb224595c95 100644
--- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi
@@ -9,7 +9,7 @@
* kind, whether express or implied.
*/
-#include <dt-bindings/clock/renesas-cpg-mssr.h>
+#include <dt-bindings/clock/r8a77970-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/power/r8a77970-sysc.h>
@@ -32,7 +32,7 @@
device_type = "cpu";
compatible = "arm,cortex-a53", "arm,armv8";
reg = <0>;
- clocks = <&cpg CPG_CORE 0>;
+ clocks = <&cpg CPG_CORE R8A77970_CLK_Z2>;
power-domains = <&sysc 5>;
next-level-cache = <&L2_CA53>;
enable-method = "psci";
@@ -262,7 +262,7 @@
reg = <0 0xe6540000 0 96>;
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 520>,
- <&cpg CPG_CORE 9>,
+ <&cpg CPG_CORE R8A77970_CLK_S2D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x31>, <&dmac1 0x30>,
@@ -280,7 +280,7 @@
reg = <0 0xe6550000 0 96>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 519>,
- <&cpg CPG_CORE 9>,
+ <&cpg CPG_CORE R8A77970_CLK_S2D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x33>, <&dmac1 0x32>,
@@ -298,7 +298,7 @@
reg = <0 0xe6560000 0 96>;
interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 518>,
- <&cpg CPG_CORE 9>,
+ <&cpg CPG_CORE R8A77970_CLK_S2D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x35>, <&dmac1 0x34>,
@@ -315,7 +315,7 @@
reg = <0 0xe66a0000 0 96>;
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 517>,
- <&cpg CPG_CORE 9>,
+ <&cpg CPG_CORE R8A77970_CLK_S2D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x37>, <&dmac1 0x36>,
@@ -333,7 +333,7 @@
reg = <0 0xe6e60000 0 64>;
interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 207>,
- <&cpg CPG_CORE 9>,
+ <&cpg CPG_CORE R8A77970_CLK_S2D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x51>, <&dmac1 0x50>,
@@ -351,7 +351,7 @@
reg = <0 0xe6e68000 0 64>;
interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 206>,
- <&cpg CPG_CORE 9>,
+ <&cpg CPG_CORE R8A77970_CLK_S2D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x53>, <&dmac1 0x52>,
@@ -369,7 +369,7 @@
reg = <0 0xe6c50000 0 64>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 204>,
- <&cpg CPG_CORE 9>,
+ <&cpg CPG_CORE R8A77970_CLK_S2D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x57>, <&dmac1 0x56>,
@@ -386,7 +386,7 @@
reg = <0 0xe6c40000 0 64>;
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cpg CPG_MOD 203>,
- <&cpg CPG_CORE 9>,
+ <&cpg CPG_CORE R8A77970_CLK_S2D1>,
<&scif_clk>;
clock-names = "fck", "brg_int", "scif_clk";
dmas = <&dmac1 0x59>, <&dmac1 0x58>,
--
2.11.0
next prev parent reply other threads:[~2017-12-07 9:55 UTC|newest]
Thread overview: 112+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-12-07 9:53 [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.16 Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 01/54] arm64: dts: renesas: salvator: set driver type for eMMC Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 02/54] arm64: dts: renesas: r8a7795: Use R-Car SDHI Gen3 fallback compat string Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 03/54] arm64: dts: renesas: r8a7796: " Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 04/54] arm64: dts: renesas: r8a77970: Add RWDT node Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 05/54] arm64: dts: renesas: eagle: Move avb node to preserve sort order Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 06/54] arm64: dts: renesas: eagle: Enable watchdog timer Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 07/54] arm64: dts: renesas: Add support for Salvator-XS with R-Car M3-W Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 08/54] arm64: dts: renesas: r8a7796: Add IPMMU device nodes Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 09/54] arm64: dts: renesas: r8a7796: Tie SYS-DMAC to IPMMU-DS0/1 Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 10/54] arm64: dts: renesas: r8a7796: Tie Audio-DMAC to IPMMU-MP Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 11/54] arm64: dts: renesas: r8a7796: Point FDP1 via FCPF to IPMMU-VI0 Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 12/54] arm64: dts: renesas: r8a7796: Point VSPI via FCPVI to IPMMU-VC0 Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 13/54] arm64: dts: renesas: r8a7796: Connect Ethernet-AVB to IPMMU-DS0 Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 14/54] arm64: dts: renesas: r8a7796: Enable IPMMU-DS0, DS1, MP, VI0, VC0 and MM Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 15/54] arm64: dts: renesas: ulcb-kf: enable USB2 PHY of channel 0 Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 16/54] arm64: dts: renesas: ulcb-kf: add dr_mode property for USB2.0 " Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 17/54] arm64: dts: renesas: r8a77995: add SYS-DMAC nodes Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 18/54] arm64: dts: renesas: r8a77995: Add SDHI (MMC) support Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 19/54] arm64: dts: renesas: r8a7795: Add IPMMU device nodes Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 20/54] arm64: dts: renesas: r8a7795-es1: " Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 21/54] arm64: dts: renesas: r8a7795: Tie SYS-DMAC to IPMMU-DS0/1 Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 22/54] arm64: dts: renesas: r8a7795: Tie Audio-DMAC to IPMMU-MP0/1 Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 23/54] arm64: dts: renesas: r8a7795: Point DU/VSPD via FCPVD to IPMMU-VI0/1 Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 24/54] arm64: dts: renesas: r8a7795-es1: Point DU/VSPD via FCPVD to IPMMU-VI0 Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 25/54] arm64: dts: renesas: r8a7795: Point FDP1 via FCPF to IPMMU-VP0/1 Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 26/54] arm64: dts: renesas: r8a7795-es1: Point FDP1 via FCPF to IPMMU-VP0 Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 27/54] arm64: dts: renesas: r8a7795: Point VSPBC/VSPBD via FCPVB to IPMMU-VP0/1 Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 28/54] arm64: dts: renesas: r8a7795: Point VSPI via FCPVI " Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 29/54] arm64: dts: renesas: r8a7795-es1: Point VSPI via FCPVI to IPMMU-VP Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 30/54] arm64: dts: renesas: r8a7795: Connect Ethernet-AVB to IPMMU-DS0 Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 31/54] arm64: dts: renesas: r8a7795: Connect SATA to IPMMU-HC Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 32/54] arm64: dts: renesas: r8a7795-es1: Enable IPMMU-MP1 Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 33/54] arm64: dts: renesas: r8a7795: Enable IPMMU-VI0, VP1, DS0, DS1 and MM Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 34/54] arm64: dts: renesas: salvator-common: Add BD9571 PMIC Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 35/54] arm64: dts: renesas: r8a7795-es1-salvator-x: Add SoC name to file header Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 36/54] arm64: dts: renesas: r8a7795-salvator-x: " Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 37/54] arm64: dts: renesas: r8a7796-salvator-x: " Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 38/54] arm64: dts: renesas: r8a7795-salvator-xs: " Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 39/54] arm64: dts: renesas: r8a77995: Add CAN external clock support Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 40/54] arm64: dts: renesas: r8a77995: Add CAN support Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 41/54] arm64: dts: renesas: r8a77995: Add CAN FD support Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 42/54] arm64: dts: renesas: r8a7795: Increase the number of GPIO bank 1 ports to 29 Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 43/54] arm64: dts: renesas: r8a77970: sort includes Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 44/54] arm64: dts: renesas: r8a77995: add DMA for SCIF2 Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 45/54] arm64: dts: renesas: r8a77970: Add IPMMU device nodes Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 46/54] arm64: dts: renesas: r8a77970: Tie SYS-DMAC to IPMMU-DS1 Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 47/54] arm64: dts: renesas: r8a77970: Connect Ethernet-AVB to IPMMU-RT Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 48/54] arm64: dts: renesas: r8a77970: Enable IPMMU-DS1, RT and MM Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 49/54] arm64: dts: renesas: r8a77995: Add IPMMU device nodes Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 50/54] arm64: dts: renesas: r8a77995: Connect Ethernet-AVB to IPMMU-RT Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 51/54] arm64: dts: renesas: initial V3MSK board device tree Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` [PATCH 52/54] arm64: dts: renesas: v3msk: add EtherAVB support Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-07 9:53 ` Simon Horman [this message]
2017-12-07 9:53 ` [PATCH 53/54] arm64: dts: renesas: r8a77970: use CPG core clock macros Simon Horman
2017-12-07 9:53 ` [PATCH 54/54] arm64: dts: renesas: r8a77970: use SYSC power domain macros Simon Horman
2017-12-07 9:53 ` Simon Horman
2017-12-21 15:21 ` [GIT PULL] Renesas ARM64 Based SoC DT Updates for v4.16 Arnd Bergmann
2017-12-21 15:21 ` Arnd Bergmann
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