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From: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
To: Chris Wilson <chris@chris-wilson.co.uk>, intel-gfx@lists.freedesktop.org
Subject: Re: [Intel-gfx] [PATCH 5/5] drm/i915/guc: enable only the user interrupt when using GuC submission
Date: Tue, 5 Jan 2021 15:56:52 -0800	[thread overview]
Message-ID: <e5c91501-e164-0bb6-a92d-f38f2a618d20@intel.com> (raw)
In-Reply-To: <160988988224.14894.10188123155348129183@build.alporthouse.com>



On 1/5/2021 3:38 PM, Chris Wilson wrote:
> Quoting Daniele Ceraolo Spurio (2021-01-05 23:19:47)
>> In GuC submission mode the CS is owned by the GuC FW, so all CS status
>> interrupts are handled by it. We only need the user interrupt as that
>> signals request completion.
>>
>> Since we're now starting the engines directly in GuC submission mode
>> when selected, we can stop switching back and forth between the
>> execlists and the GuC programming and select directly the correct
>> interrupt mask.
>>
>> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
>> Cc: Matthew Brost <matthew.brost@intel.com>
>> Cc: John Harrison <john.c.harrison@intel.com>
>> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
>> ---
>>   drivers/gpu/drm/i915/gt/intel_gt_irq.c        | 18 ++++++-----
>>   .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 31 -------------------
>>   2 files changed, 11 insertions(+), 38 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_irq.c b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
>> index 9830342aa6f4..7b2b8cb2d2be 100644
>> --- a/drivers/gpu/drm/i915/gt/intel_gt_irq.c
>> +++ b/drivers/gpu/drm/i915/gt/intel_gt_irq.c
>> @@ -237,14 +237,18 @@ void gen11_gt_irq_reset(struct intel_gt *gt)
>>   
>>   void gen11_gt_irq_postinstall(struct intel_gt *gt)
>>   {
>> -       const u32 irqs =
>> -               GT_CS_MASTER_ERROR_INTERRUPT |
>> -               GT_RENDER_USER_INTERRUPT |
>> -               GT_CONTEXT_SWITCH_INTERRUPT |
>> -               GT_WAIT_SEMAPHORE_INTERRUPT;
>>          struct intel_uncore *uncore = gt->uncore;
>> -       const u32 dmask = irqs << 16 | irqs;
>> -       const u32 smask = irqs << 16;
>> +       u32 irqs = GT_RENDER_USER_INTERRUPT;
>> +       u32 dmask;
>> +       u32 smask;
>> +
>> +       if (!intel_uc_wants_guc_submission(&gt->uc))
>> +               irqs |= GT_CS_MASTER_ERROR_INTERRUPT |
>> +                       GT_CONTEXT_SWITCH_INTERRUPT |
>> +                       GT_WAIT_SEMAPHORE_INTERRUPT;
> Hmm, we should stop performing this by default then, and make the
> execlists setup request the interrupt vector it desires.
>
> That's certainly a bit more fiddly to untangle the packed iir across
> multiple gen. :|

I had considered that, but this is a gt-level setup while the execlists 
submission code is currently all engine-based, so I couldn't find a good 
place to move this to and I didn't want to add a new function just for 
it. Any preference?

Daniele

> -Chris

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  reply	other threads:[~2021-01-05 23:56 UTC|newest]

Thread overview: 32+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-01-05 23:19 [Intel-gfx] [PATCH 0/5] Split GuC submission from execlists submission Daniele Ceraolo Spurio
2021-01-05 23:19 ` [Intel-gfx] [PATCH 1/5] drm/i915/guc: Delete GuC code unused in future patches Daniele Ceraolo Spurio
2021-01-06  0:55   ` Chris Wilson
2021-01-06  2:28     ` Daniele Ceraolo Spurio
2021-01-06  3:11       ` Chris Wilson
2021-01-05 23:19 ` [Intel-gfx] [PATCH 2/5] drm/i915/guc: do not dump execlists state with GuC submission Daniele Ceraolo Spurio
2021-01-06  0:58   ` Chris Wilson
2021-01-06  2:32     ` Daniele Ceraolo Spurio
2021-01-06  2:55       ` Chris Wilson
2021-01-06 17:21         ` Daniele Ceraolo Spurio
2021-01-06 19:43           ` Chris Wilson
2021-01-13  1:03             ` Daniele Ceraolo Spurio
2021-01-05 23:19 ` [Intel-gfx] [PATCH 3/5] drm/i915/guc: init engine directly in GuC submission mode Daniele Ceraolo Spurio
2021-01-05 23:33   ` Chris Wilson
2021-01-05 23:51     ` Daniele Ceraolo Spurio
2021-01-06  0:02       ` Chris Wilson
2021-01-06  3:14         ` Chris Wilson
2021-01-05 23:19 ` [Intel-gfx] [PATCH 4/5] drm/i915/guc: stop calling execlists_set_default_submission Daniele Ceraolo Spurio
2021-01-06  1:02   ` Chris Wilson
2021-01-06  2:38     ` Daniele Ceraolo Spurio
2021-01-06  3:09       ` Chris Wilson
2021-01-06 17:22         ` Daniele Ceraolo Spurio
2021-01-05 23:19 ` [Intel-gfx] [PATCH 5/5] drm/i915/guc: enable only the user interrupt when using GuC submission Daniele Ceraolo Spurio
2021-01-05 23:38   ` Chris Wilson
2021-01-05 23:56     ` Daniele Ceraolo Spurio [this message]
2021-01-06  0:15       ` Chris Wilson
2021-01-06  2:39         ` Daniele Ceraolo Spurio
2021-01-06  1:05   ` Chris Wilson
2021-01-06  0:28 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Split GuC submission from execlists submission Patchwork
2021-01-06  0:29 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-01-06  0:57 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-01-06  3:42 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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