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From: Alexandru Elisei <alexandru.elisei@arm.com>
To: Eric Auger <eric.auger@redhat.com>,
	eric.auger.pro@gmail.com, maz@kernel.org,
	kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
	qemu-devel@nongnu.org, qemu-arm@nongnu.org
Cc: drjones@redhat.com, andrew.murray@arm.com,
	andre.przywara@arm.com, peter.maydell@linaro.org
Subject: Re: [kvm-unit-tests RFC 01/10] arm64: Provide read/write_sysreg_s
Date: Fri, 6 Dec 2019 17:36:57 +0000	[thread overview]
Message-ID: <efe2c571-1b69-5cc4-3505-24d092a9f985@arm.com> (raw)
In-Reply-To: <20191206172724.947-2-eric.auger@redhat.com>

Hi,

On 12/6/19 5:27 PM, Eric Auger wrote:
> From: Andrew Jones <drjones@redhat.com>
>
> Sometimes we need to test access to system registers which are
> missing assembler mnemonics.
>
> Signed-off-by: Andrew Jones <drjones@redhat.com>
> ---
>  lib/arm64/asm/sysreg.h | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/lib/arm64/asm/sysreg.h b/lib/arm64/asm/sysreg.h
> index a03830b..a45eebd 100644
> --- a/lib/arm64/asm/sysreg.h
> +++ b/lib/arm64/asm/sysreg.h
> @@ -38,6 +38,17 @@
>  	asm volatile("msr " xstr(r) ", %x0" : : "rZ" (__val));	\
>  } while (0)
>  
> +#define read_sysreg_s(r) ({					\
> +	u64 __val;						\
> +	asm volatile("mrs_s %0, " xstr(r) : "=r" (__val));	\
> +	__val;							\
> +})
> +
> +#define write_sysreg_s(v, r) do {				\
> +	u64 __val = (u64)v;					\
> +	asm volatile("msr_s " xstr(r) ", %x0" : : "rZ" (__val));\
> +} while (0)
> +
>  asm(
>  "	.irp	num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30\n"
>  "	.equ	.L__reg_num_x\\num, \\num\n"

That's exactly the code that I wrote for my EL2 series :)

Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com>

Thanks,
Alex

WARNING: multiple messages have this Message-ID (diff)
From: Alexandru Elisei <alexandru.elisei@arm.com>
To: Eric Auger <eric.auger@redhat.com>,
	eric.auger.pro@gmail.com, maz@kernel.org,
	kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
	qemu-devel@nongnu.org, qemu-arm@nongnu.org
Cc: peter.maydell@linaro.org, andrew.murray@arm.com,
	drjones@redhat.com, andre.przywara@arm.com
Subject: Re: [kvm-unit-tests RFC 01/10] arm64: Provide read/write_sysreg_s
Date: Fri, 6 Dec 2019 17:36:57 +0000	[thread overview]
Message-ID: <efe2c571-1b69-5cc4-3505-24d092a9f985@arm.com> (raw)
In-Reply-To: <20191206172724.947-2-eric.auger@redhat.com>

Hi,

On 12/6/19 5:27 PM, Eric Auger wrote:
> From: Andrew Jones <drjones@redhat.com>
>
> Sometimes we need to test access to system registers which are
> missing assembler mnemonics.
>
> Signed-off-by: Andrew Jones <drjones@redhat.com>
> ---
>  lib/arm64/asm/sysreg.h | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/lib/arm64/asm/sysreg.h b/lib/arm64/asm/sysreg.h
> index a03830b..a45eebd 100644
> --- a/lib/arm64/asm/sysreg.h
> +++ b/lib/arm64/asm/sysreg.h
> @@ -38,6 +38,17 @@
>  	asm volatile("msr " xstr(r) ", %x0" : : "rZ" (__val));	\
>  } while (0)
>  
> +#define read_sysreg_s(r) ({					\
> +	u64 __val;						\
> +	asm volatile("mrs_s %0, " xstr(r) : "=r" (__val));	\
> +	__val;							\
> +})
> +
> +#define write_sysreg_s(v, r) do {				\
> +	u64 __val = (u64)v;					\
> +	asm volatile("msr_s " xstr(r) ", %x0" : : "rZ" (__val));\
> +} while (0)
> +
>  asm(
>  "	.irp	num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30\n"
>  "	.equ	.L__reg_num_x\\num, \\num\n"

That's exactly the code that I wrote for my EL2 series :)

Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com>

Thanks,
Alex


WARNING: multiple messages have this Message-ID (diff)
From: Alexandru Elisei <alexandru.elisei@arm.com>
To: Eric Auger <eric.auger@redhat.com>,
	eric.auger.pro@gmail.com, maz@kernel.org,
	kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org,
	qemu-devel@nongnu.org, qemu-arm@nongnu.org
Cc: andre.przywara@arm.com
Subject: Re: [kvm-unit-tests RFC 01/10] arm64: Provide read/write_sysreg_s
Date: Fri, 6 Dec 2019 17:36:57 +0000	[thread overview]
Message-ID: <efe2c571-1b69-5cc4-3505-24d092a9f985@arm.com> (raw)
In-Reply-To: <20191206172724.947-2-eric.auger@redhat.com>

Hi,

On 12/6/19 5:27 PM, Eric Auger wrote:
> From: Andrew Jones <drjones@redhat.com>
>
> Sometimes we need to test access to system registers which are
> missing assembler mnemonics.
>
> Signed-off-by: Andrew Jones <drjones@redhat.com>
> ---
>  lib/arm64/asm/sysreg.h | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/lib/arm64/asm/sysreg.h b/lib/arm64/asm/sysreg.h
> index a03830b..a45eebd 100644
> --- a/lib/arm64/asm/sysreg.h
> +++ b/lib/arm64/asm/sysreg.h
> @@ -38,6 +38,17 @@
>  	asm volatile("msr " xstr(r) ", %x0" : : "rZ" (__val));	\
>  } while (0)
>  
> +#define read_sysreg_s(r) ({					\
> +	u64 __val;						\
> +	asm volatile("mrs_s %0, " xstr(r) : "=r" (__val));	\
> +	__val;							\
> +})
> +
> +#define write_sysreg_s(v, r) do {				\
> +	u64 __val = (u64)v;					\
> +	asm volatile("msr_s " xstr(r) ", %x0" : : "rZ" (__val));\
> +} while (0)
> +
>  asm(
>  "	.irp	num,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30\n"
>  "	.equ	.L__reg_num_x\\num, \\num\n"

That's exactly the code that I wrote for my EL2 series :)

Reviewed-by: Alexandru Elisei <alexandru.elisei@arm.com>

Thanks,
Alex
_______________________________________________
kvmarm mailing list
kvmarm@lists.cs.columbia.edu
https://lists.cs.columbia.edu/mailman/listinfo/kvmarm

  reply	other threads:[~2019-12-06 17:37 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-12-06 17:27 [kvm-unit-tests RFC 00/10] KVM: arm64: PMUv3 Event Counter Tests Eric Auger
2019-12-06 17:27 ` Eric Auger
2019-12-06 17:27 ` Eric Auger
2019-12-06 17:27 ` [kvm-unit-tests RFC 01/10] arm64: Provide read/write_sysreg_s Eric Auger
2019-12-06 17:27   ` Eric Auger
2019-12-06 17:27   ` Eric Auger
2019-12-06 17:36   ` Alexandru Elisei [this message]
2019-12-06 17:36     ` Alexandru Elisei
2019-12-06 17:36     ` Alexandru Elisei
2019-12-06 17:27 ` [kvm-unit-tests RFC 02/10] pmu: Let pmu tests take a sub-test parameter Eric Auger
2019-12-06 17:27   ` Eric Auger
2019-12-06 17:27   ` Eric Auger
2019-12-06 17:27 ` [kvm-unit-tests RFC 03/10] pmu: Add a pmu struct Eric Auger
2019-12-06 17:27   ` Eric Auger
2019-12-06 17:27   ` Eric Auger
2019-12-13 18:59   ` Andrew Jones
2019-12-13 18:59     ` Andrew Jones
2019-12-13 18:59     ` Andrew Jones
2019-12-06 17:27 ` [kvm-unit-tests RFC 04/10] pmu: Check Required Event Support Eric Auger
2019-12-06 17:27   ` Eric Auger
2019-12-06 17:27   ` Eric Auger
2019-12-13 19:10   ` Andrew Jones
2019-12-13 19:10     ` Andrew Jones
2019-12-13 19:10     ` Andrew Jones
2019-12-06 17:27 ` [kvm-unit-tests RFC 05/10] pmu: Basic event counter Tests Eric Auger
2019-12-06 17:27   ` Eric Auger
2019-12-06 17:27   ` Eric Auger
2019-12-06 17:27 ` [kvm-unit-tests RFC 06/10] pmu: Test chained counter Eric Auger
2019-12-06 17:27   ` Eric Auger
2019-12-06 17:27   ` Eric Auger
2019-12-06 17:27 ` [kvm-unit-tests RFC 07/10] arm: pmu: test 32-bit <-> 64-bit transitions Eric Auger
2019-12-06 17:27   ` Eric Auger
2019-12-06 17:27   ` Eric Auger
2019-12-06 17:27 ` [kvm-unit-tests RFC 08/10] arm: gic: Provide per-IRQ helper functions Eric Auger
2019-12-06 17:27   ` Eric Auger
2019-12-06 17:27   ` Eric Auger
2019-12-06 17:27 ` [kvm-unit-tests RFC 09/10] arm/arm64: gic: Introduce setup_irq() helper Eric Auger
2019-12-06 17:27   ` Eric Auger
2019-12-06 17:27   ` Eric Auger
2019-12-06 17:27 ` [kvm-unit-tests RFC 10/10] pmu: Test overflow interrupts Eric Auger
2019-12-06 17:27   ` Eric Auger
2019-12-06 17:27   ` Eric Auger

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